From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id B306581F5F for ; Fri, 10 Feb 2017 00:06:54 -0800 (PST) Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga105.fm.intel.com with ESMTP; 10 Feb 2017 00:06:54 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.35,140,1484035200"; d="scan'208";a="64096797" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga006.fm.intel.com with ESMTP; 10 Feb 2017 00:06:54 -0800 Received: from fmsmsx115.amr.corp.intel.com (10.18.116.19) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 10 Feb 2017 00:06:54 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx115.amr.corp.intel.com (10.18.116.19) with Microsoft SMTP Server (TLS) id 14.3.248.2; Fri, 10 Feb 2017 00:06:53 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.88]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.132]) with mapi id 14.03.0248.002; Fri, 10 Feb 2017 16:06:52 +0800 From: "Zeng, Star" To: Leo Duran , "edk2-devel@ml01.01.org" CC: Laszlo Ersek , "Tian, Feng" , Brijesh Singh , "Zeng, Star" , "Gao, Liming" , "Yao, Jiewen" Thread-Topic: [edk2] [PATCH 2/3] MdeModulePkg/Universal/CapsulePei: Add support for PCD PcdPteMemoryEncryptionAddressOrMask Thread-Index: AQHSglA3yIRtS0s5bUybsUr3ydVeZ6Fh4zAw Date: Fri, 10 Feb 2017 08:06:51 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103B825DA1@shsmsx102.ccr.corp.intel.com> References: <1486588386-2146-1-git-send-email-leo.duran@amd.com> <1486588386-2146-3-git-send-email-leo.duran@amd.com> In-Reply-To: <1486588386-2146-3-git-send-email-leo.duran@amd.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 2/3] MdeModulePkg/Universal/CapsulePei: Add support for PCD PcdPteMemoryEncryptionAddressOrMask X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Feb 2017 08:06:54 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Leo, CapsuleX64 is a standalone module, PcdGet64 (PcdPteMemoryEncryptionAddress= OrMask) could not be used in X64Entry PageFaultHandler() as PcdPteMemoryEnc= ryptionAddressOrMask may be configured to DYNAMIC type. You can use similar logic with PAGE_FAULT_CONTEXT.Page1GSupport to transfer= the PcdPteMemoryEncryptionAddressOrMask PCD value from CapsulePei to Capsu= leX64. Thanks, Star -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Leo = Duran Sent: Thursday, February 9, 2017 5:13 AM To: edk2-devel@ml01.01.org Cc: Laszlo Ersek ; Tian, Feng ; Leo= Duran ; Brijesh Singh ; Zeng, St= ar Subject: [edk2] [PATCH 2/3] MdeModulePkg/Universal/CapsulePei: Add support = for PCD PcdPteMemoryEncryptionAddressOrMask This PCD holds the address mask for page table entries when memory encrypti= on is enabled on AMD processors supporting the Secure Encrypted Virtualizat= ion (SEV) feature. The mask is applied when 4GB tables are created (UefiCapsule.c), and when t= he tables are expanded on-demand by page-faults above 4GB's (X64Entry.c). Cc: Feng Tian Cc: Star Zeng Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Brijesh Singh Signed-off-by: Leo Duran --- MdeModulePkg/Universal/CapsulePei/CapsulePei.inf | 2 ++ MdeModulePkg/Uni= versal/CapsulePei/CapsuleX64.inf | 4 ++++ MdeModulePkg/Universal/CapsuleP= ei/UefiCapsule.c | 9 +++++---- MdeModulePkg/Universal/CapsulePei/X64/X64= Entry.c | 10 ++++++---- 4 files changed, 17 insertions(+), 8 deletions(-) diff --git a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf b/MdeModulePk= g/Universal/CapsulePei/CapsulePei.inf index d2ca0d0..c54bc21 100644 --- a/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf +++ b/MdeModulePkg/Universal/CapsulePei/CapsulePei.inf @@ -7,6 +7,7 @@ # buffer overflow, integer overflow. # # Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # This program and the accompanying materials # are licensed and made ava= ilable under the terms and conditions @@ -76,6 +77,7 @@ [Ppis.IA32] [Pcd.I= A32] gEfiMdeModulePkgTokenSpaceGuid.PcdCapsuleCoalesceFile ## SOMETIMES_C= ONSUMES gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable ## SOMETIMES_C= ONSUMES + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ##= CONSUMES =20 [FeaturePcd.IA32] gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode ## CONSUMES di= ff --git a/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf b/MdeModulePkg/= Universal/CapsulePei/CapsuleX64.inf index 8318eaa..cf8543b 100644 --- a/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf +++ b/MdeModulePkg/Universal/CapsulePei/CapsuleX64.inf @@ -10,6 +10,7 @@ # buffer overflow, integer overflow. # # Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.
+# Copyright (c) 2017, AMD Incorporated. All rights reserved.
# # This program and the accompanying materials # are licensed and made ava= ilable under the terms and conditions @@ -53,6 +54,9 @@ [LibraryClasses] CpuExceptionHandlerLib DebugAgentLib =20 +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask ##= CONSUMES + [Depex] FALSE =20 diff --git a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c b/MdeModulePkg= /Universal/CapsulePei/UefiCapsule.c index 9ac9d22..77bc68c 100644 --- a/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c +++ b/MdeModulePkg/Universal/CapsulePei/UefiCapsule.c @@ -2,6 +2,7 @@ Capsule update PEIM for UEFI2.0 =20 Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
=20 This program and the accompanying materials are licensed and made availab= le under the terms and conditions @@ -187,7 +188,7 @@ Create4GPageTables ( // // Make a PML4 Entry // - PageMapLevel4Entry->Uint64 =3D (UINT64)(UINTN)PageDirectoryPointerEntr= y; + PageMapLevel4Entry->Uint64 =3D=20 + (UINT64)(UINTN)PageDirectoryPointerEntry | PcdGet64=20 + (PcdPteMemoryEncryptionAddressOrMask); PageMapLevel4Entry->Bits.ReadWrite =3D 1; PageMapLevel4Entry->Bits.Present =3D 1; =20 @@ -198,7 +199,7 @@ Create4GPageTables ( // // Fill in the Page Directory entries // - PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectory1GEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64=20 + (PcdPteMemoryEncryptionAddressOrMask); PageDirectory1GEntry->Bits.ReadWrite =3D 1; PageDirectory1GEntry->Bits.Present =3D 1; PageDirectory1GEntry->Bits.MustBe1 =3D 1; @@ -215,7 +216,7 @@ Crea= te4GPageTables ( // // Fill in a Page Directory Pointer Entries // - PageDirectoryPointerEntry->Uint64 =3D (UINT64)(UINTN)PageDirectory= Entry; + PageDirectoryPointerEntry->Uint64 =3D=20 + (UINT64)(UINTN)PageDirectoryEntry | PcdGet64=20 + (PcdPteMemoryEncryptionAddressOrMask); PageDirectoryPointerEntry->Bits.ReadWrite =3D 1; PageDirectoryPointerEntry->Bits.Present =3D 1; =20 @@ -223,7 +224,7 @@ Create4GPageTables ( // // Fill in the Page Directory entries // - PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress; + PageDirectoryEntry->Uint64 =3D (UINT64)PageAddress | PcdGet64=20 + (PcdPteMemoryEncryptionAddressOrMask); PageDirectoryEntry->Bits.ReadWrite =3D 1; PageDirectoryEntry->Bits.Present =3D 1; PageDirectoryEntry->Bits.MustBe1 =3D 1; diff --git a/MdeModulePk= g/Universal/CapsulePei/X64/X64Entry.c b/MdeModulePkg/Universal/CapsulePei/X= 64/X64Entry.c index 5ad95d2..f3f68ee 100644 --- a/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c +++ b/MdeModulePkg/Universal/CapsulePei/X64/X64Entry.c @@ -2,6 +2,8 @@ The X64 entrypoint is used to process capsule in long mode. =20 Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2017, AMD Incorporated. All rights reserved.
+ This program and the accompanying materials are licensed and made availab= le under the terms and conditions of the BSD License which accompanies thi= s distribution. The full text of the license may be found at @@ -128,7 +13= 0,7 @@ AcquirePage ( // // Link & Record the current uplink. // - *Uplink =3D Address | IA32_PG_P | IA32_PG_RW; + *Uplink =3D Address | PcdGet64 (PcdPteMemoryEncryptionAddressOrMask) |=20 + IA32_PG_P | IA32_PG_RW; PageFaultContext->PageFaultUplink[PageFaultContext->PageFaultIndex] =3D = Uplink; =20 PageFaultContext->PageFaultIndex =3D (PageFaultContext->PageFaultIndex += 1) % EXTRA_PAGE_TABLE_PAGES; @@ -183,7 +185,7 @@ PageFaultHandler ( PTIndex =3D BitFieldRead64 (PFAddress, 30, 38); // PDPTE if (PageFaultContext->Page1GSupport) { - PageTable[PTIndex] =3D (PFAddress & ~((1ull << 30) - 1)) | IA32_PG_P |= IA32_PG_RW | IA32_PG_PS; + PageTable[PTIndex] =3D (PFAddress & ~((1ull << 30) - 1)) | PcdGet64=20 + (PcdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW |=20 + IA32_PG_PS; } else { if ((PageTable[PTIndex] & IA32_PG_P) =3D=3D 0) { AcquirePage (PageFaultContext, &PageTable[PTIndex]); @@ -191,7 +193,= 7 @@ PageFaultHandler ( PageTable =3D (UINT64*)(UINTN)(PageTable[PTIndex] & PhyMask); PTIndex =3D BitFieldRead64 (PFAddress, 21, 29); // PD - PageTable[PTIndex] =3D (PFAddress & ~((1ull << 21) - 1)) | IA32_PG_P |= IA32_PG_RW | IA32_PG_PS; + PageTable[PTIndex] =3D (PFAddress & ~((1ull << 21) - 1)) | PcdGet64=20 + (PcdPteMemoryEncryptionAddressOrMask) | IA32_PG_P | IA32_PG_RW |=20 + IA32_PG_PS; } =20 return NULL; @@ -298,4 +300,4 @@ _ModuleEntryPoint ( // ASSERT (FALSE); return EFI_SUCCESS; -} \ No newline at end of file +} -- 1.9.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel