From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 891F021AE3CAE for ; Wed, 31 May 2017 00:24:05 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 31 May 2017 00:25:05 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.38,422,1491289200"; d="scan'208";a="1154802625" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga001.fm.intel.com with ESMTP; 31 May 2017 00:25:05 -0700 Received: from fmsmsx155.amr.corp.intel.com (10.18.116.71) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 31 May 2017 00:25:04 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX155.amr.corp.intel.com (10.18.116.71) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 31 May 2017 00:25:04 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.146]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.122]) with mapi id 14.03.0319.002; Wed, 31 May 2017 15:25:02 +0800 From: "Zeng, Star" To: "Ni, Ruiyu" , "edk2-devel@lists.01.org" CC: "Wu, Hao A" , "Zeng, Star" Thread-Topic: [PATCH] MdeModulePkg/Xhci: Remove TRB when canceling Async Int Transfer Thread-Index: AQHS2bqneWJKp0ck5Um9uPenIAVnqKIOCjsw Date: Wed, 31 May 2017 07:25:01 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103B8DD4D7@shsmsx102.ccr.corp.intel.com> References: <20170531030426.425444-1-ruiyu.ni@intel.com> In-Reply-To: <20170531030426.425444-1-ruiyu.ni@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdeModulePkg/Xhci: Remove TRB when canceling Async Int Transfer X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 May 2017 07:24:05 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Could you correct the indention in the code block below? With that corrected, Reviewed-by: Star Zeng + + // + // Device doesn't finish the IntTransfer until real data comes + // So the TRB should be removed as well. + // + Status =3D XhcDequeueTrbFromEndpoint (Xhc, Urb); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "XhciDelAllAsyncIntTransfers: XhcDequeueTrbFrom= Endpoint failed\n")); + } + Thanks, Star -----Original Message----- From: Ni, Ruiyu=20 Sent: Wednesday, May 31, 2017 11:04 AM To: edk2-devel@lists.01.org Cc: Wu, Hao A ; Zeng, Star Subject: [PATCH] MdeModulePkg/Xhci: Remove TRB when canceling Async Int Tra= nsfer Some USB devices don't report data periodically through Int Transfer. They = report data only when be asked. If the TRB is not removed from the XHCI HW,= when next time HOST asks data again, the data is reported but consumed by = the previous TRB, which results the HOST thinks data never comes. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Hao A Wu Cc: Star Zeng --- MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c b/MdeModulePkg/Bus/Pc= i/XhciDxe/XhciSched.c index 4bec76a85f..058e8f36ba 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.c @@ -2,7 +2,7 @@ =20 XHCI transfer scheduling routines. =20 -Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made availab= le under the terms and conditions of the BSD License which accompanies thi= s distribution. The full text of the license may be found at @@ -1319,6 +1= 319,7 @@ XhciDelAsyncIntTransfer ( LIST_ENTRY *Next; URB *Urb; EFI_USB_DATA_DIRECTION Direction; + EFI_STATUS Status; =20 Direction =3D ((EpNum & 0x80) !=3D 0) ? EfiUsbDataIn : EfiUsbDataOut; EpNum &=3D 0x0F; @@ -1330,6 +1331,15 @@ XhciDelAsyncIntTransfer ( if ((Urb->Ep.BusAddr =3D=3D BusAddr) && (Urb->Ep.EpAddr =3D=3D EpNum) && (Urb->Ep.Direction =3D=3D Direction)) { + // + // Device doesn't finish the IntTransfer until real data comes + // So the TRB should be removed as well. + // + Status =3D XhcDequeueTrbFromEndpoint (Xhc, Urb); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "XhciDelAsyncIntTransfer: XhcDequeueTrbFromEn= dpoint failed\n")); + } + RemoveEntryList (&Urb->UrbList); FreePool (Urb->Data); XhcFreeUrb (Xhc, Urb); @@ -1354,9 +1364,20 @@ XhciDelAllAsyncIntTransfers ( LIST_ENTRY *Entry; LIST_ENTRY *Next; URB *Urb; + EFI_STATUS Status; =20 EFI_LIST_FOR_EACH_SAFE (Entry, Next, &Xhc->AsyncIntTransfers) { Urb =3D EFI_LIST_CONTAINER (Entry, URB, UrbList); + + // + // Device doesn't finish the IntTransfer until real data comes + // So the TRB should be removed as well. + // + Status =3D XhcDequeueTrbFromEndpoint (Xhc, Urb); + if (EFI_ERROR (Status)) { + DEBUG ((EFI_D_ERROR, "XhciDelAllAsyncIntTransfers: XhcDequeueTrbFrom= Endpoint failed\n")); + } + RemoveEntryList (&Urb->UrbList); FreePool (Urb->Data); XhcFreeUrb (Xhc, Urb); -- 2.12.2.windows.2