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Fri, 25 Aug 2017 17:53:43 +0800 From: "Zeng, Star" To: Laszlo Ersek , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" , "Dong, Eric" , "Zeng, Star" Thread-Topic: [edk2] [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix memory protection crash Thread-Index: AQHTHIf0iDrAg4RIVk2t8D1jiWakqKKUT9cAgACG1YA= Date: Fri, 25 Aug 2017 09:53:43 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103B91DC10@shsmsx102.ccr.corp.intel.com> References: <1503544809-166388-1-git-send-email-star.zeng@intel.com> <0432078c-6490-139e-20d8-c6eac58ffd3f@redhat.com> In-Reply-To: <0432078c-6490-139e-20d8-c6eac58ffd3f@redhat.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix memory protection crash X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 25 Aug 2017 09:51:10 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Laszlo, X64 defined mPhysicalAddressBits already before the patch, and has the code= below to assign it. mPhysicalAddressBits =3D CalculateMaximumSupportAddress (); Thanks, Star -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Lasz= lo Ersek Sent: Friday, August 25, 2017 5:50 PM To: Zeng, Star ; edk2-devel@lists.01.org Cc: Yao, Jiewen ; Dong, Eric Subject: Re: [edk2] [PATCH] UefiCpuPkg/PiSmmCpuDxeSmm: Fix memory protectio= n crash Star, On 08/24/17 05:20, Star Zeng wrote: > https://bugzilla.tianocore.org/show_bug.cgi?id=3D624 reports memory=20 > protection crash in PiSmmCpuDxeSmm, Ia32 build with RAM above 4GB (of=20 > which 2GB are placed in 64-bit address). > It is because UEFI builds identity mapping page tables, >> 4G address is not supported at Ia32 build. >=20 > This patch is to get the PhysicalAddressBits that is used to build in=20 > PageTbl.c(Ia32/X64), and use it to check whether the address is=20 > supported or not in ConvertMemoryPageAttributes(). >=20 > With this patch, the debug messages will be like below. > UefiMemory protection: 0x0 - 0x9F000 Success UefiMemory protection:=20 > 0x100000 - 0x807000 Success UefiMemory protection: 0x808000 - 0x810000=20 > Success UefiMemory protection: 0x818000 - 0x820000 Success UefiMemory=20 > protection: 0x1510000 - 0x7B798000 Success UefiMemory protection:=20 > 0x7B79B000 - 0x7E538000 Success UefiMemory protection: 0x7E539000 -=20 > 0x7E545000 Success UefiMemory protection: 0x7E55A000 - 0x7E61F000=20 > Success UefiMemory protection: 0x7E62B000 - 0x7F6AB000 Success=20 > UefiMemory protection: 0x7F703000 - 0x7F70B000 Success UefiMemory=20 > protection: 0x7F70F000 - 0x7F778000 Success UefiMemory protection:=20 > 0x100000000 - 0x180000000 Unsupported >=20 > Cc: Jiewen Yao > Cc: Laszlo Ersek > Cc: Eric Dong > Originally-suggested-by: Jiewen Yao > Reported-by: Laszlo Ersek > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Star Zeng > --- > UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c | 4 +++ > UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 1 + > UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 31=20 > +++++++++++++++++----- > 3 files changed, 30 insertions(+), 6 deletions(-) >=20 > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c=20 > b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > index 32ce5958c59c..e88b42d73343 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/PageTbl.c > @@ -16,6 +16,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITH= ER EXPRESS OR IMPLIED. > =20 > #include "PiSmmCpuDxeSmm.h" > =20 > +UINT8 mPhysicalAddressBits; > + > /** > Create PageTable for SMM use. > =20 > @@ -36,6 +38,8 @@ SmmInitPageTable ( > // > InitializeSpinLock (mPFLock); > =20 > + mPhysicalAddressBits =3D 32; > + > if (FeaturePcdGet (PcdCpuSmmProfileEnable)) { > // > // Set own Page Fault entry instead of the default one, because=20 > SMM Profile diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h=20 > b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > index dbce9ec520fe..1cf85c1481a7 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h > @@ -419,6 +419,7 @@ extern SPIN_LOCK *mConfigSm= mCodeAccessCheckLock; > extern SPIN_LOCK *mMemoryMappedLock; > extern EFI_SMRAM_DESCRIPTOR *mSmmCpuSmramRanges; > extern UINTN mSmmCpuSmramRangeCount; > +extern UINT8 mPhysicalAddressBits; > =20 > // > // Copy of the PcdPteMemoryEncryptionAddressOrMask > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c=20 > b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c > index a535389c26ce..3ad5256f1e03 100644 > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c > @@ -1,6 +1,6 @@ > /** @file > =20 > -Copyright (c) 2016, Intel Corporation. All rights reserved.
> +Copyright (c) 2016 - 2017, Intel Corporation. All rights=20 > +reserved.
> This program and the accompanying materials are licensed and made=20 > available under the terms and conditions of the BSD License which=20 > accompanies this distribution. The full text of the license may be=20 > found at @@ -380,6 +380,7 @@ ConvertMemoryPageAttributes ( > PAGE_ATTRIBUTE SplitAttribute; > RETURN_STATUS Status; > BOOLEAN IsEntryModified; > + EFI_PHYSICAL_ADDRESS MaximumSupportMemAddress; > =20 > ASSERT (Attributes !=3D 0); > ASSERT ((Attributes & ~(EFI_MEMORY_RP | EFI_MEMORY_RO |=20 > EFI_MEMORY_XP)) =3D=3D 0); @@ -391,6 +392,17 @@ ConvertMemoryPageAttribut= es ( > return RETURN_INVALID_PARAMETER; > } > =20 > + MaximumSupportMemAddress =3D (EFI_PHYSICAL_ADDRESS)(UINTN)(LShiftU64=20 > + (1, mPhysicalAddressBits) - 1); if (BaseAddress > MaximumSupportMemAdd= ress) { > + return RETURN_UNSUPPORTED; > + } > + if (Length > MaximumSupportMemAddress) { > + return RETURN_UNSUPPORTED; > + } > + if ((Length !=3D 0) && (BaseAddress > MaximumSupportMemAddress - (Leng= th - 1))) { > + return RETURN_UNSUPPORTED; > + } > + > // DEBUG ((DEBUG_ERROR, "ConvertMemoryPageAttributes(%x) - %016lx,=20 > %016lx, %02lx\n", IsSet, BaseAddress, Length, Attributes)); > =20 > if (IsSplitted !=3D NULL) { > @@ -1037,6 +1049,7 @@ SetUefiMemMapAttributes ( > VOID > ) > { > + EFI_STATUS Status; > EFI_MEMORY_DESCRIPTOR *MemoryMap; > UINTN MemoryMapEntryCount; > UINTN Index; > @@ -1052,12 +1065,18 @@ SetUefiMemMapAttributes ( > MemoryMap =3D mUefiMemoryMap; > for (Index =3D 0; Index < MemoryMapEntryCount; Index++) { > if (IsUefiPageNotPresent(MemoryMap)) { > - DEBUG ((DEBUG_INFO, "UefiMemory protection: 0x%lx - 0x%lx\n", Memo= ryMap->PhysicalStart, MemoryMap->PhysicalStart + (UINT64)EFI_PAGES_TO_SIZE(= (UINTN)MemoryMap->NumberOfPages))); > - SmmSetMemoryAttributes ( > + Status =3D SmmSetMemoryAttributes ( > + MemoryMap->PhysicalStart, > + EFI_PAGES_TO_SIZE((UINTN)MemoryMap->NumberOfPages), > + EFI_MEMORY_RP > + ); > + DEBUG (( > + DEBUG_INFO, > + "UefiMemory protection: 0x%lx - 0x%lx %r\n", > MemoryMap->PhysicalStart, > - EFI_PAGES_TO_SIZE((UINTN)MemoryMap->NumberOfPages), > - EFI_MEMORY_RP > - ); > + MemoryMap->PhysicalStart + (UINT64)EFI_PAGES_TO_SIZE((UINTN)Memo= ryMap->NumberOfPages), > + Status > + )); > } > MemoryMap =3D NEXT_MEMORY_DESCRIPTOR(MemoryMap, mUefiDescriptorSize)= ; > } >=20 before applying this patch for local testing, I figured I'd look it over qu= ickly. I think that you missed adding the X64 changes to the commit, with "git add= ". Because, the "mPhysicalAddressBits" variable is declared in common code,= it is also consumed in common code, but it is only defined (i.e., allocated) and set in Ia32 code. I believe that applying this exact patch w= ould prevent PiSmmCpuDxeSmm even from linking. I think for X64 you likely have a change similar to the Ia32 one (defining = the variable and setting it to the actual physical address bits, likely fro= m the CPU HOB), but it's not part of the patch. If I'm right and you decide to post v2, then I suggest another (very small) improvement: I think the definition (=3Dallocation) of "mPhysicalAdd= ressBits" could also be moved to common code; only the assignments have to = be architecture-specific. Thanks Laszlo _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel