* [PATCH 0/2] Enable IOMMU for CSMM
@ 2017-09-05 3:29 Jiewen Yao
2017-09-05 3:29 ` [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage Jiewen Yao
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Jiewen Yao @ 2017-09-05 3:29 UTC (permalink / raw)
To: edk2-devel
This serial patch is to enable IOMMU support for CSM.
Jiewen Yao (2):
IntelSiliconPkg/Vtd: Support CSM usage.
IntelFramdworkModulePkg/LegacyBios: Add IoMmu Support.
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf | 1 +
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h | 1 +
IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c | 72 +++++++++++++++++++-
IntelSiliconPkg/IntelVTdDxe/BmDma.c | 8 +--
IntelSiliconPkg/IntelVTdDxe/TranslationTable.c | 2 +-
5 files changed, 78 insertions(+), 6 deletions(-)
--
2.7.4.windows.1
^ permalink raw reply [flat|nested] 6+ messages in thread* [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage. 2017-09-05 3:29 [PATCH 0/2] Enable IOMMU for CSMM Jiewen Yao @ 2017-09-05 3:29 ` Jiewen Yao 2017-09-06 2:14 ` Zeng, Star 2017-09-05 3:29 ` [PATCH 2/2] IntelFramdworkModulePkg/LegacyBios: Add IoMmu Support Jiewen Yao 2017-09-05 4:27 ` [PATCH 0/2] Enable IOMMU for CSMM Zeng, Star 2 siblings, 1 reply; 6+ messages in thread From: Jiewen Yao @ 2017-09-05 3:29 UTC (permalink / raw) To: edk2-devel; +Cc: Star Zeng Remove zero address check in IoMmuMap. The reason is that a CSM legacy driver may use legacy memory for DMA. As such, the legacyBios need allow below 1M to the legacy device. This patch also fixed some typo. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> --- IntelSiliconPkg/IntelVTdDxe/BmDma.c | 8 ++++---- IntelSiliconPkg/IntelVTdDxe/TranslationTable.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/IntelSiliconPkg/IntelVTdDxe/BmDma.c b/IntelSiliconPkg/IntelVTdDxe/BmDma.c index 5dcee00..7a5f361 100644 --- a/IntelSiliconPkg/IntelVTdDxe/BmDma.c +++ b/IntelSiliconPkg/IntelVTdDxe/BmDma.c @@ -77,14 +77,14 @@ IoMmuMap ( EFI_PHYSICAL_ADDRESS DmaMemoryTop; BOOLEAN NeedRemap; - DEBUG ((DEBUG_VERBOSE, "IoMmuMap: ==> 0x%08x - 0x%08x (%x)\n", HostAddress, NumberOfBytes, Operation)); - - if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == NULL || + if (NumberOfBytes == NULL || DeviceAddress == NULL || Mapping == NULL) { DEBUG ((DEBUG_ERROR, "IoMmuMap: %r\n", EFI_INVALID_PARAMETER)); return EFI_INVALID_PARAMETER; } + DEBUG ((DEBUG_VERBOSE, "IoMmuMap: ==> 0x%08x - 0x%08x (%x)\n", HostAddress, *NumberOfBytes, Operation)); + // // Make sure that Operation is valid // @@ -135,7 +135,7 @@ IoMmuMap ( if (NeedRemap) { // // Common Buffer operations can not be remapped. If the common buffer - // if above 4GB, then it is not possible to generate a mapping, so return + // is above 4GB, then it is not possible to generate a mapping, so return // an error. // DEBUG ((DEBUG_ERROR, "IoMmuMap: %r\n", EFI_UNSUPPORTED)); diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c index cd3111c..ccecc95 100644 --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c @@ -891,7 +891,7 @@ SetAccessAttribute ( SecondLevelPagingEntry = NULL; - DEBUG ((DEBUG_INFO,"SetAccessAttribute (S%04x B%02x D%02x F%02x) (0x%016lx - 0x%08x, %x)\n", Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function, BaseAddress, (UINTN)Length, IoMmuAccess)); + DEBUG ((DEBUG_VERBOSE,"SetAccessAttribute (S%04x B%02x D%02x F%02x) (0x%016lx - 0x%08x, %x)\n", Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function, BaseAddress, (UINTN)Length, IoMmuAccess)); VtdIndex = FindVtdIndexByPciDevice (Segment, SourceId, &ExtContextEntry, &ContextEntry); if (VtdIndex == (UINTN)-1) { -- 2.7.4.windows.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage. 2017-09-05 3:29 ` [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage Jiewen Yao @ 2017-09-06 2:14 ` Zeng, Star 2017-09-06 4:04 ` Yao, Jiewen 0 siblings, 1 reply; 6+ messages in thread From: Zeng, Star @ 2017-09-06 2:14 UTC (permalink / raw) To: Yao, Jiewen, edk2-devel@lists.01.org; +Cc: Zeng, Star How about we also enhance the debug message like below? if (HasError) { DEBUG((DEBUG_INFO, "#### ERROR ####\n")); DumpVtdRegs (Num); DEBUG((DEBUG_INFO, "#### ERROR ####\n")); } -> if (HasError) { DEBUG((DEBUG_INFO, "\n#### ERROR ####\n")); DumpVtdRegs (Num); DEBUG((DEBUG_INFO, "#### ERROR ####\n\n")); } Then the error message could be at a separated block for easy understanding. Thanks, Star -----Original Message----- From: Yao, Jiewen Sent: Tuesday, September 5, 2017 11:30 AM To: edk2-devel@lists.01.org Cc: Zeng, Star <star.zeng@intel.com> Subject: [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage. Remove zero address check in IoMmuMap. The reason is that a CSM legacy driver may use legacy memory for DMA. As such, the legacyBios need allow below 1M to the legacy device. This patch also fixed some typo. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> --- IntelSiliconPkg/IntelVTdDxe/BmDma.c | 8 ++++---- IntelSiliconPkg/IntelVTdDxe/TranslationTable.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/IntelSiliconPkg/IntelVTdDxe/BmDma.c b/IntelSiliconPkg/IntelVTdDxe/BmDma.c index 5dcee00..7a5f361 100644 --- a/IntelSiliconPkg/IntelVTdDxe/BmDma.c +++ b/IntelSiliconPkg/IntelVTdDxe/BmDma.c @@ -77,14 +77,14 @@ IoMmuMap ( EFI_PHYSICAL_ADDRESS DmaMemoryTop; BOOLEAN NeedRemap; - DEBUG ((DEBUG_VERBOSE, "IoMmuMap: ==> 0x%08x - 0x%08x (%x)\n", HostAddress, NumberOfBytes, Operation)); - - if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == NULL || + if (NumberOfBytes == NULL || DeviceAddress == NULL || Mapping == NULL) { DEBUG ((DEBUG_ERROR, "IoMmuMap: %r\n", EFI_INVALID_PARAMETER)); return EFI_INVALID_PARAMETER; } + DEBUG ((DEBUG_VERBOSE, "IoMmuMap: ==> 0x%08x - 0x%08x (%x)\n", + HostAddress, *NumberOfBytes, Operation)); + // // Make sure that Operation is valid // @@ -135,7 +135,7 @@ IoMmuMap ( if (NeedRemap) { // // Common Buffer operations can not be remapped. If the common buffer - // if above 4GB, then it is not possible to generate a mapping, so return + // is above 4GB, then it is not possible to generate a mapping, + so return // an error. // DEBUG ((DEBUG_ERROR, "IoMmuMap: %r\n", EFI_UNSUPPORTED)); diff --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c index cd3111c..ccecc95 100644 --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c @@ -891,7 +891,7 @@ SetAccessAttribute ( SecondLevelPagingEntry = NULL; - DEBUG ((DEBUG_INFO,"SetAccessAttribute (S%04x B%02x D%02x F%02x) (0x%016lx - 0x%08x, %x)\n", Segment, SourceId.Bits.Bus, SourceId.Bits.Device, SourceId.Bits.Function, BaseAddress, (UINTN)Length, IoMmuAccess)); + DEBUG ((DEBUG_VERBOSE,"SetAccessAttribute (S%04x B%02x D%02x F%02x) + (0x%016lx - 0x%08x, %x)\n", Segment, SourceId.Bits.Bus, + SourceId.Bits.Device, SourceId.Bits.Function, BaseAddress, + (UINTN)Length, IoMmuAccess)); VtdIndex = FindVtdIndexByPciDevice (Segment, SourceId, &ExtContextEntry, &ContextEntry); if (VtdIndex == (UINTN)-1) { -- 2.7.4.windows.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage. 2017-09-06 2:14 ` Zeng, Star @ 2017-09-06 4:04 ` Yao, Jiewen 0 siblings, 0 replies; 6+ messages in thread From: Yao, Jiewen @ 2017-09-06 4:04 UTC (permalink / raw) To: Zeng, Star, edk2-devel@lists.01.org Good suggestion. It can make error message more readable. > -----Original Message----- > From: Zeng, Star > Sent: Wednesday, September 6, 2017 10:14 AM > To: Yao, Jiewen <jiewen.yao@intel.com>; edk2-devel@lists.01.org > Cc: Zeng, Star <star.zeng@intel.com> > Subject: RE: [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage. > > How about we also enhance the debug message like below? > > if (HasError) { > DEBUG((DEBUG_INFO, "#### ERROR ####\n")); > DumpVtdRegs (Num); > DEBUG((DEBUG_INFO, "#### ERROR ####\n")); > } > > -> > > if (HasError) { > DEBUG((DEBUG_INFO, "\n#### ERROR ####\n")); > DumpVtdRegs (Num); > DEBUG((DEBUG_INFO, "#### ERROR ####\n\n")); > } > > Then the error message could be at a separated block for easy understanding. > > > Thanks, > Star > -----Original Message----- > From: Yao, Jiewen > Sent: Tuesday, September 5, 2017 11:30 AM > To: edk2-devel@lists.01.org > Cc: Zeng, Star <star.zeng@intel.com> > Subject: [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage. > > Remove zero address check in IoMmuMap. > The reason is that a CSM legacy driver may use legacy memory for DMA. > As such, the legacyBios need allow below 1M to the legacy device. > > This patch also fixed some typo. > > Cc: Star Zeng <star.zeng@intel.com> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> > --- > IntelSiliconPkg/IntelVTdDxe/BmDma.c | 8 ++++---- > IntelSiliconPkg/IntelVTdDxe/TranslationTable.c | 2 +- > 2 files changed, 5 insertions(+), 5 deletions(-) > > diff --git a/IntelSiliconPkg/IntelVTdDxe/BmDma.c > b/IntelSiliconPkg/IntelVTdDxe/BmDma.c > index 5dcee00..7a5f361 100644 > --- a/IntelSiliconPkg/IntelVTdDxe/BmDma.c > +++ b/IntelSiliconPkg/IntelVTdDxe/BmDma.c > @@ -77,14 +77,14 @@ IoMmuMap ( > EFI_PHYSICAL_ADDRESS DmaMemoryTop; > BOOLEAN NeedRemap; > > - DEBUG ((DEBUG_VERBOSE, "IoMmuMap: ==> 0x%08x - 0x%08x (%x)\n", > HostAddress, NumberOfBytes, Operation)); > - > - if (HostAddress == NULL || NumberOfBytes == NULL || DeviceAddress == > NULL || > + if (NumberOfBytes == NULL || DeviceAddress == NULL || > Mapping == NULL) { > DEBUG ((DEBUG_ERROR, "IoMmuMap: %r\n", EFI_INVALID_PARAMETER)); > return EFI_INVALID_PARAMETER; > } > > + DEBUG ((DEBUG_VERBOSE, "IoMmuMap: ==> 0x%08x - 0x%08x (%x)\n", > + HostAddress, *NumberOfBytes, Operation)); > + > // > // Make sure that Operation is valid > // > @@ -135,7 +135,7 @@ IoMmuMap ( > if (NeedRemap) { > // > // Common Buffer operations can not be remapped. If the common > buffer > - // if above 4GB, then it is not possible to generate a mapping, so return > + // is above 4GB, then it is not possible to generate a mapping, > + so return > // an error. > // > DEBUG ((DEBUG_ERROR, "IoMmuMap: %r\n", EFI_UNSUPPORTED)); diff > --git a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c > b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c > index cd3111c..ccecc95 100644 > --- a/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c > +++ b/IntelSiliconPkg/IntelVTdDxe/TranslationTable.c > @@ -891,7 +891,7 @@ SetAccessAttribute ( > > SecondLevelPagingEntry = NULL; > > - DEBUG ((DEBUG_INFO,"SetAccessAttribute (S%04x B%02x D%02x F%02x) > (0x%016lx - 0x%08x, %x)\n", Segment, SourceId.Bits.Bus, SourceId.Bits.Device, > SourceId.Bits.Function, BaseAddress, (UINTN)Length, IoMmuAccess)); > + DEBUG ((DEBUG_VERBOSE,"SetAccessAttribute (S%04x B%02x D%02x F%02x) > + (0x%016lx - 0x%08x, %x)\n", Segment, SourceId.Bits.Bus, > + SourceId.Bits.Device, SourceId.Bits.Function, BaseAddress, > + (UINTN)Length, IoMmuAccess)); > > VtdIndex = FindVtdIndexByPciDevice (Segment, SourceId, &ExtContextEntry, > &ContextEntry); > if (VtdIndex == (UINTN)-1) { > -- > 2.7.4.windows.1 ^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH 2/2] IntelFramdworkModulePkg/LegacyBios: Add IoMmu Support. 2017-09-05 3:29 [PATCH 0/2] Enable IOMMU for CSMM Jiewen Yao 2017-09-05 3:29 ` [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage Jiewen Yao @ 2017-09-05 3:29 ` Jiewen Yao 2017-09-05 4:27 ` [PATCH 0/2] Enable IOMMU for CSMM Zeng, Star 2 siblings, 0 replies; 6+ messages in thread From: Jiewen Yao @ 2017-09-05 3:29 UTC (permalink / raw) To: edk2-devel; +Cc: Star Zeng If IOMMU is enabled, the legacy BIOS need allow the legacy memory access by the legacy device. The legacy memory is below 1M memory and HighPmm memory. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> --- IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf | 1 + IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h | 1 + IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c | 72 +++++++++++++++++++- 3 files changed, 73 insertions(+), 1 deletion(-) diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf index 4ca412a..48473a0 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf @@ -137,6 +137,7 @@ gEfiLegacyBiosProtocolGuid ## PRODUCES gEfiSerialIoProtocolGuid ## CONSUMES gEfiSioProtocolGuid ## CONSUMES + gEdkiiIoMmuProtocolGuid ## CONSUMES [Pcd] gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLegacyBiosCacheLegacyRegion ## CONSUMES diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h index 069646b..fe9dd74 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h @@ -47,6 +47,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include <Protocol/PciRootBridgeIo.h> #include <Protocol/SerialIo.h> #include <Protocol/SuperIo.h> +#include <Protocol/IoMmu.h> #include <Library/BaseLib.h> #include <Library/DebugLib.h> diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c index c4c77ec..8ffdf0c 100644 --- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c +++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c @@ -41,7 +41,7 @@ BOOLEAN mIgnoreBbsUpdateFlag; BOOLEAN mVgaInstallationInProgress = FALSE; UINT32 mRomCount = 0x00; ROM_INSTANCE_ENTRY mRomEntry[ROM_MAX_ENTRIES]; - +EDKII_IOMMU_PROTOCOL *mIoMmu; /** Query shadowed legacy ROM parameters registered by RomShadow() previously. @@ -2697,6 +2697,61 @@ Done: } /** + Let IOMMU grant DMA access for the PCI device. + + @param PciHandle The EFI handle for the PCI device. + @param HostAddress The system memory address to map to the PCI controller. + @param NumberOfBytes The number of bytes to map. + + @retval EFI_SUCCESS The DMA access is granted. +**/ +EFI_STATUS +IoMmuGrantAccess ( + IN EFI_HANDLE PciHandle, + IN EFI_PHYSICAL_ADDRESS HostAddress, + IN UINTN NumberOfBytes + ) +{ + EFI_PHYSICAL_ADDRESS DeviceAddress; + VOID *Mapping; + EFI_STATUS Status; + + if (PciHandle == NULL) { + return EFI_UNSUPPORTED; + } + + Status = EFI_SUCCESS; + if (mIoMmu == NULL) { + gBS->LocateProtocol (&gEdkiiIoMmuProtocolGuid, NULL, (VOID **)&mIoMmu); + } + if (mIoMmu != NULL) { + Status = mIoMmu->Map ( + mIoMmu, + EdkiiIoMmuOperationBusMasterCommonBuffer, + (VOID *)(UINTN)HostAddress, + &NumberOfBytes, + &DeviceAddress, + &Mapping + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "LegacyPci - IoMmuMap - %r\n", Status)); + } else { + ASSERT (DeviceAddress == HostAddress); + Status = mIoMmu->SetAttribute ( + mIoMmu, + PciHandle, + Mapping, + EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "LegacyPci - IoMmuSetAttribute - %r\n", Status)); + } + } + } + return Status; +} + +/** Load a legacy PC-AT OPROM on the PciHandle device. Return information about how many disks were added by the OPROM and the shadow address and size. DiskStart & DiskEnd are INT 13h drive letters. Thus 0x80 is C: @@ -2978,6 +3033,21 @@ LegacyBiosInstallPciRom ( RuntimeImageLength = Pcir->MaxRuntimeImageLength * 512; } } + + // + // Grant access for below 1M + // BDA/EBDA/LowPMM and scratch memory for OPROM. + // + IoMmuGrantAccess (PciHandle, 0, SIZE_1MB); + // + // Grant access for HiPmm + // + IoMmuGrantAccess ( + PciHandle, + Private->IntThunk->EfiToLegacy16InitTable.HiPmmMemory, + Private->IntThunk->EfiToLegacy16InitTable.HiPmmMemorySizeInBytes + ); + // // Shadow and initialize the OpROM. // -- 2.7.4.windows.1 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH 0/2] Enable IOMMU for CSMM 2017-09-05 3:29 [PATCH 0/2] Enable IOMMU for CSMM Jiewen Yao 2017-09-05 3:29 ` [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage Jiewen Yao 2017-09-05 3:29 ` [PATCH 2/2] IntelFramdworkModulePkg/LegacyBios: Add IoMmu Support Jiewen Yao @ 2017-09-05 4:27 ` Zeng, Star 2 siblings, 0 replies; 6+ messages in thread From: Zeng, Star @ 2017-09-05 4:27 UTC (permalink / raw) To: Yao, Jiewen, edk2-devel@lists.01.org; +Cc: Zeng, Star Reviewed-by: Star Zeng <star.zeng@intel.com> -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Jiewen Yao Sent: Tuesday, September 5, 2017 11:30 AM To: edk2-devel@lists.01.org Subject: [edk2] [PATCH 0/2] Enable IOMMU for CSMM This serial patch is to enable IOMMU support for CSM. Jiewen Yao (2): IntelSiliconPkg/Vtd: Support CSM usage. IntelFramdworkModulePkg/LegacyBios: Add IoMmu Support. IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosDxe.inf | 1 + IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h | 1 + IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyPci.c | 72 +++++++++++++++++++- IntelSiliconPkg/IntelVTdDxe/BmDma.c | 8 +-- IntelSiliconPkg/IntelVTdDxe/TranslationTable.c | 2 +- 5 files changed, 78 insertions(+), 6 deletions(-) -- 2.7.4.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2017-09-06 4:01 UTC | newest] Thread overview: 6+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2017-09-05 3:29 [PATCH 0/2] Enable IOMMU for CSMM Jiewen Yao 2017-09-05 3:29 ` [PATCH 1/2] IntelSiliconPkg/Vtd: Support CSM usage Jiewen Yao 2017-09-06 2:14 ` Zeng, Star 2017-09-06 4:04 ` Yao, Jiewen 2017-09-05 3:29 ` [PATCH 2/2] IntelFramdworkModulePkg/LegacyBios: Add IoMmu Support Jiewen Yao 2017-09-05 4:27 ` [PATCH 0/2] Enable IOMMU for CSMM Zeng, Star
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