From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id D223321E94617 for ; Tue, 19 Sep 2017 23:27:36 -0700 (PDT) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga104.jf.intel.com with ESMTP; 19 Sep 2017 23:30:42 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,420,1500966000"; d="scan'208";a="130564900" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga004.jf.intel.com with ESMTP; 19 Sep 2017 23:30:41 -0700 Received: from fmsmsx113.amr.corp.intel.com (10.18.116.7) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 19 Sep 2017 23:30:41 -0700 Received: from shsmsx151.ccr.corp.intel.com (10.239.6.50) by FMSMSX113.amr.corp.intel.com (10.18.116.7) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 19 Sep 2017 23:30:41 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.175]) by SHSMSX151.ccr.corp.intel.com ([169.254.3.98]) with mapi id 14.03.0319.002; Wed, 20 Sep 2017 14:30:39 +0800 From: "Zeng, Star" To: "Yao, Jiewen" , "edk2-devel@lists.01.org" CC: "Zeng, Star" Thread-Topic: [PATCH 0/3] IntelSiliconPkg/InteVTdPei: Add RMRR support in PEI Thread-Index: AQHTL3sorymAHqlcDE6SMxrT24KkYqK9SZPg Date: Wed, 20 Sep 2017 06:30:39 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103B97694E@shsmsx102.ccr.corp.intel.com> References: <1505628407-7368-1-git-send-email-jiewen.yao@intel.com> In-Reply-To: <1505628407-7368-1-git-send-email-jiewen.yao@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 0/3] IntelSiliconPkg/InteVTdPei: Add RMRR support in PEI X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 20 Sep 2017 06:27:37 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Minor comments added for separated patches, with that fixed, Reviewed-by: S= tar Zeng Thanks, Star -----Original Message----- From: Yao, Jiewen=20 Sent: Sunday, September 17, 2017 2:07 PM To: edk2-devel@lists.01.org Cc: Zeng, Star Subject: [PATCH 0/3] IntelSiliconPkg/InteVTdPei: Add RMRR support in PEI We notice that there is real usage in PEI to show the graphic output. The Integrated Graphic Device is blocked by current IntelVTdPei because the= DMA buffer is fully controlled by VTd PEIM. The UMA is not allowed. In DXE phase, the UMA is reported via RMRR table. As such, we need similar way in PEI to let VTd PEI get the RMRR information= . This series patch resolves this problem. We also updated sample driver to show how to get the RMRR information. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao Jiewen Yao (3): IntelSiliconPkg/VTdInfoPpi: Let it follow DMAR table. IntelSiliconPkg/IntelVTdPmrPei: Parse RMRR table. IntelSiliconPkg/VTdInfoSample: Add RMRR table. IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmr.c = | 52 +- IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c = | 581 +++++++++++++++++++- IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.h = | 20 +- IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSample= Pei.c | 156 +++++- IntelSiliconPkg/Feature/VTd/PlatformVTdInfoSamplePei/PlatformVTdInfoSample= Pei.inf | 3 + IntelSiliconPkg/Include/Ppi/VtdInfo.h = | 26 +- 6 files changed, 788 insertions(+), 50 deletions(-) -- 2.7.4.windows.1