From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 37A1B21E1B769 for ; Thu, 21 Sep 2017 21:19:16 -0700 (PDT) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 21 Sep 2017 21:22:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,426,1500966000"; d="scan'208";a="138171730" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by orsmga002.jf.intel.com with ESMTP; 21 Sep 2017 21:22:22 -0700 Received: from fmsmsx114.amr.corp.intel.com (10.18.116.8) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 21 Sep 2017 21:22:22 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX114.amr.corp.intel.com (10.18.116.8) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 21 Sep 2017 21:22:22 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.175]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.159]) with mapi id 14.03.0319.002; Fri, 22 Sep 2017 12:22:20 +0800 From: "Zeng, Star" To: "Yao, Jiewen" , "edk2-devel@lists.01.org" CC: "Zeng, Star" Thread-Topic: [PATCH 3/3] IntelSiliconPkg/VTdPmrPei: Add EndOfPei callback for S3 Thread-Index: AQHTM1UpXC4sZTdJdU+pdSnZKUXSHqLATXTg Date: Fri, 22 Sep 2017 04:22:20 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103B9788FC@shsmsx102.ccr.corp.intel.com> References: <1506051885-21008-1-git-send-email-jiewen.yao@intel.com> <1506051885-21008-4-git-send-email-jiewen.yao@intel.com> In-Reply-To: <1506051885-21008-4-git-send-email-jiewen.yao@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 3/3] IntelSiliconPkg/VTdPmrPei: Add EndOfPei callback for S3 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 22 Sep 2017 04:19:16 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Is the code comment correct? + // + // Register EndOfPei Notify for S3 to run FSP NotifyPhase + // Should the "VTdPrm" be "VTdPmr"? If checking the bootmode in entrypoint, should add gEfiPeiMasterBootModePpi= Guid in the depex or not? Thanks, Star -----Original Message----- From: Yao, Jiewen=20 Sent: Friday, September 22, 2017 11:45 AM To: edk2-devel@lists.01.org Cc: Zeng, Star Subject: [PATCH 3/3] IntelSiliconPkg/VTdPmrPei: Add EndOfPei callback for S= 3 In S3 resume, before system transfer to waking vector, the VTdPrm need turn off VTd protection based upon VTdPolicy. Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao --- IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c | 59 +++++++= ++++++++++++- IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf | 1 + 2 files changed, 58 insertions(+), 2 deletions(-) diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c b/= IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c index e768274..3fe6d65 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.c @@ -24,16 +24,18 @@ #include #include #include +#include =20 #include "IntelVTdPmrPei.h" =20 #define TOTAL_DMA_BUFFER_SIZE SIZE_4MB +#define TOTAL_DMA_BUFFER_SIZE_S3 SIZE_1MB =20 EFI_ACPI_DMAR_HEADER *mAcpiDmarTable; VTD_INFO *mVTdInfo; UINT64 mEngineMask; UINTN mDmaBufferBase; -UINTN mDmaBufferSize =3D TOTAL_DMA_BUFFER_SIZE= ; +UINTN mDmaBufferSize; UINTN mDmaBufferCurrentTop; UINTN mDmaBufferCurrentBottom; =20 @@ -544,6 +546,7 @@ InitDmaProtection ( } ASSERT (DmaBufferSize =3D=3D ALIGN_VALUE(DmaBufferSize, MemoryAlignment)= ); *DmaBufferBase =3D (UINTN)AllocateAlignedPages (EFI_SIZE_TO_PAGES(DmaBuf= ferSize), MemoryAlignment); + ASSERT (*DmaBufferBase !=3D 0); if (*DmaBufferBase =3D=3D 0) { DEBUG ((DEBUG_INFO, " InitDmaProtection : OutOfResource\n")); return EFI_OUT_OF_RESOURCES; @@ -1105,6 +1108,41 @@ ParseDmarAcpiTableRmrr ( } =20 /** + This function handles S3 resume task at the end of PEI + + @param[in] PeiServices Pointer to PEI Services Table. + @param[in] NotifyDesc Pointer to the descriptor for the Notification= event that + caused this function to execute. + @param[in] Ppi Pointer to the PPI data associated with this f= unction. + + @retval EFI_STATUS Always return EFI_SUCCESS +**/ +EFI_STATUS +EFIAPI +S3EndOfPeiNotify( + IN EFI_PEI_SERVICES **PeiServices, + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc, + IN VOID *Ppi + ) +{ + UINT64 EngineMask; + + DEBUG((DEBUG_INFO, "VTdPmr S3EndOfPeiNotify\n")); + + if ((PcdGet8(PcdVTdPolicyPropertyMask) & BIT1) =3D=3D 0) { + EngineMask =3D LShiftU64 (1, mVTdInfo->VTdEngineCount) - 1; + DisableDmaProtection (EngineMask); + } + return EFI_SUCCESS; +} + +EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc =3D { + (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINA= TE_LIST), + &gEfiEndOfPeiSignalPpiGuid, + S3EndOfPeiNotify +}; + +/** Initializes the Intel VTd PMR PEIM. =20 @param FileHandle Handle of the file being invoked. @@ -1122,11 +1160,14 @@ IntelVTdPmrInitialize ( ) { EFI_STATUS Status; + EFI_BOOT_MODE BootMode; =20 if ((PcdGet8(PcdVTdPolicyPropertyMask) & BIT0) =3D=3D 0) { return EFI_UNSUPPORTED; } =20 + PeiServicesGetBootMode (&BootMode); + Status =3D PeiServicesLocatePpi ( &gEdkiiVTdInfoPpiGuid, 0, @@ -1150,6 +1191,13 @@ IntelVTdPmrInitialize ( // ParseDmarAcpiTableRmrr (); =20 + if (BootMode =3D=3D BOOT_ON_S3_RESUME) { + mDmaBufferSize =3D TOTAL_DMA_BUFFER_SIZE_S3; + } else { + mDmaBufferSize =3D TOTAL_DMA_BUFFER_SIZE; + } + DEBUG ((DEBUG_INFO, " DmaBufferSize : 0x%x\n", mDmaBufferSize)); + // // Find a pre-memory in resource hob as DMA buffer // Mark PEI memory to be DMA protected. @@ -1160,7 +1208,6 @@ IntelVTdPmrInitialize ( } =20 DEBUG ((DEBUG_INFO, " DmaBufferBase : 0x%x\n", mDmaBufferBase)); - DEBUG ((DEBUG_INFO, " DmaBufferSize : 0x%x\n", mDmaBufferSize)); =20 mDmaBufferCurrentTop =3D mDmaBufferBase + mDmaBufferSize; mDmaBufferCurrentBottom =3D mDmaBufferBase; @@ -1171,6 +1218,14 @@ IntelVTdPmrInitialize ( Status =3D PeiServicesInstallPpi (&mIoMmuPpiList); ASSERT_EFI_ERROR(Status); =20 + // + // Register EndOfPei Notify for S3 to run FSP NotifyPhase + // + if (BootMode =3D=3D BOOT_ON_S3_RESUME) { + Status =3D PeiServicesNotifyPpi (&mS3EndOfPeiNotifyDesc); + ASSERT_EFI_ERROR (Status); + } + return Status; } =20 diff --git a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf = b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf index 86cd7d1..e1aa980 100644 --- a/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf +++ b/IntelSiliconPkg/Feature/VTd/IntelVTdPmrPei/IntelVTdPmrPei.inf @@ -46,6 +46,7 @@ [Ppis] gEdkiiIoMmuPpiGuid ## PRODUCES gEdkiiVTdInfoPpiGuid ## CONSUMES + gEfiEndOfPeiSignalPpiGuid ## CONSUMES =20 [Pcd] gIntelSiliconPkgTokenSpaceGuid.PcdVTdPolicyPropertyMask ## CONSUMES --=20 2.7.4.windows.1