From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.20; helo=mga02.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A4D782220D21B for ; Tue, 9 Jan 2018 21:32:28 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Jan 2018 21:37:40 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,338,1511856000"; d="scan'208";a="22817672" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga001.jf.intel.com with ESMTP; 09 Jan 2018 21:37:39 -0800 Received: from fmsmsx125.amr.corp.intel.com (10.18.125.40) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 9 Jan 2018 21:37:39 -0800 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by FMSMSX125.amr.corp.intel.com (10.18.125.40) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 9 Jan 2018 21:37:39 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.189]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.159]) with mapi id 14.03.0319.002; Wed, 10 Jan 2018 13:37:36 +0800 From: "Zeng, Star" To: "Gao, Liming" , "edk2-devel@lists.01.org" CC: "Zeng, Star" Thread-Topic: [Patch 1/2] MdeModulePkg DxeIpl: remove the hard code alignment adjustment. Thread-Index: AQHTidSXWWU8DEfoDkeSFXQHyEnDyKNsllPw Date: Wed, 10 Jan 2018 05:37:35 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103B9F99FB@shsmsx102.ccr.corp.intel.com> References: <1515562410-2820-1-git-send-email-liming.gao@intel.com> <1515562410-2820-2-git-send-email-liming.gao@intel.com> In-Reply-To: <1515562410-2820-2-git-send-email-liming.gao@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch 1/2] MdeModulePkg DxeIpl: remove the hard code alignment adjustment. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Jan 2018 05:32:29 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Liming, Similar change should be also done in Decompress() of DxeLoad.c, right? Thanks, Star -----Original Message----- From: Gao, Liming=20 Sent: Wednesday, January 10, 2018 1:33 PM To: edk2-devel@lists.01.org Cc: Zeng, Star Subject: [Patch 1/2] MdeModulePkg DxeIpl: remove the hard code alignment ad= justment. Section data alignment should be made in the build generation. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Liming Gao Cc: Star Zeng --- MdeModulePkg/Core/DxeIplPeim/DxeLoad.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeLoad.c b/MdeModulePkg/Core/Dxe= IplPeim/DxeLoad.c index 1f626a9..f4d7528 100644 --- a/MdeModulePkg/Core/DxeIplPeim/DxeLoad.c +++ b/MdeModulePkg/Core/DxeIplPeim/DxeLoad.c @@ -3,7 +3,7 @@ Responsibility of this module is to load the DXE Core from a Firmware Vo= lume. =20 Copyright (c) 2016 HP Development Company, L.P. -Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made availab= le under the terms and conditions of the BSD License which accompanies thi= s distribution. The full text of the license may be found at @@ -593,16 +5= 93,11 @@ CustomGuidedSectionExtract ( // // Allocate output buffer // - *OutputBuffer =3D AllocatePages (EFI_SIZE_TO_PAGES (OutputBufferSize) = + 1); + *OutputBuffer =3D AllocatePages (EFI_SIZE_TO_PAGES=20 + (OutputBufferSize)); if (*OutputBuffer =3D=3D NULL) { return EFI_OUT_OF_RESOURCES; } DEBUG ((DEBUG_INFO, "Customized Guided section Memory Size required is= 0x%x and address is 0x%p\n", OutputBufferSize, *OutputBuffer)); - // - // *OutputBuffer still is one section. Adjust *OutputBuffer offset,=20 - // skip EFI section header to make section data at page alignment. - // - *OutputBuffer =3D (VOID *)((UINT8 *) *OutputBuffer + EFI_PAGE_SIZE - s= izeof (EFI_COMMON_SECTION_HEADER)); } =20 Status =3D ExtractGuidedSectionDecode ( -- 2.8.0.windows.1