From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.100; helo=mga07.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id A872A21F833D0 for ; Tue, 9 Jan 2018 21:41:22 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Jan 2018 21:46:34 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,338,1511856000"; d="scan'208";a="22819457" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga001.jf.intel.com with ESMTP; 09 Jan 2018 21:46:33 -0800 Received: from fmsmsx158.amr.corp.intel.com (10.18.116.75) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 9 Jan 2018 21:46:33 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx158.amr.corp.intel.com (10.18.116.75) with Microsoft SMTP Server (TLS) id 14.3.319.2; Tue, 9 Jan 2018 21:46:33 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.189]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.213]) with mapi id 14.03.0319.002; Wed, 10 Jan 2018 13:46:31 +0800 From: "Zeng, Star" To: "Gao, Liming" , "edk2-devel@lists.01.org" CC: "Zeng, Star" Thread-Topic: [Patch 1/2] MdeModulePkg DxeIpl: remove the hard code alignment adjustment. Thread-Index: AQHTidSXWWU8DEfoDkeSFXQHyEnDyKNsllPw//96vwCAAIfj8A== Date: Wed, 10 Jan 2018 05:46:30 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103B9F9A4E@shsmsx102.ccr.corp.intel.com> References: <1515562410-2820-1-git-send-email-liming.gao@intel.com> <1515562410-2820-2-git-send-email-liming.gao@intel.com> <0C09AFA07DD0434D9E2A0C6AEB0483103B9F99FB@shsmsx102.ccr.corp.intel.com> <4A89E2EF3DFEDB4C8BFDE51014F606A14E1A11A0@SHSMSX104.ccr.corp.intel.com> In-Reply-To: <4A89E2EF3DFEDB4C8BFDE51014F606A14E1A11A0@SHSMSX104.ccr.corp.intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [Patch 1/2] MdeModulePkg DxeIpl: remove the hard code alignment adjustment. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Jan 2018 05:41:23 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Ok, Reviewed-by: Star Zeng Thanks, Star -----Original Message----- From: Gao, Liming=20 Sent: Wednesday, January 10, 2018 1:40 PM To: Zeng, Star ; edk2-devel@lists.01.org Subject: RE: [Patch 1/2] MdeModulePkg DxeIpl: remove the hard code alignmen= t adjustment. Star: Right. I will send the separate patch for it.=20 >-----Original Message----- >From: Zeng, Star >Sent: Wednesday, January 10, 2018 1:38 PM >To: Gao, Liming ; edk2-devel@lists.01.org >Cc: Zeng, Star >Subject: RE: [Patch 1/2] MdeModulePkg DxeIpl: remove the hard code=20 >alignment adjustment. > >Liming, > >Similar change should be also done in Decompress() of DxeLoad.c, right? > > >Thanks, >Star >-----Original Message----- >From: Gao, Liming >Sent: Wednesday, January 10, 2018 1:33 PM >To: edk2-devel@lists.01.org >Cc: Zeng, Star >Subject: [Patch 1/2] MdeModulePkg DxeIpl: remove the hard code=20 >alignment adjustment. > >Section data alignment should be made in the build generation. > >Contributed-under: TianoCore Contribution Agreement 1.1 >Signed-off-by: Liming Gao >Cc: Star Zeng >--- > MdeModulePkg/Core/DxeIplPeim/DxeLoad.c | 9 ++------- > 1 file changed, 2 insertions(+), 7 deletions(-) > >diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeLoad.c >b/MdeModulePkg/Core/DxeIplPeim/DxeLoad.c >index 1f626a9..f4d7528 100644 >--- a/MdeModulePkg/Core/DxeIplPeim/DxeLoad.c >+++ b/MdeModulePkg/Core/DxeIplPeim/DxeLoad.c >@@ -3,7 +3,7 @@ > Responsibility of this module is to load the DXE Core from a=20 >Firmware Volume. > > Copyright (c) 2016 HP Development Company, L.P. >-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.
>+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
> This program and the accompanying materials are licensed and made=20 >available under the terms and conditions of the BSD License which=20 >accompanies this distribution. The full text of the license may be=20 >found at @@ -593,16 +593,11 @@ CustomGuidedSectionExtract ( > // > // Allocate output buffer > // >- *OutputBuffer =3D AllocatePages (EFI_SIZE_TO_PAGES (OutputBufferSize)= + >1); >+ *OutputBuffer =3D AllocatePages (EFI_SIZE_TO_PAGES=20 >+ (OutputBufferSize)); > if (*OutputBuffer =3D=3D NULL) { > return EFI_OUT_OF_RESOURCES; > } > DEBUG ((DEBUG_INFO, "Customized Guided section Memory Size=20 >required is 0x%x and address is 0x%p\n", OutputBufferSize, *OutputBuffer))= ; >- // >- // *OutputBuffer still is one section. Adjust *OutputBuffer offset, >- // skip EFI section header to make section data at page alignment. >- // >- *OutputBuffer =3D (VOID *)((UINT8 *) *OutputBuffer + EFI_PAGE_SIZE - >sizeof (EFI_COMMON_SECTION_HEADER)); > } > > Status =3D ExtractGuidedSectionDecode ( >-- >2.8.0.windows.1