From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Permerror (SPF Permanent Error: Void lookup limit of 2 exceeded) identity=mailfrom; client-ip=192.55.52.88; helo=mga01.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 94A9E222DDBF0 for ; Mon, 15 Jan 2018 02:13:14 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Jan 2018 02:18:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,363,1511856000"; d="scan'208";a="22225945" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by fmsmga001.fm.intel.com with ESMTP; 15 Jan 2018 02:18:32 -0800 Received: from fmsmsx101.amr.corp.intel.com (10.18.124.199) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 15 Jan 2018 02:18:31 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx101.amr.corp.intel.com (10.18.124.199) with Microsoft SMTP Server (TLS) id 14.3.319.2; Mon, 15 Jan 2018 02:18:30 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.189]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.213]) with mapi id 14.03.0319.002; Mon, 15 Jan 2018 18:18:29 +0800 From: "Zeng, Star" To: "Wang, Jian J" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" , "Ni, Ruiyu" , "Dong, Eric" , "Zeng, Star" Thread-Topic: [PATCH 5/6] MdeModulePkg/PiSmmCore: remove NX attr for SMM RAM Thread-Index: AQHTjd6LMJnXf7AaSU6C5LdSuw6gcaN0uI1g Date: Mon, 15 Jan 2018 10:18:28 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103B9FC30E@shsmsx102.ccr.corp.intel.com> References: <20180115085433.25008-1-jian.j.wang@intel.com> <20180115085433.25008-6-jian.j.wang@intel.com> In-Reply-To: <20180115085433.25008-6-jian.j.wang@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH 5/6] MdeModulePkg/PiSmmCore: remove NX attr for SMM RAM X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Jan 2018 10:13:15 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Star Zeng -----Original Message----- From: Wang, Jian J=20 Sent: Monday, January 15, 2018 4:55 PM To: edk2-devel@lists.01.org Cc: Yao, Jiewen ; Ni, Ruiyu ; Don= g, Eric ; Zeng, Star Subject: [PATCH 5/6] MdeModulePkg/PiSmmCore: remove NX attr for SMM RAM If PcdDxeNxMemoryProtectionPolicy is set to enable protection for memory of= EfiReservedMemoryType, the BIOS will hang at a page fault exception during= starting SMM driver. The root cause is that SMM RAM is type of EfiReservedMemoryType and marked = as non-executable. The fix is simply removing NX attribute for those memory= . Cc: Jiewen Yao Cc: Ruiyu Ni Cc: Eric Dong Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jian J Wang --- MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c b/MdeModulePkg/Core/PiS= mmCore/PiSmmIpl.c index a7663ca291..94d671bd74 100644 --- a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c +++ b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c @@ -1550,6 +1550,7 @@ SmmIplEntry ( EFI_CPU_ARCH_PROTOCOL *CpuArch; EFI_STATUS SetAttrStatus; EFI_SMRAM_DESCRIPTOR *SmramRangeSmmDriver; + EFI_GCD_MEMORY_SPACE_DESCRIPTOR MemDesc; =20 // // Fill in the image handle of the SMM IPL so the SMM Core can use this = as the @@ -1616,7 +1617,8 @@ SmmIplEntry ( =20 GetSmramCacheRange (mCurrentSmramRange, &mSmramCacheBase, &mSmramCache= Size); // - // If CPU AP is present, attempt to set SMRAM cacheability to WB + // If CPU AP is present, attempt to set SMRAM cacheability to WB and c= lear + // XP if it's set. // Note that it is expected that cacheability of SMRAM has been set to= WB if CPU AP // is not available here. // @@ -1630,7 +1632,19 @@ SmmIplEntry ( ); if (EFI_ERROR (Status)) { DEBUG ((DEBUG_WARN, "SMM IPL failed to set SMRAM window to EFI_MEM= ORY_WB\n")); - } =20 + } + + Status =3D gDS->GetMemorySpaceDescriptor( + mCurrentSmramRange->PhysicalStart, + &MemDesc + ); + if (!EFI_ERROR (Status) && (MemDesc.Attributes & EFI_MEMORY_XP) !=3D= 0) { + gDS->SetMemorySpaceAttributes ( + mCurrentSmramRange->PhysicalStart, + mCurrentSmramRange->PhysicalSize, + MemDesc.Attributes & (~EFI_MEMORY_XP) + ); + } } // // if Loading module at Fixed Address feature is enabled, save the SMR= AM base to Load -- 2.15.1.windows.2