From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.43; helo=mga05.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 59975203B992A for ; Thu, 17 May 2018 19:30:36 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 17 May 2018 19:30:35 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,413,1520924400"; d="scan'208";a="42213859" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga008.jf.intel.com with ESMTP; 17 May 2018 19:30:35 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 17 May 2018 19:30:34 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.79]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.240]) with mapi id 14.03.0319.002; Fri, 18 May 2018 10:30:32 +0800 From: "Zeng, Star" To: Marvin H?user , "edk2-devel@lists.01.org" CC: "Kinney, Michael D" , "Gao, Liming" , "Yao, Jiewen" , "Zeng, Star" Thread-Topic: [PATCH] MdePkg/Hpet: Add Event Timer Block ID definition. Thread-Index: AQHT7IPC73BiwYJ5j0qlJch2fSujo6QzIOmQgACuhlCAAPfYIA== Date: Fri, 18 May 2018 02:30:31 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103BAED45D@shsmsx102.ccr.corp.intel.com> References: <0C09AFA07DD0434D9E2A0C6AEB0483103BAECDF5@shsmsx102.ccr.corp.intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] MdePkg/Hpet: Add Event Timer Block ID definition. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 May 2018 02:30:36 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Got it. Good information. Thanks, Star -----Original Message----- From: Marvin H?user [mailto:Marvin.Haeuser@outlook.com]=20 Sent: Thursday, May 17, 2018 7:45 PM To: edk2-devel@lists.01.org Cc: Zeng, Star ; Kinney, Michael D ; Gao, Liming ; Yao, Jiewen Subject: RE: [PATCH] MdePkg/Hpet: Add Event Timer Block ID definition. Hey Star, Actually the definition added is part of the definition of the ACPI Table h= eader. I think there might be confusion because the first 32 bits match the first = 32 bits of the Capabilities register. However, they are defined separately and the ACPI field lacks the upper 32 = bits. Thanks, Marvin. > -----Original Message----- > From: Zeng, Star > Sent: Thursday, May 17, 2018 3:31 AM > To: Marvin.Haeuser@outlook.com; edk2-devel@lists.01.org > Cc: Kinney, Michael D ; Gao, Liming=20 > ; Yao, Jiewen ; Zeng, Star=20 > > Subject: RE: [PATCH] MdePkg/Hpet: Add Event Timer Block ID definition. >=20 > Was HighPrecisionEventTimerTable.h just created for ACPI related, but=20 > not for HPET register related? >=20 > We also see AlertStandardFormatTable.h, DmaRemappingReportingTable.h,=20 > etc. They are all ACPI related. > What is the criteria about including ACPI related, and including=20 > register/command/message related? > Should they be included in same header file, or separated header files? >=20 > We also see HEPT register related defined in=20 > PcAtChipsetPkg\Include\Register\Hpet.h. >=20 >=20 > Thanks, > Star > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of=20 > Marvin H?user > Sent: Wednesday, May 16, 2018 3:35 AM > To: edk2-devel@lists.01.org > Cc: Kinney, Michael D ; Gao, Liming=20 > > Subject: [edk2] [PATCH] MdePkg/Hpet: Add Event Timer Block ID definition. >=20 > This patch adds the HPET Event Timer Block ID definition that can be=20 > found in the IA-PC HPET Specification, section 3.2.4. >=20 > Contributed-under: TianoCore Contribution Agreement 1.1 > Signed-off-by: Marvin Haeuser > --- > MdePkg/Include/IndustryStandard/HighPrecisionEventTimerTable.h | 18 > +++++++++++++++++- > 1 file changed, 17 insertions(+), 1 deletion(-) >=20 > diff --git > a/MdePkg/Include/IndustryStandard/HighPrecisionEventTimerTable.h > b/MdePkg/Include/IndustryStandard/HighPrecisionEventTimerTable.h > index 0d83cd5335de..926445233944 100644 > --- a/MdePkg/Include/IndustryStandard/HighPrecisionEventTimerTable.h > +++ b/MdePkg/Include/IndustryStandard/HighPrecisionEventTimerTable.h > @@ -2,7 +2,7 @@ > ACPI high precision event timer table definition, at www.intel.com > Specification name is IA-PC HPET (High Precision Event Timers)=20 > Specification. >=20 > - Copyright (c) 2007 - 2008, Intel Corporation. All rights=20 > reserved.
> + Copyright (c) 2007 - 2018, Intel Corporation. All rights=20 > + reserved.
> This program and the accompanying materials > are licensed and made available under the terms and conditions of=20 > the BSD License > which accompanies this distribution. The full text of the license=20 > may be found at @@ -22,6 +22,22 @@ // #pragma pack(1) >=20 > +/// > +/// HPET Event Timer Block ID described in IA-PC HPET Specification, 3.2= .4. > +/// > +typedef union { > + struct { > + UINT32 Revision : 8; > + UINT32 NumberOfTimers : 5; > + UINT32 CounterSize : 1; > + UINT32 Reserved : 1; > + UINT32 LegacyRoute : 1; > + UINT32 VendorId : 16; > + } Bits; > + UINT32 Uint32; > +} EFI_ACPI_HIGH_PRECISION_EVENT_TIMER_BLOCK_ID; > + > + > /// > /// High Precision Event Timer Table header definition. > /// > -- > 2.17.0.windows.1 >=20 > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel