From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.120; helo=mga04.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 06345209831C3 for ; Fri, 13 Jul 2018 02:24:40 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jul 2018 02:24:39 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,347,1526367600"; d="scan'208";a="245400392" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga006.fm.intel.com with ESMTP; 13 Jul 2018 02:24:21 -0700 Received: from fmsmsx156.amr.corp.intel.com (10.18.116.74) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 13 Jul 2018 02:24:21 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by fmsmsx156.amr.corp.intel.com (10.18.116.74) with Microsoft SMTP Server (TLS) id 14.3.319.2; Fri, 13 Jul 2018 02:24:20 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.124]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.81]) with mapi id 14.03.0319.002; Fri, 13 Jul 2018 17:24:18 +0800 From: "Zeng, Star" To: Marvin H?user , "edk2-devel@lists.01.org" CC: "Dong, Eric" , "Cohen, Eugene" , "Gao, Liming" , "Zeng, Star" Thread-Topic: Inquiry regarding early DxeIplPeim loading. Thread-Index: AdQaNDyLZ2J/sHRiSC+kEdwPjgFgmQAVgqeA Date: Fri, 13 Jul 2018 09:24:18 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103BB82A5E@shsmsx102.ccr.corp.intel.com> References: In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: Inquiry regarding early DxeIplPeim loading. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Jul 2018 09:24:41 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Marvin, You can check SHA-1: ebaafbe62c70309d0ceb44a0c4199093d0a823c4. It is for the case "Allow S3 Resume without having installed permanent memo= ry (via InstallPeiMemory)" (PI Mantis 1532, you can search the sentence in = PI spec) requested by HP. Yes before ebaafbe62c70309d0ceb44a0c4199093d0a823c4, DxeIpl.inf had gEfiPei= MemoryDiscoveredPpiGuid DEPEX. For the case you mentioned about MinPlatformPkg, I think you can put the Dx= eIpl.inf into a Post Memory FV if the platform will publish gEfiPeiMemoryDi= scoveredPpiGuid indeed. Thanks, Star -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Marv= in H?user Sent: Friday, July 13, 2018 7:19 AM To: edk2-devel@lists.01.org Cc: Dong, Eric ; Zeng, Star Subject: [edk2] Inquiry regarding early DxeIplPeim loading. Good day developers, While checking out which edk2 modules request being shadowed, I came across= DxeIplPeim being one of them, however I am not sure why it was designed th= is way. If the Boot Mode is !=3D S3, the module will register for shadowing and imm= ediately return during the pre-memory phase https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/DxeIplPeim/= DxeLoad.c#L92 https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/DxeIplPeim/= DxeLoad.c#L111 If the Boot Mode is S3, the module will register a Memory Discovered event = to install crucial PPIs... https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/DxeIplPeim/= DxeLoad.c#L125 ... and install the DxeIpl PPI before returning https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/DxeIplPeim/= DxeLoad.c#L132 However, by design, the DxeIpl PPI is not located until the very end of Pei= Core, meaning the dispatcher ran out of modules to dispatch https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Pei/PeiMain= /PeiMain.c#L467 Hence installing the DxeIpl PPI early in the S3 boot path does not seem to = have any effect to me, as both paths are left awaiting memory availability = (Shadow / event). The only functional change would be PeiCore failing to lo= cate the DxeIpl PPI in case memory initialization silently fails and code e= xecution continues, which is an insane state in the first place. Am I missing any scenario where this design is helpful? Is there any disadv= antage for adding a Depex on MemoryDiscovered PPI? Running only after memor= y initialization would shrink the initialization function by removing the s= hadowing request in non-S3 path and the event registration in the S3 path, = as well as merging the PPI installation code as both registrations end up e= xecuting the exact same code https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/DxeIplPeim/= DxeLoad.c#L118 https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/DxeIplPeim/= DxeLoad.c#L57 The initialization function would collapse to PPI installations, a shadow o= r event registration call would be saved and platforms could safely embed D= xeIplPeim into a Post Memory FV, such as MinPlatformPkg is using, to have t= he PEIM loaded directly into memory to gain yet more performance. The only = restriction would be to prohibit compression. Thanks for your time. Best regards, Marvin. _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel