From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.126; helo=mga18.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 993182097F56A for ; Wed, 18 Jul 2018 02:13:41 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga006.fm.intel.com ([10.253.24.20]) by orsmga106.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Jul 2018 02:13:40 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,369,1526367600"; d="scan'208";a="246678546" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga006.fm.intel.com with ESMTP; 18 Jul 2018 02:12:01 -0700 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 18 Jul 2018 02:12:01 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX152.amr.corp.intel.com (10.18.125.5) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 18 Jul 2018 02:12:00 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.124]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.173]) with mapi id 14.03.0319.002; Wed, 18 Jul 2018 17:11:59 +0800 From: "Zeng, Star" To: Marvin H?user , "edk2-devel@lists.01.org" CC: "Dong, Eric" , "Zeng, Star" Thread-Topic: Inquiry regarding early DxeIplPeim loading. Thread-Index: AdQaNDyLZ2J/sHRiSC+kEdwPjgFgmQAVgqeAAAhusyAA8rCSUA== Date: Wed, 18 Jul 2018 09:11:57 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103BB8446E@shsmsx102.ccr.corp.intel.com> References: <0C09AFA07DD0434D9E2A0C6AEB0483103BB82A5E@shsmsx102.ccr.corp.intel.com> In-Reply-To: Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: Inquiry regarding early DxeIplPeim loading. X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 18 Jul 2018 09:13:41 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Hi Marvin, Thanks for the idea. Many configuration could be known at compile time for one specific platform= , but we could not invent FeatureFlag PCD for all of them. I do not think it costs much and I do not prefer a new FeatureFlag PCD for = this case. Thanks, Star -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Marv= in H?user Sent: Friday, July 13, 2018 9:26 PM To: edk2-devel@lists.01.org Cc: Dong, Eric ; Zeng, Star Subject: Re: [edk2] Inquiry regarding early DxeIplPeim loading. Hey Star, Thank you very much for your reply. Interesting, that is basically the case I described as "insane" because I d= id not consider any platform to allow S3 resume without memory initializati= on. So, this code definitely makes sense. You are right, according to the specification, moving it to the PostMem FV = should be fine. However that will cost a shadow call and a re-entry for non= -S3 and an event registration for the S3 boot path. As the information whether S3 resume without meminit is intended is known a= t compile-time, what's your opinion on a FeatureFlag PCD which chooses betw= een direct calls and the shadow/event system? I would prepare a patch as soon as I can properly test its working, if you = are interested. The changes would be most minimal, I imagine. Thanks, Marvin. > -----Original Message----- > From: Zeng, Star > Sent: Friday, July 13, 2018 11:24 AM > To: Marvin H?user ; edk2-=20 > devel@lists.01.org > Cc: Dong, Eric ; Cohen, Eugene ;=20 > Gao, Liming ; Zeng, Star > Subject: RE: Inquiry regarding early DxeIplPeim loading. >=20 > Marvin, >=20 > You can check SHA-1: ebaafbe62c70309d0ceb44a0c4199093d0a823c4. > It is for the case "Allow S3 Resume without having installed permanent=20 > memory (via InstallPeiMemory)" (PI Mantis 1532, you can search the=20 > sentence in PI spec) requested by HP. > Yes before ebaafbe62c70309d0ceb44a0c4199093d0a823c4, DxeIpl.inf had=20 > gEfiPeiMemoryDiscoveredPpiGuid DEPEX. > For the case you mentioned about MinPlatformPkg, I think you can put=20 > the DxeIpl.inf into a Post Memory FV if the platform will publish=20 > gEfiPeiMemoryDiscoveredPpiGuid indeed. >=20 >=20 > Thanks, > Star > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of=20 > Marvin H?user > Sent: Friday, July 13, 2018 7:19 AM > To: edk2-devel@lists.01.org > Cc: Dong, Eric ; Zeng, Star > Subject: [edk2] Inquiry regarding early DxeIplPeim loading. >=20 > Good day developers, >=20 > While checking out which edk2 modules request being shadowed, I came=20 > across DxeIplPeim being one of them, however I am not sure why it was=20 > designed this way. >=20 > If the Boot Mode is !=3D S3, the module will register for shadowing and=20 > immediately return during the pre-memory phase=20 > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe > IplPeim/DxeLoad.c#L92 > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe > IplPeim/DxeLoad.c#L111 >=20 > If the Boot Mode is S3, the module will register a Memory Discovered=20 > event to install crucial PPIs... > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe > IplPeim/DxeLoad.c#L125 > ... and install the DxeIpl PPI before returning=20 > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe > IplPeim/DxeLoad.c#L132 >=20 > However, by design, the DxeIpl PPI is not located until the very end=20 > of PeiCore, meaning the dispatcher ran out of modules to dispatch=20 > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Pei/ > PeiMain/PeiMain.c#L467 > Hence installing the DxeIpl PPI early in the S3 boot path does not=20 > seem to have any effect to me, as both paths are left awaiting memory=20 > availability (Shadow / event). The only functional change would be=20 > PeiCore failing to locate the DxeIpl PPI in case memory initialization=20 > silently fails and code execution continues, which is an insane state in = the first place. >=20 > Am I missing any scenario where this design is helpful? Is there any=20 > disadvantage for adding a Depex on MemoryDiscovered PPI? Running only=20 > after memory initialization would shrink the initialization function=20 > by removing the shadowing request in non-S3 path and the event=20 > registration in the S3 path, as well as merging the PPI installation=20 > code as both registrations end up executing the exact same code=20 > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe > IplPeim/DxeLoad.c#L118 > https://github.com/tianocore/edk2/blob/master/MdeModulePkg/Core/Dxe > IplPeim/DxeLoad.c#L57 >=20 > The initialization function would collapse to PPI installations, a=20 > shadow or event registration call would be saved and platforms could=20 > safely embed DxeIplPeim into a Post Memory FV, such as MinPlatformPkg=20 > is using, to have the PEIM loaded directly into memory to gain yet=20 > more performance. The only restriction would be to prohibit compression. >=20 > Thanks for your time. >=20 > Best regards, > Marvin. > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel