From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=134.134.136.24; helo=mga09.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id AF511210F625C for ; Sun, 26 Aug 2018 18:06:50 -0700 (PDT) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Aug 2018 18:06:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.53,293,1531810800"; d="scan'208";a="80377820" Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga002.fm.intel.com with ESMTP; 26 Aug 2018 18:06:49 -0700 Received: from fmsmsx101.amr.corp.intel.com (10.18.124.199) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 26 Aug 2018 18:06:49 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx101.amr.corp.intel.com (10.18.124.199) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sun, 26 Aug 2018 18:06:49 -0700 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.226]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.150]) with mapi id 14.03.0319.002; Mon, 27 Aug 2018 09:06:47 +0800 From: "Zeng, Star" To: "Bi, Dandan" , "edk2-devel@lists.01.org" CC: "Gao, Liming" , "Kinney, Michael D" , "Zeng, Star" Thread-Topic: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions Thread-Index: AQHUOpKBNOcrxzsPsUWg0Wm2FOzCiKTSR1wAgACHkUA= Date: Mon, 27 Aug 2018 01:06:47 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483103BBB21D6@shsmsx102.ccr.corp.intel.com> References: <1534995380-26964-1-git-send-email-star.zeng@intel.com> <1534995380-26964-2-git-send-email-star.zeng@intel.com> <3C0D5C461C9E904E8F62152F6274C0BB3BB6F37B@shsmsx102.ccr.corp.intel.com> In-Reply-To: <3C0D5C461C9E904E8F62152F6274C0BB3BB6F37B@shsmsx102.ccr.corp.intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 27 Aug 2018 01:06:50 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Agree and thanks. Star -----Original Message----- From: Bi, Dandan=20 Sent: Monday, August 27, 2018 9:00 AM To: Zeng, Star ; edk2-devel@lists.01.org Cc: Gao, Liming ; Kinney, Michael D Subject: RE: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions Hi Star, One minor comment: How about update=20 + UINT8 MemoryTechnology; ///< MEMOR= Y_DEVICE_TECHNOLOGY To=20 + UINT8 MemoryTechnology; ///< The e= numeration value from MEMORY_DEVICE_TECHNOLOGY. In order to keep consistent with current comments style. With this update, Reviewed-by: Dandan Bi Thanks, Dandan -----Original Message----- From: Zeng, Star Sent: Thursday, August 23, 2018 11:36 AM To: edk2-devel@lists.01.org Cc: Zeng, Star ; Gao, Liming ; B= i, Dandan ; Kinney, Michael D Subject: [PATCH V2 1/2] MdePkg SmBios.h: Add SMBIOS 3.2.0 definitions REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1099 Add SMBIOS 3.2.0 definitions according to www.dmtf.org/sites/default/files/= standards/documents/DSP0134_3.2.0.pdf. Processor Information (Type 4): - SMBIOSCR00163: add socket LGA2066 - SMBIOSCR00173: add Intel Core i9 - SMBIOSCR00176: add new processor sockets Port Connector Information (Type= 8): - SMBIOSCR00168: add USB Type-C System Slots (Type 9): - SMBIOSCR00164: add "unavailable" to current usage field - SMBIOSCR00167: add support for PCIe bifurcation Memory Device (Type 17): - SMBIOSCR00162: add support for NVDIMMs - SMBIOSCR00166: extend support for NVDIMMs and add support for logical mem= ory type - SMBIOSCR00172: rename "Configured Memory Clock Speed" to "Configured Memo= ry Speed" - SMBIOSCR00174: add new memory technology value (Intel Persistent Memory, = 3D XPoint) IPMI Device Information (Type 38): - SMBIOSCR00171: add SSIF Management Controller Host Interface (Type 42) - SMBIOSCR00175: fix structure data parsing issue V2: Add missing update to MISC_PORT_TYPE and SMBIOS_TABLE_TYPE9. Cc: Liming Gao Cc: Dandan Bi Cc: Michael D Kinney Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Star Zeng --- MdePkg/Include/IndustryStandard/SmBios.h | 155 ++++++++++++++++++++++++---= ---- 1 file changed, 120 insertions(+), 35 deletions(-) diff --git a/MdePkg/Include/IndustryStandard/SmBios.h b/MdePkg/Include/Indu= stryStandard/SmBios.h index 5d0442873dfc..61e2f9421f97 100644 --- a/MdePkg/Include/IndustryStandard/SmBios.h +++ b/MdePkg/Include/IndustryStandard/SmBios.h @@ -1,5 +1,5 @@ /** @file - Industry Standard Definitions of SMBIOS Table Specification v3.1.1. + Industry Standard Definitions of SMBIOS Table Specification v3.2.0. =20 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP
@@ -= 685,6 +685,7 @@ typedef enum { ProcessorFamilyzArchitecture =3D 0xCC, ProcessorFamilyIntelCoreI5 =3D 0xCD, ProcessorFamilyIntelCoreI3 =3D 0xCE, + ProcessorFamilyIntelCoreI9 =3D 0xCF, ProcessorFamilyViaC7M =3D 0xD2, ProcessorFamilyViaC7D =3D 0xD3, ProcessorFamilyViaC7 =3D 0xD4, @@ -806,7 +807,11 @@ typedef enum { ProcessorUpgradeSocketBGA1515 =3D 0x35, ProcessorUpgradeSocketLGA3647_1 =3D 0x36, ProcessorUpgradeSocketSP3 =3D 0x37, - ProcessorUpgradeSocketSP3r2 =3D 0x38 + ProcessorUpgradeSocketSP3r2 =3D 0x38, + ProcessorUpgradeSocketLGA2066 =3D 0x39, + ProcessorUpgradeSocketBGA1392 =3D 0x3A, + ProcessorUpgradeSocketBGA1510 =3D 0x3B, + ProcessorUpgradeSocketBGA1528 =3D 0x3C } PROCESSOR_UPGRADE; =20 /// @@ -1159,6 +1164,7 @@ typedef enum { PortConnectorTypeBNC =3D 0x20, PortConnectorType1394 =3D 0x21, PortConnectorTypeSasSata =3D 0x22, + PortConnectorTypeUsbTypeC =3D 0x23, PortConnectorTypePC98 =3D 0xA0, PortConnectorTypePC98Hireso =3D 0xA1, PortConnectorTypePCH98 =3D 0xA2, @@ -1205,6 +1211,8 @@ typedef enum { PortTypeNetworkPort =3D 0x1F, PortTypeSata =3D 0x20, PortTypeSas =3D 0x21, + PortTypeMfdp =3D 0x22, ///< Multi-Function Display = Port + PortTypeThunderbolt =3D 0x23, PortType8251Compatible =3D 0xA0, PortType8251FifoCompatible =3D 0xA1, PortTypeOther =3D 0xFF @@ -1314,10 +1322,11 @@ typedef enum { /// System Slots - Current Usage. /// typedef enum { - SlotUsageOther =3D 0x01, - SlotUsageUnknown =3D 0x02, - SlotUsageAvailable =3D 0x03, - SlotUsageInUse =3D 0x04 + SlotUsageOther =3D 0x01, + SlotUsageUnknown =3D 0x02, + SlotUsageAvailable =3D 0x03, + SlotUsageInUse =3D 0x04, + SlotUsageUnavailable =3D 0x05 } MISC_SLOT_USAGE; =20 /// @@ -1350,10 +1359,21 @@ typedef struct { UINT8 PmeSignalSupported :1; UINT8 HotPlugDevicesSupported :1; UINT8 SmbusSignalSupported :1; - UINT8 Reserved :5; ///< Set to 0. + UINT8 BifurcationSupported :1; + UINT8 Reserved :4; ///< Set to 0. } MISC_SLOT_CHARACTERISTICS2; =20 /// +/// System Slots - Peer Segment/Bus/Device/Function/Width Groups ///=20 +typedef struct { + UINT16 SegmentGroupNum; + UINT8 BusNum; + UINT8 DevFuncNum; + UINT8 DataBusWidth; +} MISC_SLOT_PEER_GROUP; + +/// /// System Slots (Type 9) /// /// The information in this structure defines the attributes of a system s= lot. @@ -1376,6 +1396,12 @@ typedef struct { UINT16 SegmentGroupNum; UINT8 BusNum; UINT8 DevFuncNum; + // + // Add for smbios 3.2 + // + UINT8 DataBusWidth; + UINT8 PeerGroupingCount; + MISC_SLOT_PEER_GROUP PeerGroups[1]; } SMBIOS_TABLE_TYPE9; =20 /// @@ -1668,9 +1694,13 @@ typedef enum { MemoryTypeLpddr =3D 0x1B, MemoryTypeLpddr2 =3D 0x1C, MemoryTypeLpddr3 =3D 0x1D, - MemoryTypeLpddr4 =3D 0x1E + MemoryTypeLpddr4 =3D 0x1E, + MemoryTypeLogicalNonVolatileDevice =3D 0x1F } MEMORY_DEVICE_TYPE; =20 +/// +/// Memory Device - Type Detail +/// typedef struct { UINT16 Reserved :1; UINT16 Other :1; @@ -1691,6 +1721,41 @@ typedef struct { } MEMORY_DEVICE_TYPE_DETAIL; =20 /// +/// Memory Device - Memory Technology +/// +typedef enum { + MemoryTechnologyOther =3D 0x01, + MemoryTechnologyUnknown =3D 0x02, + MemoryTechnologyDram =3D 0x03, + MemoryTechnologyNvdimmN =3D 0x04, + MemoryTechnologyNvdimmF =3D 0x05, + MemoryTechnologyNvdimmP =3D 0x06, + MemoryTechnologyIntelPersistentMemory =3D 0x07 +} MEMORY_DEVICE_TECHNOLOGY; + +/// +/// Memory Device - Memory Operating Mode Capability /// typedef union=20 +{ + /// + /// Individual bit fields + /// + struct { + UINT16 Reserved :1; ///< Set to 0. + UINT16 Other :1; + UINT16 Unknown :1; + UINT16 VolatileMemory :1; + UINT16 ByteAccessiblePersistentMemory :1; + UINT16 BlockAccessiblePersistentMemory :1; + UINT16 Reserved2 :10; ///< Set to 0. + } Bits; + /// + /// All bit fields as a 16-bit value + /// + UINT16 Uint16; +} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY; + +/// /// Memory Device (Type 17). /// /// This structure describes a single memory device that is part of @@ -17= 00,38 +1765,57 @@ typedef struct { /// socket is currently populated. /// typedef struct { - SMBIOS_STRUCTURE Hdr; - UINT16 MemoryArrayHandle; - UINT16 MemoryErrorInformationHandle; - UINT16 TotalWidth; - UINT16 DataWidth; - UINT16 Size; - UINT8 FormFactor; ///< The enume= ration value from MEMORY_FORM_FACTOR. - UINT8 DeviceSet; - SMBIOS_TABLE_STRING DeviceLocator; - SMBIOS_TABLE_STRING BankLocator; - UINT8 MemoryType; ///< The enume= ration value from MEMORY_DEVICE_TYPE. - MEMORY_DEVICE_TYPE_DETAIL TypeDetail; - UINT16 Speed; - SMBIOS_TABLE_STRING Manufacturer; - SMBIOS_TABLE_STRING SerialNumber; - SMBIOS_TABLE_STRING AssetTag; - SMBIOS_TABLE_STRING PartNumber; + SMBIOS_STRUCTURE Hdr; + UINT16 MemoryArrayHandle; + UINT16 MemoryErrorInformationHandle; + UINT16 TotalWidth; + UINT16 DataWidth; + UINT16 Size; + UINT8 FormFactor; ///< The e= numeration value from MEMORY_FORM_FACTOR. + UINT8 DeviceSet; + SMBIOS_TABLE_STRING DeviceLocator; + SMBIOS_TABLE_STRING BankLocator; + UINT8 MemoryType; ///< The e= numeration value from MEMORY_DEVICE_TYPE. + MEMORY_DEVICE_TYPE_DETAIL TypeDetail; + UINT16 Speed; + SMBIOS_TABLE_STRING Manufacturer; + SMBIOS_TABLE_STRING SerialNumber; + SMBIOS_TABLE_STRING AssetTag; + SMBIOS_TABLE_STRING PartNumber; // // Add for smbios 2.6 // - UINT8 Attributes; + UINT8 Attributes; // // Add for smbios 2.7 // - UINT32 ExtendedSize; - UINT16 ConfiguredMemoryClockSpeed; + UINT32 ExtendedSize; + // + // Keep using name "ConfiguredMemoryClockSpeed" for compatibility //=20 + although this field is renamed from "Configured Memory Clock Speed" + // to "Configured Memory Speed" in smbios 3.2.0. + // + UINT16 ConfiguredMemoryClockSpeed; // // Add for smbios 2.8.0 // - UINT16 MinimumVoltage; - UINT16 MaximumVoltage; - UINT16 ConfiguredVoltage; + UINT16 MinimumVoltage; + UINT16 MaximumVoltage; + UINT16 ConfiguredVoltage; + // + // Add for smbios 3.2.0 + // + UINT8 MemoryTechnology; ///< MEMOR= Y_DEVICE_TECHNOLOGY + MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability; + SMBIOS_TABLE_STRING FirwareVersion; + UINT16 ModuleManufacturerID; + UINT16 ModuleProductID; + UINT16 MemorySubsystemControllerManuf= acturerID; + UINT16 MemorySubsystemControllerProdu= ctID; + UINT64 NonVolatileSize; + UINT64 VolatileSize; + UINT64 CacheSize; + UINT64 LogicalSize; } SMBIOS_TABLE_TYPE17; =20 /// @@ -2269,7 +2353,7 @@ typedef enum { IPMIDeviceInfoInterfaceTypeKCS =3D 0x01, ///< The Keyboard Con= troller Style. IPMIDeviceInfoInterfaceTypeSMIC =3D 0x02, ///< The Server Manag= ement Interface Chip. IPMIDeviceInfoInterfaceTypeBT =3D 0x03, ///< The Block Transf= er - IPMIDeviceInfoInterfaceTypeReserved =3D 0x04 + IPMIDeviceInfoInterfaceTypeSSIF =3D 0x04 ///< SMBus System Int= erface } BMC_INTERFACE_TYPE; =20 /// @@ -2339,7 +2423,7 @@ typedef struct { UINT8 ReferencedOffset; SMBIOS_TABLE_STRING EntryString; UINT8 Value[1]; -}ADDITIONAL_INFORMATION_ENTRY; +} ADDITIONAL_INFORMATION_ENTRY; =20 /// /// Additional Information (Type 40). @@ -2425,8 +2509,9 @@ typedef enum{ /// typedef struct { SMBIOS_STRUCTURE Hdr; - UINT8 InterfaceType; ///< The enume= ration value from MC_HOST_INTERFACE_TYPE - UINT8 MCHostInterfaceData[1]; ///< This fiel= d has a minimum of four bytes + UINT8 InterfaceType; ///< T= he enumeration value from MC_HOST_INTERFACE_TYPE + UINT8 InterfaceTypeSpecificDataLength; + UINT8 InterfaceTypeSpecificData[4]; ///< T= his field has a minimum of four bytes } SMBIOS_TABLE_TYPE42; =20 /// -- 2.7.0.windows.1