[PATCH v2 0/5] [CVE-2017-5753] Bounds Check Bypass issue in SMI handlers

[PATCH v2 0/5] [CVE-2017-5753] Bounds Check Bypass issue in SMI handlers

[Hao Wu]

V2 changes:
A. Rename the newly introduced BaseLib API to 'AsmLfence', and makes it
   IA32/X64 specific.

B. Add brief comments before calls of the AsmLfence() to state the
   purpose.

C. Refine the patch for Variable/RuntimeDxe driver and make the change
   focus on the SMM code.

V1 history:
The series aims to mitigate the Bounds Check Bypass (CVE-2017-5753) issues
within SMI handlers.

A more detailed explanation of the purpose of the series is under the
'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>

Hao Wu (5):
  MdePkg/BaseLib: Add new AsmLfence API
  MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass
  MdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass
  MdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass
  UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass

 MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c   |  7 ++++
 MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf |  1 +
 MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c                 | 10 ++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c              | 31 ++++++++++++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c              | 30 ++++++++++++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h      | 13 ++++++-
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c                  |  6 ++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf      |  1 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c               | 18 ++++++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf             |  1 +
 MdePkg/Include/Library/BaseLib.h                                       | 13 +++++++
 MdePkg/Library/BaseLib/BaseLib.inf                                     |  2 ++
 MdePkg/Library/BaseLib/Ia32/Lfence.nasm                                | 37 +++++++++++++++++++
 MdePkg/Library/BaseLib/X64/Lfence.nasm                                 | 38 ++++++++++++++++++++
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c                             |  5 +++
 15 files changed, 212 insertions(+), 1 deletion(-)
 create mode 100644 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
 create mode 100644 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
 create mode 100644 MdePkg/Library/BaseLib/Ia32/Lfence.nasm
 create mode 100644 MdePkg/Library/BaseLib/X64/Lfence.nasm

-- 
2.12.0.windows.1

[PATCH v2 1/5] MdePkg/BaseLib: Add new AsmLfence API

[Hao Wu]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1193

This commit will add a new BaseLib API AsmLfence(). This API will perform
a serializing operation on all load-from-memory instructions that were
issued prior to the call of this function. Please note that this API is
only available on IA-32 and x64.

The purpose of adding this API is to mitigate of the [CVE-2017-5753]
Bounds Check Bypass issue when untrusted data are being processed within
SMM. More details can be referred at the 'Bounds check bypass mitigation'
section at the below link:

https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdePkg/Include/Library/BaseLib.h        | 13 +++++++
 MdePkg/Library/BaseLib/BaseLib.inf      |  2 ++
 MdePkg/Library/BaseLib/Ia32/Lfence.nasm | 37 +++++++++++++++++++
 MdePkg/Library/BaseLib/X64/Lfence.nasm  | 38 ++++++++++++++++++++
 4 files changed, 90 insertions(+)

diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
index 123ae19dc2..656b7736b1 100644
--- a/MdePkg/Include/Library/BaseLib.h
+++ b/MdePkg/Include/Library/BaseLib.h
@@ -9139,6 +9139,19 @@ AsmWriteTr (
   );
 
 /**
+  Performs a serializing operation on all load-from-memory instructions that
+  were issued prior the AsmLfence function.
+
+  Executes a LFENCE instruction. This function is only available on IA-32 and x64.
+
+**/
+VOID
+EFIAPI
+AsmLfence (
+  VOID
+  );
+
+/**
   Patch the immediate operand of an IA32 or X64 instruction such that the byte,
   word, dword or qword operand is encoded at the end of the instruction's
   binary representation.
diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
index a1b5ec4b75..ed15c025f9 100644
--- a/MdePkg/Library/BaseLib/BaseLib.inf
+++ b/MdePkg/Library/BaseLib/BaseLib.inf
@@ -68,6 +68,7 @@
 
 [Sources.Ia32]
   Ia32/WriteTr.nasm
+  Ia32/Lfence.nasm
 
   Ia32/Wbinvd.c | MSFT
   Ia32/WriteMm7.c | MSFT
@@ -346,6 +347,7 @@
   X64/EnableCache.nasm
   X64/DisableCache.nasm
   X64/WriteTr.nasm
+  X64/Lfence.nasm
 
   X64/CpuBreakpoint.c | MSFT
   X64/WriteMsr64.c | MSFT
diff --git a/MdePkg/Library/BaseLib/Ia32/Lfence.nasm b/MdePkg/Library/BaseLib/Ia32/Lfence.nasm
new file mode 100644
index 0000000000..f8b2550ef8
--- /dev/null
+++ b/MdePkg/Library/BaseLib/Ia32/Lfence.nasm
@@ -0,0 +1,37 @@
+;------------------------------------------------------------------------------ ;
+; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   Lfence.nasm
+;
+; Abstract:
+;
+;   Performs a serializing operation on all load-from-memory instructions that
+;   were issued prior to the call of this function.
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+    SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmLfence (
+;   VOID
+;   );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmLfence)
+ASM_PFX(AsmLfence):
+    lfence
+    ret
+
diff --git a/MdePkg/Library/BaseLib/X64/Lfence.nasm b/MdePkg/Library/BaseLib/X64/Lfence.nasm
new file mode 100644
index 0000000000..e81c77964b
--- /dev/null
+++ b/MdePkg/Library/BaseLib/X64/Lfence.nasm
@@ -0,0 +1,38 @@
+;------------------------------------------------------------------------------ ;
+; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+; This program and the accompanying materials
+; are licensed and made available under the terms and conditions of the BSD License
+; which accompanies this distribution.  The full text of the license may be found at
+; http://opensource.org/licenses/bsd-license.php.
+;
+; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+;
+; Module Name:
+;
+;   Lfence.nasm
+;
+; Abstract:
+;
+;   Performs a serializing operation on all load-from-memory instructions that
+;   were issued prior to the call of this function.
+;
+; Notes:
+;
+;------------------------------------------------------------------------------
+
+    DEFAULT REL
+    SECTION .text
+
+;------------------------------------------------------------------------------
+; VOID
+; EFIAPI
+; AsmLfence (
+;   VOID
+;   );
+;------------------------------------------------------------------------------
+global ASM_PFX(AsmLfence)
+ASM_PFX(AsmLfence):
+    lfence
+    ret
+
-- 
2.12.0.windows.1

[PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass

[Hao Wu]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for
data to arrive from memory, or for previous operations to finish, the
processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions
might leave hints such as which memory locations have been brought into
cache. Malicious actors can use the bounds check bypass method (code
gadgets with controlled external inputs) to infer data values that have
been used in speculative operations to reveal secrets which should not
otherwise be accessed.

This commit will focus on the SMI handler(s) registered within the
FaultTolerantWriteDxe driver and insert AsmLfence API to mitigate the
bounds check bypass issue.

For SMI handler SmmFaultTolerantWriteHandler():

Under "case FTW_FUNCTION_WRITE:", 'SmmFtwWriteHeader->Length' can be a
potential cross boundary access of the 'CommBuffer' (controlled external
inputs) during speculative execution. This cross boundary access is later
passed as parameter 'Length' into function FtwWrite().

Within function FtwWrite(), the value of 'Length' can be inferred by code:
"CopyMem (MyBuffer + Offset, Buffer, Length);". One can observe which part
of the content within 'Buffer' was brought into cache to possibly reveal
the value of 'Length'.

Hence, this commit adds a AsmLfence() after the boundary/range checks of
'CommBuffer' to prevent the speculative execution.

A more detailed explanation of the purpose of commit is under the
'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c   | 7 +++++++
 MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf | 1 +
 2 files changed, 8 insertions(+)

diff --git a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
index 632313f076..27fcab19b6 100644
--- a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
+++ b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
@@ -57,6 +57,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #include <PiSmm.h>
 #include <Library/SmmServicesTableLib.h>
 #include <Library/SmmMemLib.h>
+#include <Library/BaseLib.h>
 #include <Protocol/SmmSwapAddressRange.h>
 #include "FaultTolerantWrite.h"
 #include "FaultTolerantWriteSmmCommon.h"
@@ -417,6 +418,12 @@ SmmFaultTolerantWriteHandler (
                  &SmmFvbHandle
                  );
       if (!EFI_ERROR (Status)) {
+        //
+        // The AsmLfence() call here is to ensure the previous range/content
+        // checks for the CommBuffer have been completed before calling into
+        // FtwWrite().
+        //
+        AsmLfence ();
         Status = FtwWrite(
                    &mFtwDevice->FtwInstance,
                    SmmFtwWriteHeader->Lba,
diff --git a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
index 85d109e8d9..606cc2266b 100644
--- a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
+++ b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
@@ -55,6 +55,7 @@
   PcdLib
   ReportStatusCodeLib
   SmmMemLib
+  BaseLib
 
 [Guids]
   #
-- 
2.12.0.windows.1

[PATCH v2 3/5] MdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass

[Hao Wu]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for
data to arrive from memory, or for previous operations to finish, the
processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions
might leave hints such as which memory locations have been brought into
cache. Malicious actors can use the bounds check bypass method (code
gadgets with controlled external inputs) to infer data values that have
been used in speculative operations to reveal secrets which should not
otherwise be accessed.

This commit will focus on the SMI handler(s) registered within the
SmmLockBox driver and insert AsmLfence API to mitigate the
bounds check bypass issue.

For SMI handler SmmLockBoxHandler():

Under "case EFI_SMM_LOCK_BOX_COMMAND_SAVE:", the 'CommBuffer' (controlled
external inputs) is passed to function SmmLockBoxSave().

'TempLockBoxParameterSave.Length' can be a potential cross boundary access
of the 'CommBuffer' during speculative execution. This cross boundary
access is later passed as parameter 'Length' into function SaveLockBox().

Within function SaveLockBox(), the value of 'Length' can be inferred by
code:
"CopyMem ((VOID *)(UINTN)SmramBuffer, (VOID *)(UINTN)Buffer, Length);".
One can observe which part of the content within 'Buffer' was brought into
cache to possibly reveal the value of 'Length'.

Hence, this commit adds a AsmLfence() after the boundary/range checks of
'CommBuffer' to prevent the speculative execution.

And there is a similar case under "case EFI_SMM_LOCK_BOX_COMMAND_UPDATE:"
function SmmLockBoxUpdate() as well. This commits also handles it.

A more detailed explanation of the purpose of commit is under the
'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c b/MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c
index 5a11743cb9..c1c9aa5663 100644
--- a/MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c
+++ b/MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c
@@ -76,6 +76,11 @@ SmmLockBoxSave (
     LockBoxParameterSave->Header.ReturnStatus = (UINT64)EFI_ACCESS_DENIED;
     return ;
   }
+  //
+  // The AsmLfence() call here is to ensure the above range check for the
+  // CommBuffer have been completed before calling into SaveLockBox().
+  //
+  AsmLfence ();
 
   //
   // Save data
@@ -160,6 +165,11 @@ SmmLockBoxUpdate (
     LockBoxParameterUpdate->Header.ReturnStatus = (UINT64)EFI_ACCESS_DENIED;
     return ;
   }
+  //
+  // The AsmLfence() call here is to ensure the above range check for the
+  // CommBuffer have been completed before calling into UpdateLockBox().
+  //
+  AsmLfence ();
 
   //
   // Update data
-- 
2.12.0.windows.1

[PATCH v2 4/5] MdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass

[Hao Wu]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for
data to arrive from memory, or for previous operations to finish, the
processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions
might leave hints such as which memory locations have been brought into
cache. Malicious actors can use the bounds check bypass method (code
gadgets with controlled external inputs) to infer data values that have
been used in speculative operations to reveal secrets which should not
otherwise be accessed.

This commit will focus on the SMI handler(s) registered within the
Variable\RuntimeDxe driver and insert AsmLfence API to mitigate the
bounds check bypass issue.

For SMI handler SmmVariableHandler():

Under "case SMM_VARIABLE_FUNCTION_GET_VARIABLE:",
'SmmVariableHeader->NameSize' can be a potential cross boundary access of
the 'CommBuffer' (controlled external input) during speculative execution.

This cross boundary access is later used as the index to access array
'SmmVariableHeader->Name' by code:
"SmmVariableHeader->Name[SmmVariableHeader->NameSize/sizeof (CHAR16) - 1]"
One can observe which part of the content within array was brought into
cache to possibly reveal the value of 'SmmVariableHeader->NameSize'.

Hence, this commit adds a AsmLfence() after the boundary/range checks of
'CommBuffer' to prevent the speculative execution.

And there are 2 similar cases under
"case SMM_VARIABLE_FUNCTION_SET_VARIABLE:" and
"case SMM_VARIABLE_FUNCTION_VAR_CHECK_VARIABLE_PROPERTY_GET:" as well.
This commits also handles them.

Also, under "case SMM_VARIABLE_FUNCTION_SET_VARIABLE:",
'(UINT8 *)SmmVariableHeader->Name + SmmVariableHeader->NameSize' points to
the 'CommBuffer' (with some offset) and then passed as parameter 'Data' to
function VariableServiceSetVariable().

Within function VariableServiceSetVariable(), there is a sanity check for
EFI_VARIABLE_AUTHENTICATION_2 descriptor for the data pointed by 'Data'.
If this check is speculatively bypassed, potential cross-boundary data
access for 'Data' is possible to be revealed via the below function calls
sequence during speculative execution:

AuthVariableLibProcessVariable()
ProcessVarWithPk() or ProcessVarWithKek()

Within function ProcessVarWithPk() or ProcessVarWithKek(), for the code
"PayloadSize = DataSize - AUTHINFO2_SIZE (Data);", 'AUTHINFO2_SIZE (Data)'
can be a cross boundary access during speculative execution.

Then, 'PayloadSize' is possible to be revealed by the function call
sequence:

AuthServiceInternalUpdateVariableWithTimeStamp()
mAuthVarLibContextIn->UpdateVariable()
VariableExLibUpdateVariable()
UpdateVariable()
CopyMem()

Hence, this commit adds a AsmLfence() after the sanity check for
EFI_VARIABLE_AUTHENTICATION_2 descriptor upon 'Data' within function
VariableServiceSetVariable() to prevent the speculative execution.

Also, please note that the change made within function
VariableServiceSetVariable() will affect DXE as well. However, since we
only focuses on the SMM codes, the commit will introduce a new module
internal function called VariableLoadFence() to handle this. This internal
function will have 2 implementations (1 for SMM, 1 for DXE). For the SMM
implementation, it is a wrapper to call the AsmLfence() API; for the DXE
implementation, it is empty.

A more detailed explanation of the purpose of commit is under the
'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c         | 31 ++++++++++++++++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c         | 30 +++++++++++++++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h | 13 +++++++-
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c             |  6 ++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf |  1 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c          | 18 ++++++++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf        |  1 +
 7 files changed, 99 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c b/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
new file mode 100644
index 0000000000..697c5b41c6
--- /dev/null
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
@@ -0,0 +1,31 @@
+/** @file
+  Serialize operation on all load-from-memory instructions (DXE version).
+
+Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution.  The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "Variable.h"
+
+/**
+  This service is consumed by the variable modules to perform a serializing
+  operation on all load-from-memory instructions that were issued prior to the
+  call of this function.
+
+**/
+VOID
+VariableLoadFence (
+  VOID
+  )
+{
+  //
+  // Do nothing.
+  //
+}
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c b/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
new file mode 100644
index 0000000000..19fd0c294e
--- /dev/null
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
@@ -0,0 +1,30 @@
+/** @file
+  Serialize operation on all load-from-memory instructions (SMM version).
+
+Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
+This program and the accompanying materials
+are licensed and made available under the terms and conditions of the BSD License
+which accompanies this distribution.  The full text of the license may be found at
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BaseLib.h>
+#include "Variable.h"
+
+/**
+  This service is consumed by the variable modules to perform a serializing
+  operation on all load-from-memory instructions that were issued prior to the
+  call of this function.
+
+**/
+VOID
+VariableLoadFence (
+  VOID
+  )
+{
+  AsmLfence ();
+}
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h b/MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h
index b98b8556a2..7493777976 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h
@@ -7,7 +7,7 @@
   vs. non-privileged driver code.
 
   Copyright (c) 2017, Red Hat, Inc.<BR>
-  Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>
 
   This program and the accompanying materials are licensed and made available
   under the terms and conditions of the BSD License which accompanies this
@@ -84,4 +84,15 @@ SetVariableCheckHandlerMor (
   IN VOID       *Data
   );
 
+/**
+  This service is consumed by the variable modules to perform a serializing
+  operation on all load-from-memory instructions that were issued prior to the
+  call of this function.
+
+**/
+VOID
+VariableLoadFence (
+  VOID
+  );
+
 #endif
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
index 1ea2f84dda..c7620bf70d 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -3198,6 +3198,12 @@ VariableServiceSetVariable (
       ((EFI_VARIABLE_AUTHENTICATION_2 *) Data)->AuthInfo.Hdr.dwLength < OFFSET_OF (WIN_CERTIFICATE_UEFI_GUID, CertData)) {
       return EFI_SECURITY_VIOLATION;
     }
+    //
+    // The VariableLoadFence() call here is to ensure the above sanity check
+    // for the EFI_VARIABLE_AUTHENTICATION_2 descriptor has been completed
+    // before the execution of subsequent codes.
+    //
+    VariableLoadFence ();
     PayloadSize = DataSize - AUTHINFO2_SIZE (Data);
   } else {
     PayloadSize = DataSize;
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
index 2d0a172ece..868981ccaf 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
@@ -46,6 +46,7 @@
   TcgMorLockDxe.c
   VarCheck.c
   VariableExLib.c
+  LoadFenceDxe.c
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c
index e495d971a0..e9c7095148 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c
@@ -537,6 +537,12 @@ SmmVariableHandler (
         goto EXIT;
       }
 
+      //
+      // The VariableLoadFence() call here is to ensure the previous range/content
+      // checks for the CommBuffer have been completed before the subsequent
+      // consumption of the CommBuffer content.
+      //
+      VariableLoadFence ();
       if (SmmVariableHeader->NameSize < sizeof (CHAR16) || SmmVariableHeader->Name[SmmVariableHeader->NameSize/sizeof (CHAR16) - 1] != L'\0') {
         //
         // Make sure VariableName is A Null-terminated string.
@@ -631,6 +637,12 @@ SmmVariableHandler (
         goto EXIT;
       }
 
+      //
+      // The VariableLoadFence() call here is to ensure the previous range/content
+      // checks for the CommBuffer have been completed before the subsequent
+      // consumption of the CommBuffer content.
+      //
+      VariableLoadFence ();
       if (SmmVariableHeader->NameSize < sizeof (CHAR16) || SmmVariableHeader->Name[SmmVariableHeader->NameSize/sizeof (CHAR16) - 1] != L'\0') {
         //
         // Make sure VariableName is A Null-terminated string.
@@ -766,6 +778,12 @@ SmmVariableHandler (
         goto EXIT;
       }
 
+      //
+      // The VariableLoadFence() call here is to ensure the previous range/content
+      // checks for the CommBuffer have been completed before the subsequent
+      // consumption of the CommBuffer content.
+      //
+      VariableLoadFence ();
       if (CommVariableProperty->NameSize < sizeof (CHAR16) || CommVariableProperty->Name[CommVariableProperty->NameSize/sizeof (CHAR16) - 1] != L'\0') {
         //
         // Make sure VariableName is A Null-terminated string.
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
index dbb0674a46..ac40364d8a 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
@@ -54,6 +54,7 @@
   PrivilegePolymorphic.h
   VariableExLib.c
   TcgMorLockSmm.c
+  LoadFenceDxe.c
 
 [Packages]
   MdePkg/MdePkg.dec
-- 
2.12.0.windows.1

[PATCH v2 5/5] UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass

[Hao Wu]

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for
data to arrive from memory, or for previous operations to finish, the
processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions
might leave hints such as which memory locations have been brought into
cache. Malicious actors can use the bounds check bypass method (code
gadgets with controlled external inputs) to infer data values that have
been used in speculative operations to reveal secrets which should not
otherwise be accessed.

It is possible for SMI handler(s) to call EFI_SMM_CPU_PROTOCOL service
ReadSaveState() and use the content in the 'CommBuffer' (controlled
external inputs) as the 'CpuIndex'. So this commit will insert AsmLfence
API to mitigate the bounds check bypass issue within SmmReadSaveState().

For SmmReadSaveState():

The 'CpuIndex' will be passed into function ReadSaveStateRegister(). And
then in to ReadSaveStateRegisterByIndex().

With the call:
ReadSaveStateRegisterByIndex (
  CpuIndex,
  SMM_SAVE_STATE_REGISTER_IOMISC_INDEX,
  sizeof(IoMisc.Uint32),
  &IoMisc.Uint32
  );

The 'IoMisc' can be a cross boundary access during speculative execution.
Later, 'IoMisc' is used as the index to access buffers 'mSmmCpuIoWidth'
and 'mSmmCpuIoType'. One can observe which part of the content within
those buffers was brought into cache to possibly reveal the value of
'IoMisc'.

Hence, this commit adds a AsmLfence() after the check of 'CpuIndex'
within function SmmReadSaveState() to prevent the speculative execution.

A more detailed explanation of the purpose of commit is under the
'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>

cb pismm
---
 UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
index fbf74e8d90..19979d5418 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
@@ -237,6 +237,11 @@ SmmReadSaveState (
   if ((CpuIndex >= gSmst->NumberOfCpus) || (Buffer == NULL)) {
     return EFI_INVALID_PARAMETER;
   }
+  //
+  // The AsmLfence() call here is to ensure the above check for the CpuIndex
+  // has been completed before the execution of subsequent codes.
+  //
+  AsmLfence ();
 
   //
   // Check for special EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID
-- 
2.12.0.windows.1

Re: [PATCH v2 5/5] UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass

[Laszlo Ersek]

On 09/25/18 08:12, Hao Wu wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194
> 
> Speculative execution is used by processor to avoid having to wait for
> data to arrive from memory, or for previous operations to finish, the
> processor may speculate as to what will be executed.
> 
> If the speculation is incorrect, the speculatively executed instructions
> might leave hints such as which memory locations have been brought into
> cache. Malicious actors can use the bounds check bypass method (code
> gadgets with controlled external inputs) to infer data values that have
> been used in speculative operations to reveal secrets which should not
> otherwise be accessed.
> 
> It is possible for SMI handler(s) to call EFI_SMM_CPU_PROTOCOL service
> ReadSaveState() and use the content in the 'CommBuffer' (controlled
> external inputs) as the 'CpuIndex'. So this commit will insert AsmLfence
> API to mitigate the bounds check bypass issue within SmmReadSaveState().
> 
> For SmmReadSaveState():
> 
> The 'CpuIndex' will be passed into function ReadSaveStateRegister(). And
> then in to ReadSaveStateRegisterByIndex().
> 
> With the call:
> ReadSaveStateRegisterByIndex (
>   CpuIndex,
>   SMM_SAVE_STATE_REGISTER_IOMISC_INDEX,
>   sizeof(IoMisc.Uint32),
>   &IoMisc.Uint32
>   );
> 
> The 'IoMisc' can be a cross boundary access during speculative execution.
> Later, 'IoMisc' is used as the index to access buffers 'mSmmCpuIoWidth'
> and 'mSmmCpuIoType'. One can observe which part of the content within
> those buffers was brought into cache to possibly reveal the value of
> 'IoMisc'.
> 
> Hence, this commit adds a AsmLfence() after the check of 'CpuIndex'
> within function SmmReadSaveState() to prevent the speculative execution.
> 
> A more detailed explanation of the purpose of commit is under the
> 'Bounds check bypass mitigation' section of the below link:
> https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation
> 
> And the document at:
> https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf
> 
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> 
> cb pismm

Before you push this version (or when preparing a v3, if necessary),
please remove the above stray text, from the end of the commit message.

I've now looked over this series. I didn't try to verify whether the
lfence instructions had been added at right places, or whether they had
been added at *all* the right places. However, structurally the series
looks OK to me.

series
Acked-by: Laszlo Ersek <lersek@redhat.com>

I will follow up with regression test results.

Thanks
Laszlo

> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> index fbf74e8d90..19979d5418 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> @@ -237,6 +237,11 @@ SmmReadSaveState (
>    if ((CpuIndex >= gSmst->NumberOfCpus) || (Buffer == NULL)) {
>      return EFI_INVALID_PARAMETER;
>    }
> +  //
> +  // The AsmLfence() call here is to ensure the above check for the CpuIndex
> +  // has been completed before the execution of subsequent codes.
> +  //
> +  AsmLfence ();
>  
>    //
>    // Check for special EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID
> 

Re: [PATCH v2 1/5] MdePkg/BaseLib: Add new AsmLfence API

[Laszlo Ersek]

Hi Hao,

On 09/25/18 08:12, Hao Wu wrote:
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1193
> 
> This commit will add a new BaseLib API AsmLfence(). This API will perform
> a serializing operation on all load-from-memory instructions that were
> issued prior to the call of this function. Please note that this API is
> only available on IA-32 and x64.
> 
> The purpose of adding this API is to mitigate of the [CVE-2017-5753]
> Bounds Check Bypass issue when untrusted data are being processed within
> SMM. More details can be referred at the 'Bounds check bypass mitigation'
> section at the below link:
> 
> https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation
> 
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: Leif Lindholm <leif.lindholm@linaro.org>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
>  MdePkg/Include/Library/BaseLib.h        | 13 +++++++
>  MdePkg/Library/BaseLib/BaseLib.inf      |  2 ++
>  MdePkg/Library/BaseLib/Ia32/Lfence.nasm | 37 +++++++++++++++++++
>  MdePkg/Library/BaseLib/X64/Lfence.nasm  | 38 ++++++++++++++++++++
>  4 files changed, 90 insertions(+)
> 
> diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
> index 123ae19dc2..656b7736b1 100644
> --- a/MdePkg/Include/Library/BaseLib.h
> +++ b/MdePkg/Include/Library/BaseLib.h
> @@ -9139,6 +9139,19 @@ AsmWriteTr (
>    );
>  
>  /**
> +  Performs a serializing operation on all load-from-memory instructions that
> +  were issued prior the AsmLfence function.
> +
> +  Executes a LFENCE instruction. This function is only available on IA-32 and x64.
> +
> +**/
> +VOID
> +EFIAPI
> +AsmLfence (
> +  VOID
> +  );
> +
> +/**
>    Patch the immediate operand of an IA32 or X64 instruction such that the byte,
>    word, dword or qword operand is encoded at the end of the instruction's
>    binary representation.
> diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
> index a1b5ec4b75..ed15c025f9 100644
> --- a/MdePkg/Library/BaseLib/BaseLib.inf
> +++ b/MdePkg/Library/BaseLib/BaseLib.inf
> @@ -68,6 +68,7 @@
>  
>  [Sources.Ia32]
>    Ia32/WriteTr.nasm
> +  Ia32/Lfence.nasm
>  
>    Ia32/Wbinvd.c | MSFT
>    Ia32/WriteMm7.c | MSFT
> @@ -346,6 +347,7 @@
>    X64/EnableCache.nasm
>    X64/DisableCache.nasm
>    X64/WriteTr.nasm
> +  X64/Lfence.nasm
>  
>    X64/CpuBreakpoint.c | MSFT
>    X64/WriteMsr64.c | MSFT
> diff --git a/MdePkg/Library/BaseLib/Ia32/Lfence.nasm b/MdePkg/Library/BaseLib/Ia32/Lfence.nasm
> new file mode 100644
> index 0000000000..f8b2550ef8
> --- /dev/null
> +++ b/MdePkg/Library/BaseLib/Ia32/Lfence.nasm
> @@ -0,0 +1,37 @@
> +;------------------------------------------------------------------------------ ;
> +; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
> +; This program and the accompanying materials
> +; are licensed and made available under the terms and conditions of the BSD License
> +; which accompanies this distribution.  The full text of the license may be found at
> +; http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +;
> +; Module Name:
> +;
> +;   Lfence.nasm
> +;
> +; Abstract:
> +;
> +;   Performs a serializing operation on all load-from-memory instructions that
> +;   were issued prior to the call of this function.
> +;
> +; Notes:
> +;
> +;------------------------------------------------------------------------------
> +
> +    SECTION .text
> +
> +;------------------------------------------------------------------------------
> +; VOID
> +; EFIAPI
> +; AsmLfence (
> +;   VOID
> +;   );
> +;------------------------------------------------------------------------------
> +global ASM_PFX(AsmLfence)
> +ASM_PFX(AsmLfence):
> +    lfence
> +    ret
> +
> diff --git a/MdePkg/Library/BaseLib/X64/Lfence.nasm b/MdePkg/Library/BaseLib/X64/Lfence.nasm
> new file mode 100644
> index 0000000000..e81c77964b
> --- /dev/null
> +++ b/MdePkg/Library/BaseLib/X64/Lfence.nasm
> @@ -0,0 +1,38 @@
> +;------------------------------------------------------------------------------ ;
> +; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
> +; This program and the accompanying materials
> +; are licensed and made available under the terms and conditions of the BSD License
> +; which accompanies this distribution.  The full text of the license may be found at
> +; http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +;
> +; Module Name:
> +;
> +;   Lfence.nasm
> +;
> +; Abstract:
> +;
> +;   Performs a serializing operation on all load-from-memory instructions that
> +;   were issued prior to the call of this function.
> +;
> +; Notes:
> +;
> +;------------------------------------------------------------------------------
> +
> +    DEFAULT REL
> +    SECTION .text
> +
> +;------------------------------------------------------------------------------
> +; VOID
> +; EFIAPI
> +; AsmLfence (
> +;   VOID
> +;   );
> +;------------------------------------------------------------------------------
> +global ASM_PFX(AsmLfence)
> +ASM_PFX(AsmLfence):
> +    lfence
> +    ret
> +
> 

"git-am" complained about this patch:

> Applying: MdePkg/BaseLib: Add new AsmLfence API
> .git/rebase-apply/patch:94: new blank line at EOF.
> +
> .git/rebase-apply/patch:138: new blank line at EOF.
> +
> warning: 2 lines add whitespace errors.

The message seems to refer to the two new NASM files.

(I think it's OK to strip those empty lines before pushing.)

Thanks
Laszlo

Re: [PATCH v2 0/5] [CVE-2017-5753] Bounds Check Bypass issue in SMI handlers

[Laszlo Ersek]

On 09/25/18 08:12, Hao Wu wrote:
> V2 changes:
> A. Rename the newly introduced BaseLib API to 'AsmLfence', and makes it
>    IA32/X64 specific.
> 
> B. Add brief comments before calls of the AsmLfence() to state the
>    purpose.
> 
> C. Refine the patch for Variable/RuntimeDxe driver and make the change
>    focus on the SMM code.
> 
> V1 history:
> The series aims to mitigate the Bounds Check Bypass (CVE-2017-5753) issues
> within SMI handlers.
> 
> A more detailed explanation of the purpose of the series is under the
> 'Bounds check bypass mitigation' section of the below link:
> https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation
> 
> And the document at:
> https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf
> 
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: Leif Lindholm <leif.lindholm@linaro.org>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> 
> Hao Wu (5):
>   MdePkg/BaseLib: Add new AsmLfence API
>   MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass
>   MdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass
>   MdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass
>   UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass
> 
>  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c   |  7 ++++
>  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf |  1 +
>  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c                 | 10 ++++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c              | 31 ++++++++++++++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c              | 30 ++++++++++++++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h      | 13 ++++++-
>  MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c                  |  6 ++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf      |  1 +
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c               | 18 ++++++++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf             |  1 +
>  MdePkg/Include/Library/BaseLib.h                                       | 13 +++++++
>  MdePkg/Library/BaseLib/BaseLib.inf                                     |  2 ++
>  MdePkg/Library/BaseLib/Ia32/Lfence.nasm                                | 37 +++++++++++++++++++
>  MdePkg/Library/BaseLib/X64/Lfence.nasm                                 | 38 ++++++++++++++++++++
>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c                             |  5 +++
>  15 files changed, 212 insertions(+), 1 deletion(-)
>  create mode 100644 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
>  create mode 100644 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
>  create mode 100644 MdePkg/Library/BaseLib/Ia32/Lfence.nasm
>  create mode 100644 MdePkg/Library/BaseLib/X64/Lfence.nasm
> 

I regression-tested this series using:

(1) roughly the Linux guest steps from
<https://github.com/tianocore/tianocore.github.io/wiki/Testing-SMM-with-QEMU,-KVM-and-libvirt#tests-to-perform-in-the-installed-guest-fedora-26-guest>.


Those steps cover all of the SMM variable driver, the SMM FTW driver,
the SMM lockbox, and PiSmmCpuDxeSmm.

(2) For briefly checking the runtime (non-SMM) variable driver, I booted
Fedora guests on X64 OVMF and AARCH64 ArmVirtQemu, and invoked
"efibootmgr -v".

series
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>

Thanks,
Laszlo

Re: [PATCH v2 0/5] [CVE-2017-5753] Bounds Check Bypass issue in SMI handlers

[Laszlo Ersek]

On 09/25/18 22:51, Laszlo Ersek wrote:
> On 09/25/18 08:12, Hao Wu wrote:
>> V2 changes:
>> A. Rename the newly introduced BaseLib API to 'AsmLfence', and makes it
>>    IA32/X64 specific.
>>
>> B. Add brief comments before calls of the AsmLfence() to state the
>>    purpose.
>>
>> C. Refine the patch for Variable/RuntimeDxe driver and make the change
>>    focus on the SMM code.
>>
>> V1 history:
>> The series aims to mitigate the Bounds Check Bypass (CVE-2017-5753) issues
>> within SMI handlers.
>>
>> A more detailed explanation of the purpose of the series is under the
>> 'Bounds check bypass mitigation' section of the below link:
>> https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation
>>
>> And the document at:
>> https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf
>>
>> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> Cc: Leif Lindholm <leif.lindholm@linaro.org>
>> Cc: Laszlo Ersek <lersek@redhat.com>
>> Cc: Jiewen Yao <jiewen.yao@intel.com>
>> Cc: Michael D Kinney <michael.d.kinney@intel.com>
>> Cc: Liming Gao <liming.gao@intel.com>
>> Cc: Star Zeng <star.zeng@intel.com>
>> Cc: Eric Dong <eric.dong@intel.com>
>>
>> Hao Wu (5):
>>   MdePkg/BaseLib: Add new AsmLfence API
>>   MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass
>>   MdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass
>>   MdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass
>>   UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass
>>
>>  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c   |  7 ++++
>>  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf |  1 +
>>  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c                 | 10 ++++++
>>  MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c              | 31 ++++++++++++++++
>>  MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c              | 30 ++++++++++++++++
>>  MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h      | 13 ++++++-
>>  MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c                  |  6 ++++
>>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf      |  1 +
>>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c               | 18 ++++++++++
>>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf             |  1 +
>>  MdePkg/Include/Library/BaseLib.h                                       | 13 +++++++
>>  MdePkg/Library/BaseLib/BaseLib.inf                                     |  2 ++
>>  MdePkg/Library/BaseLib/Ia32/Lfence.nasm                                | 37 +++++++++++++++++++
>>  MdePkg/Library/BaseLib/X64/Lfence.nasm                                 | 38 ++++++++++++++++++++
>>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c                             |  5 +++
>>  15 files changed, 212 insertions(+), 1 deletion(-)
>>  create mode 100644 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
>>  create mode 100644 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
>>  create mode 100644 MdePkg/Library/BaseLib/Ia32/Lfence.nasm
>>  create mode 100644 MdePkg/Library/BaseLib/X64/Lfence.nasm
>>
> 
> I regression-tested this series using:
> 
> (1) roughly the Linux guest steps from
> <https://github.com/tianocore/tianocore.github.io/wiki/Testing-SMM-with-QEMU,-KVM-and-libvirt#tests-to-perform-in-the-installed-guest-fedora-26-guest>.
> 
> 
> Those steps cover all of the SMM variable driver, the SMM FTW driver,
> the SMM lockbox, and PiSmmCpuDxeSmm.
> 
> (2) For briefly checking the runtime (non-SMM) variable driver, I booted
> Fedora guests on X64 OVMF and AARCH64 ArmVirtQemu, and invoked
> "efibootmgr -v".
> 
> series
> Regression-tested-by: Laszlo Ersek <lersek@redhat.com>

It's been a long day. I meant to describe another detail of the test
environment:

Because of the regression reported at
<https://bugzilla.tianocore.org/show_bug.cgi?id=1207>, OVMF is currently
unbootable. Therefore I first applied my fix from
<https://bugzilla.tianocore.org/show_bug.cgi?id=1207#c2> on top of
current master (3cb0a311cb7e). I applied this series of yours for
regression testing on top of my fix.

Thanks
Laszlo

Re: [PATCH v2 5/5] UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass

[Dong, Eric]

Reviewed-by: Eric Dong <eric.dong@intel.com>

> -----Original Message-----
> From: Wu, Hao A
> Sent: Tuesday, September 25, 2018 2:13 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A <hao.a.wu@intel.com>; Laszlo Ersek <lersek@redhat.com>;
> Yao, Jiewen <jiewen.yao@intel.com>; Kinney, Michael D
> <michael.d.kinney@intel.com>; Dong, Eric <eric.dong@intel.com>
> Subject: [PATCH v2 5/5] UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753]
> Fix bounds check bypass
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194
> 
> Speculative execution is used by processor to avoid having to wait for
> data to arrive from memory, or for previous operations to finish, the
> processor may speculate as to what will be executed.
> 
> If the speculation is incorrect, the speculatively executed instructions
> might leave hints such as which memory locations have been brought into
> cache. Malicious actors can use the bounds check bypass method (code
> gadgets with controlled external inputs) to infer data values that have
> been used in speculative operations to reveal secrets which should not
> otherwise be accessed.
> 
> It is possible for SMI handler(s) to call EFI_SMM_CPU_PROTOCOL service
> ReadSaveState() and use the content in the 'CommBuffer' (controlled
> external inputs) as the 'CpuIndex'. So this commit will insert AsmLfence
> API to mitigate the bounds check bypass issue within SmmReadSaveState().
> 
> For SmmReadSaveState():
> 
> The 'CpuIndex' will be passed into function ReadSaveStateRegister(). And
> then in to ReadSaveStateRegisterByIndex().
> 
> With the call:
> ReadSaveStateRegisterByIndex (
>   CpuIndex,
>   SMM_SAVE_STATE_REGISTER_IOMISC_INDEX,
>   sizeof(IoMisc.Uint32),
>   &IoMisc.Uint32
>   );
> 
> The 'IoMisc' can be a cross boundary access during speculative execution.
> Later, 'IoMisc' is used as the index to access buffers 'mSmmCpuIoWidth'
> and 'mSmmCpuIoType'. One can observe which part of the content within
> those buffers was brought into cache to possibly reveal the value of
> 'IoMisc'.
> 
> Hence, this commit adds a AsmLfence() after the check of 'CpuIndex'
> within function SmmReadSaveState() to prevent the speculative execution.
> 
> A more detailed explanation of the purpose of commit is under the
> 'Bounds check bypass mitigation' section of the below link:
> https://software.intel.com/security-software-guidance/insights/host-
> firmware-speculative-execution-side-channel-mitigation
> 
> And the document at:
> https://software.intel.com/security-software-guidance/api-
> app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-
> vulnerabilities.pdf
> 
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> 
> cb pismm
> ---
>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 5 +++++
>  1 file changed, 5 insertions(+)
> 
> diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> index fbf74e8d90..19979d5418 100644
> --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> @@ -237,6 +237,11 @@ SmmReadSaveState (
>    if ((CpuIndex >= gSmst->NumberOfCpus) || (Buffer == NULL)) {
>      return EFI_INVALID_PARAMETER;
>    }
> +  //
> +  // The AsmLfence() call here is to ensure the above check for the
> CpuIndex
> +  // has been completed before the execution of subsequent codes.
> +  //
> +  AsmLfence ();
> 
>    //
>    // Check for special EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID
> --
> 2.12.0.windows.1

Re: [PATCH v2 5/5] UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass

[Wu, Hao A]

> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Laszlo
> Ersek
> Sent: Tuesday, September 25, 2018 8:09 PM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Kinney, Michael D; Yao, Jiewen; Dong, Eric
> Subject: Re: [edk2] [PATCH v2 5/5] UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-
> 5753] Fix bounds check bypass
> 
> On 09/25/18 08:12, Hao Wu wrote:
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194
> >
> > Speculative execution is used by processor to avoid having to wait for
> > data to arrive from memory, or for previous operations to finish, the
> > processor may speculate as to what will be executed.
> >
> > If the speculation is incorrect, the speculatively executed instructions
> > might leave hints such as which memory locations have been brought into
> > cache. Malicious actors can use the bounds check bypass method (code
> > gadgets with controlled external inputs) to infer data values that have
> > been used in speculative operations to reveal secrets which should not
> > otherwise be accessed.
> >
> > It is possible for SMI handler(s) to call EFI_SMM_CPU_PROTOCOL service
> > ReadSaveState() and use the content in the 'CommBuffer' (controlled
> > external inputs) as the 'CpuIndex'. So this commit will insert AsmLfence
> > API to mitigate the bounds check bypass issue within SmmReadSaveState().
> >
> > For SmmReadSaveState():
> >
> > The 'CpuIndex' will be passed into function ReadSaveStateRegister(). And
> > then in to ReadSaveStateRegisterByIndex().
> >
> > With the call:
> > ReadSaveStateRegisterByIndex (
> >   CpuIndex,
> >   SMM_SAVE_STATE_REGISTER_IOMISC_INDEX,
> >   sizeof(IoMisc.Uint32),
> >   &IoMisc.Uint32
> >   );
> >
> > The 'IoMisc' can be a cross boundary access during speculative execution.
> > Later, 'IoMisc' is used as the index to access buffers 'mSmmCpuIoWidth'
> > and 'mSmmCpuIoType'. One can observe which part of the content within
> > those buffers was brought into cache to possibly reveal the value of
> > 'IoMisc'.
> >
> > Hence, this commit adds a AsmLfence() after the check of 'CpuIndex'
> > within function SmmReadSaveState() to prevent the speculative execution.
> >
> > A more detailed explanation of the purpose of commit is under the
> > 'Bounds check bypass mitigation' section of the below link:
> > https://software.intel.com/security-software-guidance/insights/host-
> firmware-speculative-execution-side-channel-mitigation
> >
> > And the document at:
> > https://software.intel.com/security-software-guidance/api-
> app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-
> vulnerabilities.pdf
> >
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Eric Dong <eric.dong@intel.com>
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> >
> > cb pismm
> 
> Before you push this version (or when preparing a v3, if necessary),
> please remove the above stray text, from the end of the commit message.
> 

Thanks for the spot, I will remove this dummy line from the log message.

Best Regards,
Hao Wu

> I've now looked over this series. I didn't try to verify whether the
> lfence instructions had been added at right places, or whether they had
> been added at *all* the right places. However, structurally the series
> looks OK to me.
> 
> series
> Acked-by: Laszlo Ersek <lersek@redhat.com>
> 
> I will follow up with regression test results.
> 
> Thanks
> Laszlo
> 
> > ---
> >  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> > index fbf74e8d90..19979d5418 100644
> > --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> > +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> > @@ -237,6 +237,11 @@ SmmReadSaveState (
> >    if ((CpuIndex >= gSmst->NumberOfCpus) || (Buffer == NULL)) {
> >      return EFI_INVALID_PARAMETER;
> >    }
> > +  //
> > +  // The AsmLfence() call here is to ensure the above check for the CpuIndex
> > +  // has been completed before the execution of subsequent codes.
> > +  //
> > +  AsmLfence ();
> >
> >    //
> >    // Check for special EFI_SMM_SAVE_STATE_REGISTER_PROCESSOR_ID
> >
> 
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel

Re: [PATCH v2 1/5] MdePkg/BaseLib: Add new AsmLfence API

[Wu, Hao A]

> -----Original Message-----
> From: Laszlo Ersek [mailto:lersek@redhat.com]
> Sent: Tuesday, September 25, 2018 9:01 PM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Yao, Jiewen; Gao, Liming; Kinney, Michael D
> Subject: Re: [edk2] [PATCH v2 1/5] MdePkg/BaseLib: Add new AsmLfence API
> 
> Hi Hao,
> 
> On 09/25/18 08:12, Hao Wu wrote:
> > REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1193
> >
> > This commit will add a new BaseLib API AsmLfence(). This API will perform
> > a serializing operation on all load-from-memory instructions that were
> > issued prior to the call of this function. Please note that this API is
> > only available on IA-32 and x64.
> >
> > The purpose of adding this API is to mitigate of the [CVE-2017-5753]
> > Bounds Check Bypass issue when untrusted data are being processed within
> > SMM. More details can be referred at the 'Bounds check bypass mitigation'
> > section at the below link:
> >
> > https://software.intel.com/security-software-guidance/insights/host-
> firmware-speculative-execution-side-channel-mitigation
> >
> > Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > Cc: Leif Lindholm <leif.lindholm@linaro.org>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Liming Gao <liming.gao@intel.com>
> > Contributed-under: TianoCore Contribution Agreement 1.1
> > Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> > ---
> >  MdePkg/Include/Library/BaseLib.h        | 13 +++++++
> >  MdePkg/Library/BaseLib/BaseLib.inf      |  2 ++
> >  MdePkg/Library/BaseLib/Ia32/Lfence.nasm | 37 +++++++++++++++++++
> >  MdePkg/Library/BaseLib/X64/Lfence.nasm  | 38 ++++++++++++++++++++
> >  4 files changed, 90 insertions(+)
> >
> > diff --git a/MdePkg/Include/Library/BaseLib.h
> b/MdePkg/Include/Library/BaseLib.h
> > index 123ae19dc2..656b7736b1 100644
> > --- a/MdePkg/Include/Library/BaseLib.h
> > +++ b/MdePkg/Include/Library/BaseLib.h
> > @@ -9139,6 +9139,19 @@ AsmWriteTr (
> >    );
> >
> >  /**
> > +  Performs a serializing operation on all load-from-memory instructions that
> > +  were issued prior the AsmLfence function.
> > +
> > +  Executes a LFENCE instruction. This function is only available on IA-32 and
> x64.
> > +
> > +**/
> > +VOID
> > +EFIAPI
> > +AsmLfence (
> > +  VOID
> > +  );
> > +
> > +/**
> >    Patch the immediate operand of an IA32 or X64 instruction such that the
> byte,
> >    word, dword or qword operand is encoded at the end of the instruction's
> >    binary representation.
> > diff --git a/MdePkg/Library/BaseLib/BaseLib.inf
> b/MdePkg/Library/BaseLib/BaseLib.inf
> > index a1b5ec4b75..ed15c025f9 100644
> > --- a/MdePkg/Library/BaseLib/BaseLib.inf
> > +++ b/MdePkg/Library/BaseLib/BaseLib.inf
> > @@ -68,6 +68,7 @@
> >
> >  [Sources.Ia32]
> >    Ia32/WriteTr.nasm
> > +  Ia32/Lfence.nasm
> >
> >    Ia32/Wbinvd.c | MSFT
> >    Ia32/WriteMm7.c | MSFT
> > @@ -346,6 +347,7 @@
> >    X64/EnableCache.nasm
> >    X64/DisableCache.nasm
> >    X64/WriteTr.nasm
> > +  X64/Lfence.nasm
> >
> >    X64/CpuBreakpoint.c | MSFT
> >    X64/WriteMsr64.c | MSFT
> > diff --git a/MdePkg/Library/BaseLib/Ia32/Lfence.nasm
> b/MdePkg/Library/BaseLib/Ia32/Lfence.nasm
> > new file mode 100644
> > index 0000000000..f8b2550ef8
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseLib/Ia32/Lfence.nasm
> > @@ -0,0 +1,37 @@
> > +;------------------------------------------------------------------------------ ;
> > +; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
> > +; This program and the accompanying materials
> > +; are licensed and made available under the terms and conditions of the BSD
> License
> > +; which accompanies this distribution.  The full text of the license may be
> found at
> > +; http://opensource.org/licenses/bsd-license.php.
> > +;
> > +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> > +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> > +;
> > +; Module Name:
> > +;
> > +;   Lfence.nasm
> > +;
> > +; Abstract:
> > +;
> > +;   Performs a serializing operation on all load-from-memory instructions
> that
> > +;   were issued prior to the call of this function.
> > +;
> > +; Notes:
> > +;
> > +;------------------------------------------------------------------------------
> > +
> > +    SECTION .text
> > +
> > +;------------------------------------------------------------------------------
> > +; VOID
> > +; EFIAPI
> > +; AsmLfence (
> > +;   VOID
> > +;   );
> > +;------------------------------------------------------------------------------
> > +global ASM_PFX(AsmLfence)
> > +ASM_PFX(AsmLfence):
> > +    lfence
> > +    ret
> > +
> > diff --git a/MdePkg/Library/BaseLib/X64/Lfence.nasm
> b/MdePkg/Library/BaseLib/X64/Lfence.nasm
> > new file mode 100644
> > index 0000000000..e81c77964b
> > --- /dev/null
> > +++ b/MdePkg/Library/BaseLib/X64/Lfence.nasm
> > @@ -0,0 +1,38 @@
> > +;------------------------------------------------------------------------------ ;
> > +; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
> > +; This program and the accompanying materials
> > +; are licensed and made available under the terms and conditions of the BSD
> License
> > +; which accompanies this distribution.  The full text of the license may be
> found at
> > +; http://opensource.org/licenses/bsd-license.php.
> > +;
> > +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS"
> BASIS,
> > +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER
> EXPRESS OR IMPLIED.
> > +;
> > +; Module Name:
> > +;
> > +;   Lfence.nasm
> > +;
> > +; Abstract:
> > +;
> > +;   Performs a serializing operation on all load-from-memory instructions
> that
> > +;   were issued prior to the call of this function.
> > +;
> > +; Notes:
> > +;
> > +;------------------------------------------------------------------------------
> > +
> > +    DEFAULT REL
> > +    SECTION .text
> > +
> > +;------------------------------------------------------------------------------
> > +; VOID
> > +; EFIAPI
> > +; AsmLfence (
> > +;   VOID
> > +;   );
> > +;------------------------------------------------------------------------------
> > +global ASM_PFX(AsmLfence)
> > +ASM_PFX(AsmLfence):
> > +    lfence
> > +    ret
> > +
> >
> 
> "git-am" complained about this patch:
> 
> > Applying: MdePkg/BaseLib: Add new AsmLfence API
> > .git/rebase-apply/patch:94: new blank line at EOF.
> > +
> > .git/rebase-apply/patch:138: new blank line at EOF.
> > +
> > warning: 2 lines add whitespace errors.
> 
> The message seems to refer to the two new NASM files.
> 
> (I think it's OK to strip those empty lines before pushing.)

Hi Laszlo,

After some quick checks, I found that both the newly introduced NASM files
have an extra empty line before the EOF.

I will remove them and just keep one empty line before EOF for those 2 
NASM files.

Thanks for spotting the issue.

Best Regards,
Hao Wu

> 
> Thanks
> Laszlo

Re: [PATCH v2 0/5] [CVE-2017-5753] Bounds Check Bypass issue in SMI handlers

[Wu, Hao A]

> -----Original Message-----
> From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Laszlo
> Ersek
> Sent: Wednesday, September 26, 2018 4:57 AM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Kinney, Michael D; Zeng, Star; Yao, Jiewen; Dong, Eric; Gao, Liming
> Subject: Re: [edk2] [PATCH v2 0/5] [CVE-2017-5753] Bounds Check Bypass issue
> in SMI handlers
> 
> On 09/25/18 22:51, Laszlo Ersek wrote:
> > On 09/25/18 08:12, Hao Wu wrote:
> >> V2 changes:
> >> A. Rename the newly introduced BaseLib API to 'AsmLfence', and makes it
> >>    IA32/X64 specific.
> >>
> >> B. Add brief comments before calls of the AsmLfence() to state the
> >>    purpose.
> >>
> >> C. Refine the patch for Variable/RuntimeDxe driver and make the change
> >>    focus on the SMM code.
> >>
> >> V1 history:
> >> The series aims to mitigate the Bounds Check Bypass (CVE-2017-5753)
> issues
> >> within SMI handlers.
> >>
> >> A more detailed explanation of the purpose of the series is under the
> >> 'Bounds check bypass mitigation' section of the below link:
> >> https://software.intel.com/security-software-guidance/insights/host-
> firmware-speculative-execution-side-channel-mitigation
> >>
> >> And the document at:
> >> https://software.intel.com/security-software-guidance/api-
> app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-
> vulnerabilities.pdf
> >>
> >> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> >> Cc: Leif Lindholm <leif.lindholm@linaro.org>
> >> Cc: Laszlo Ersek <lersek@redhat.com>
> >> Cc: Jiewen Yao <jiewen.yao@intel.com>
> >> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> >> Cc: Liming Gao <liming.gao@intel.com>
> >> Cc: Star Zeng <star.zeng@intel.com>
> >> Cc: Eric Dong <eric.dong@intel.com>
> >>
> >> Hao Wu (5):
> >>   MdePkg/BaseLib: Add new AsmLfence API
> >>   MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check
> bypass
> >>   MdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass
> >>   MdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass
> >>   UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check bypass
> >>
> >>
> MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c   |
> 7 ++++
> >>
> MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
> |  1 +
> >>  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c
> | 10 ++++++
> >>  MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c              |
> 31 ++++++++++++++++
> >>  MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
> | 30 ++++++++++++++++
> >>  MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h
> | 13 ++++++-
> >>  MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c                  |  6
> ++++
> >>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
> |  1 +
> >>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c               |
> 18 ++++++++++
> >>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf             |
> 1 +
> >>  MdePkg/Include/Library/BaseLib.h                                       | 13 +++++++
> >>  MdePkg/Library/BaseLib/BaseLib.inf                                     |  2 ++
> >>  MdePkg/Library/BaseLib/Ia32/Lfence.nasm                                | 37
> +++++++++++++++++++
> >>  MdePkg/Library/BaseLib/X64/Lfence.nasm                                 | 38
> ++++++++++++++++++++
> >>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c                             |  5
> +++
> >>  15 files changed, 212 insertions(+), 1 deletion(-)
> >>  create mode 100644
> MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
> >>  create mode 100644
> MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
> >>  create mode 100644 MdePkg/Library/BaseLib/Ia32/Lfence.nasm
> >>  create mode 100644 MdePkg/Library/BaseLib/X64/Lfence.nasm
> >>
> >
> > I regression-tested this series using:
> >
> > (1) roughly the Linux guest steps from
> > <https://github.com/tianocore/tianocore.github.io/wiki/Testing-SMM-with-
> QEMU,-KVM-and-libvirt#tests-to-perform-in-the-installed-guest-fedora-26-
> guest>.
> >
> >
> > Those steps cover all of the SMM variable driver, the SMM FTW driver,
> > the SMM lockbox, and PiSmmCpuDxeSmm.
> >
> > (2) For briefly checking the runtime (non-SMM) variable driver, I booted
> > Fedora guests on X64 OVMF and AARCH64 ArmVirtQemu, and invoked
> > "efibootmgr -v".
> >
> > series
> > Regression-tested-by: Laszlo Ersek <lersek@redhat.com>
> 
> It's been a long day. I meant to describe another detail of the test
> environment:
> 
> Because of the regression reported at
> <https://bugzilla.tianocore.org/show_bug.cgi?id=1207>, OVMF is currently
> unbootable. Therefore I first applied my fix from
> <https://bugzilla.tianocore.org/show_bug.cgi?id=1207#c2> on top of
> current master (3cb0a311cb7e). I applied this series of yours for
> regression testing on top of my fix.

Hi Laszlo,

Really appreciate the help for the regression tests.

I will document the those regression tests (also with the details) within
the BZ trackers:
https://bugzilla.tianocore.org/show_bug.cgi?id=1193
https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Best Regards,
Hao Wu

> 
> Thanks
> Laszlo
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel

Re: [PATCH v2 0/5] [CVE-2017-5753] Bounds Check Bypass issue in SMI handlers

[Yao, Jiewen]

Reviewed-by: Jiewen.yao@intel.com

> -----Original Message-----
> From: Wu, Hao A
> Sent: Tuesday, September 25, 2018 2:13 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A <hao.a.wu@intel.com>; Ard Biesheuvel
> <ard.biesheuvel@linaro.org>; Leif Lindholm <leif.lindholm@linaro.org>;
> Laszlo Ersek <lersek@redhat.com>; Yao, Jiewen <jiewen.yao@intel.com>;
> Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming
> <liming.gao@intel.com>; Zeng, Star <star.zeng@intel.com>; Dong, Eric
> <eric.dong@intel.com>
> Subject: [PATCH v2 0/5] [CVE-2017-5753] Bounds Check Bypass issue in SMI
> handlers
> 
> V2 changes:
> A. Rename the newly introduced BaseLib API to 'AsmLfence', and makes it
>    IA32/X64 specific.
> 
> B. Add brief comments before calls of the AsmLfence() to state the
>    purpose.
> 
> C. Refine the patch for Variable/RuntimeDxe driver and make the change
>    focus on the SMM code.
> 
> V1 history:
> The series aims to mitigate the Bounds Check Bypass (CVE-2017-5753) issues
> within SMI handlers.
> 
> A more detailed explanation of the purpose of the series is under the
> 'Bounds check bypass mitigation' section of the below link:
> https://software.intel.com/security-software-guidance/insights/host-firmw
> are-speculative-execution-side-channel-mitigation
> 
> And the document at:
> https://software.intel.com/security-software-guidance/api-app/sites/defaul
> t/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf
> 
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: Leif Lindholm <leif.lindholm@linaro.org>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Cc: Eric Dong <eric.dong@intel.com>
> 
> Hao Wu (5):
>   MdePkg/BaseLib: Add new AsmLfence API
>   MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check
> bypass
>   MdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass
>   MdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass
>   UefiCpuPkg/PiSmmCpuDxeSmm: [CVE-2017-5753] Fix bounds check
> bypass
> 
> 
> MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
> |  7 ++++
> 
> MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.in
> f |  1 +
>  MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c
> | 10 ++++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
> | 31 ++++++++++++++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
> | 30 ++++++++++++++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h
> | 13 ++++++-
>  MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
> |  6 ++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
> |  1 +
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c
> | 18 ++++++++++
>  MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
> |  1 +
>  MdePkg/Include/Library/BaseLib.h
> | 13 +++++++
>  MdePkg/Library/BaseLib/BaseLib.inf
> |  2 ++
>  MdePkg/Library/BaseLib/Ia32/Lfence.nasm
> | 37 +++++++++++++++++++
>  MdePkg/Library/BaseLib/X64/Lfence.nasm
> | 38 ++++++++++++++++++++
>  UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c
> |  5 +++
>  15 files changed, 212 insertions(+), 1 deletion(-)
>  create mode 100644
> MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
>  create mode 100644
> MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
>  create mode 100644 MdePkg/Library/BaseLib/Ia32/Lfence.nasm
>  create mode 100644 MdePkg/Library/BaseLib/X64/Lfence.nasm
> 
> --
> 2.12.0.windows.1

Re: [PATCH v2 1/5] MdePkg/BaseLib: Add new AsmLfence API

[Gao, Liming]

Reviewed-by: Liming Gao <liming.gao@intel.com>

> -----Original Message-----
> From: Wu, Hao A
> Sent: Tuesday, September 25, 2018 2:13 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A <hao.a.wu@intel.com>; Ard Biesheuvel <ard.biesheuvel@linaro.org>; Leif Lindholm <leif.lindholm@linaro.org>; Laszlo
> Ersek <lersek@redhat.com>; Yao, Jiewen <jiewen.yao@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com>; Gao, Liming
> <liming.gao@intel.com>
> Subject: [PATCH v2 1/5] MdePkg/BaseLib: Add new AsmLfence API
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1193
> 
> This commit will add a new BaseLib API AsmLfence(). This API will perform
> a serializing operation on all load-from-memory instructions that were
> issued prior to the call of this function. Please note that this API is
> only available on IA-32 and x64.
> 
> The purpose of adding this API is to mitigate of the [CVE-2017-5753]
> Bounds Check Bypass issue when untrusted data are being processed within
> SMM. More details can be referred at the 'Bounds check bypass mitigation'
> section at the below link:
> 
> https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation
> 
> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> Cc: Leif Lindholm <leif.lindholm@linaro.org>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <liming.gao@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
>  MdePkg/Include/Library/BaseLib.h        | 13 +++++++
>  MdePkg/Library/BaseLib/BaseLib.inf      |  2 ++
>  MdePkg/Library/BaseLib/Ia32/Lfence.nasm | 37 +++++++++++++++++++
>  MdePkg/Library/BaseLib/X64/Lfence.nasm  | 38 ++++++++++++++++++++
>  4 files changed, 90 insertions(+)
> 
> diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h
> index 123ae19dc2..656b7736b1 100644
> --- a/MdePkg/Include/Library/BaseLib.h
> +++ b/MdePkg/Include/Library/BaseLib.h
> @@ -9139,6 +9139,19 @@ AsmWriteTr (
>    );
> 
>  /**
> +  Performs a serializing operation on all load-from-memory instructions that
> +  were issued prior the AsmLfence function.
> +
> +  Executes a LFENCE instruction. This function is only available on IA-32 and x64.
> +
> +**/
> +VOID
> +EFIAPI
> +AsmLfence (
> +  VOID
> +  );
> +
> +/**
>    Patch the immediate operand of an IA32 or X64 instruction such that the byte,
>    word, dword or qword operand is encoded at the end of the instruction's
>    binary representation.
> diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf
> index a1b5ec4b75..ed15c025f9 100644
> --- a/MdePkg/Library/BaseLib/BaseLib.inf
> +++ b/MdePkg/Library/BaseLib/BaseLib.inf
> @@ -68,6 +68,7 @@
> 
>  [Sources.Ia32]
>    Ia32/WriteTr.nasm
> +  Ia32/Lfence.nasm
> 
>    Ia32/Wbinvd.c | MSFT
>    Ia32/WriteMm7.c | MSFT
> @@ -346,6 +347,7 @@
>    X64/EnableCache.nasm
>    X64/DisableCache.nasm
>    X64/WriteTr.nasm
> +  X64/Lfence.nasm
> 
>    X64/CpuBreakpoint.c | MSFT
>    X64/WriteMsr64.c | MSFT
> diff --git a/MdePkg/Library/BaseLib/Ia32/Lfence.nasm b/MdePkg/Library/BaseLib/Ia32/Lfence.nasm
> new file mode 100644
> index 0000000000..f8b2550ef8
> --- /dev/null
> +++ b/MdePkg/Library/BaseLib/Ia32/Lfence.nasm
> @@ -0,0 +1,37 @@
> +;------------------------------------------------------------------------------ ;
> +; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
> +; This program and the accompanying materials
> +; are licensed and made available under the terms and conditions of the BSD License
> +; which accompanies this distribution.  The full text of the license may be found at
> +; http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +;
> +; Module Name:
> +;
> +;   Lfence.nasm
> +;
> +; Abstract:
> +;
> +;   Performs a serializing operation on all load-from-memory instructions that
> +;   were issued prior to the call of this function.
> +;
> +; Notes:
> +;
> +;------------------------------------------------------------------------------
> +
> +    SECTION .text
> +
> +;------------------------------------------------------------------------------
> +; VOID
> +; EFIAPI
> +; AsmLfence (
> +;   VOID
> +;   );
> +;------------------------------------------------------------------------------
> +global ASM_PFX(AsmLfence)
> +ASM_PFX(AsmLfence):
> +    lfence
> +    ret
> +
> diff --git a/MdePkg/Library/BaseLib/X64/Lfence.nasm b/MdePkg/Library/BaseLib/X64/Lfence.nasm
> new file mode 100644
> index 0000000000..e81c77964b
> --- /dev/null
> +++ b/MdePkg/Library/BaseLib/X64/Lfence.nasm
> @@ -0,0 +1,38 @@
> +;------------------------------------------------------------------------------ ;
> +; Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
> +; This program and the accompanying materials
> +; are licensed and made available under the terms and conditions of the BSD License
> +; which accompanies this distribution.  The full text of the license may be found at
> +; http://opensource.org/licenses/bsd-license.php.
> +;
> +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> +;
> +; Module Name:
> +;
> +;   Lfence.nasm
> +;
> +; Abstract:
> +;
> +;   Performs a serializing operation on all load-from-memory instructions that
> +;   were issued prior to the call of this function.
> +;
> +; Notes:
> +;
> +;------------------------------------------------------------------------------
> +
> +    DEFAULT REL
> +    SECTION .text
> +
> +;------------------------------------------------------------------------------
> +; VOID
> +; EFIAPI
> +; AsmLfence (
> +;   VOID
> +;   );
> +;------------------------------------------------------------------------------
> +global ASM_PFX(AsmLfence)
> +ASM_PFX(AsmLfence):
> +    lfence
> +    ret
> +
> --
> 2.12.0.windows.1

Re: [PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass

[Zeng, Star]

Please double check whether the AsmLfence calling should be before the line below.

        PrivateData = (VOID *)&SmmFtwWriteHeader->Data[Length];


Thanks,
Star
-----Original Message-----
From: Wu, Hao A 
Sent: Tuesday, September 25, 2018 2:13 PM
To: edk2-devel@lists.01.org
Cc: Wu, Hao A <hao.a.wu@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>; Zeng, Star <star.zeng@intel.com>
Subject: [PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for data to arrive from memory, or for previous operations to finish, the processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions might leave hints such as which memory locations have been brought into cache. Malicious actors can use the bounds check bypass method (code gadgets with controlled external inputs) to infer data values that have been used in speculative operations to reveal secrets which should not otherwise be accessed.

This commit will focus on the SMI handler(s) registered within the FaultTolerantWriteDxe driver and insert AsmLfence API to mitigate the bounds check bypass issue.

For SMI handler SmmFaultTolerantWriteHandler():

Under "case FTW_FUNCTION_WRITE:", 'SmmFtwWriteHeader->Length' can be a potential cross boundary access of the 'CommBuffer' (controlled external
inputs) during speculative execution. This cross boundary access is later passed as parameter 'Length' into function FtwWrite().

Within function FtwWrite(), the value of 'Length' can be inferred by code:
"CopyMem (MyBuffer + Offset, Buffer, Length);". One can observe which part of the content within 'Buffer' was brought into cache to possibly reveal the value of 'Length'.

Hence, this commit adds a AsmLfence() after the boundary/range checks of 'CommBuffer' to prevent the speculative execution.

A more detailed explanation of the purpose of commit is under the 'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c   | 7 +++++++
 MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf | 1 +
 2 files changed, 8 insertions(+)

diff --git a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
index 632313f076..27fcab19b6 100644
--- a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
+++ b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm
+++ .c
@@ -57,6 +57,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #include <PiSmm.h>
 #include <Library/SmmServicesTableLib.h>  #include <Library/SmmMemLib.h>
+#include <Library/BaseLib.h>
 #include <Protocol/SmmSwapAddressRange.h>  #include "FaultTolerantWrite.h"
 #include "FaultTolerantWriteSmmCommon.h"
@@ -417,6 +418,12 @@ SmmFaultTolerantWriteHandler (
                  &SmmFvbHandle
                  );
       if (!EFI_ERROR (Status)) {
+        //
+        // The AsmLfence() call here is to ensure the previous range/content
+        // checks for the CommBuffer have been completed before calling into
+        // FtwWrite().
+        //
+        AsmLfence ();
         Status = FtwWrite(
                    &mFtwDevice->FtwInstance,
                    SmmFtwWriteHeader->Lba, diff --git a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
index 85d109e8d9..606cc2266b 100644
--- a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
+++ b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm
+++ .inf
@@ -55,6 +55,7 @@
   PcdLib
   ReportStatusCodeLib
   SmmMemLib
+  BaseLib
 
 [Guids]
   #
--
2.12.0.windows.1

Re: [PATCH v2 3/5] MdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass

[Zeng, Star]

Reviewed-by: Star Zeng <star.zeng@intel.com>

-----Original Message-----
From: Wu, Hao A 
Sent: Tuesday, September 25, 2018 2:13 PM
To: edk2-devel@lists.01.org
Cc: Wu, Hao A <hao.a.wu@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>; Zeng, Star <star.zeng@intel.com>
Subject: [PATCH v2 3/5] MdeModulePkg/SmmLockBox: [CVE-2017-5753] Fix bounds check bypass

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for data to arrive from memory, or for previous operations to finish, the processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions might leave hints such as which memory locations have been brought into cache. Malicious actors can use the bounds check bypass method (code gadgets with controlled external inputs) to infer data values that have been used in speculative operations to reveal secrets which should not otherwise be accessed.

This commit will focus on the SMI handler(s) registered within the SmmLockBox driver and insert AsmLfence API to mitigate the bounds check bypass issue.

For SMI handler SmmLockBoxHandler():

Under "case EFI_SMM_LOCK_BOX_COMMAND_SAVE:", the 'CommBuffer' (controlled external inputs) is passed to function SmmLockBoxSave().

'TempLockBoxParameterSave.Length' can be a potential cross boundary access of the 'CommBuffer' during speculative execution. This cross boundary access is later passed as parameter 'Length' into function SaveLockBox().

Within function SaveLockBox(), the value of 'Length' can be inferred by
code:
"CopyMem ((VOID *)(UINTN)SmramBuffer, (VOID *)(UINTN)Buffer, Length);".
One can observe which part of the content within 'Buffer' was brought into cache to possibly reveal the value of 'Length'.

Hence, this commit adds a AsmLfence() after the boundary/range checks of 'CommBuffer' to prevent the speculative execution.

And there is a similar case under "case EFI_SMM_LOCK_BOX_COMMAND_UPDATE:"
function SmmLockBoxUpdate() as well. This commits also handles it.

A more detailed explanation of the purpose of commit is under the 'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c b/MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c
index 5a11743cb9..c1c9aa5663 100644
--- a/MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c
+++ b/MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.c
@@ -76,6 +76,11 @@ SmmLockBoxSave (
     LockBoxParameterSave->Header.ReturnStatus = (UINT64)EFI_ACCESS_DENIED;
     return ;
   }
+  //
+  // The AsmLfence() call here is to ensure the above range check for 
+ the  // CommBuffer have been completed before calling into SaveLockBox().
+  //
+  AsmLfence ();
 
   //
   // Save data
@@ -160,6 +165,11 @@ SmmLockBoxUpdate (
     LockBoxParameterUpdate->Header.ReturnStatus = (UINT64)EFI_ACCESS_DENIED;
     return ;
   }
+  //
+  // The AsmLfence() call here is to ensure the above range check for 
+ the  // CommBuffer have been completed before calling into UpdateLockBox().
+  //
+  AsmLfence ();
 
   //
   // Update data
--
2.12.0.windows.1

Re: [PATCH v2 4/5] MdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass

[Zeng, Star]

VariableSmm.inf is including LoadFenceDxe.c, it should be LoadFenceSmm.c.

I also suggest using MemoryLoadFence instead of VariableLoadFence as the name.


With them corrected, Reviewed-by: Star Zeng <star.zeng@intel.com>.

Thanks,
Star
-----Original Message-----
From: Wu, Hao A 
Sent: Tuesday, September 25, 2018 2:13 PM
To: edk2-devel@lists.01.org
Cc: Wu, Hao A <hao.a.wu@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>; Zeng, Star <star.zeng@intel.com>
Subject: [PATCH v2 4/5] MdeModulePkg/Variable: [CVE-2017-5753] Fix bounds check bypass

REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194

Speculative execution is used by processor to avoid having to wait for data to arrive from memory, or for previous operations to finish, the processor may speculate as to what will be executed.

If the speculation is incorrect, the speculatively executed instructions might leave hints such as which memory locations have been brought into cache. Malicious actors can use the bounds check bypass method (code gadgets with controlled external inputs) to infer data values that have been used in speculative operations to reveal secrets which should not otherwise be accessed.

This commit will focus on the SMI handler(s) registered within the Variable\RuntimeDxe driver and insert AsmLfence API to mitigate the bounds check bypass issue.

For SMI handler SmmVariableHandler():

Under "case SMM_VARIABLE_FUNCTION_GET_VARIABLE:",
'SmmVariableHeader->NameSize' can be a potential cross boundary access of the 'CommBuffer' (controlled external input) during speculative execution.

This cross boundary access is later used as the index to access array 'SmmVariableHeader->Name' by code:
"SmmVariableHeader->Name[SmmVariableHeader->NameSize/sizeof (CHAR16) - 1]"
One can observe which part of the content within array was brought into cache to possibly reveal the value of 'SmmVariableHeader->NameSize'.

Hence, this commit adds a AsmLfence() after the boundary/range checks of 'CommBuffer' to prevent the speculative execution.

And there are 2 similar cases under
"case SMM_VARIABLE_FUNCTION_SET_VARIABLE:" and "case SMM_VARIABLE_FUNCTION_VAR_CHECK_VARIABLE_PROPERTY_GET:" as well.
This commits also handles them.

Also, under "case SMM_VARIABLE_FUNCTION_SET_VARIABLE:",
'(UINT8 *)SmmVariableHeader->Name + SmmVariableHeader->NameSize' points to the 'CommBuffer' (with some offset) and then passed as parameter 'Data' to function VariableServiceSetVariable().

Within function VariableServiceSetVariable(), there is a sanity check for
EFI_VARIABLE_AUTHENTICATION_2 descriptor for the data pointed by 'Data'.
If this check is speculatively bypassed, potential cross-boundary data access for 'Data' is possible to be revealed via the below function calls sequence during speculative execution:

AuthVariableLibProcessVariable()
ProcessVarWithPk() or ProcessVarWithKek()

Within function ProcessVarWithPk() or ProcessVarWithKek(), for the code "PayloadSize = DataSize - AUTHINFO2_SIZE (Data);", 'AUTHINFO2_SIZE (Data)'
can be a cross boundary access during speculative execution.

Then, 'PayloadSize' is possible to be revealed by the function call
sequence:

AuthServiceInternalUpdateVariableWithTimeStamp()
mAuthVarLibContextIn->UpdateVariable()
VariableExLibUpdateVariable()
UpdateVariable()
CopyMem()

Hence, this commit adds a AsmLfence() after the sanity check for
EFI_VARIABLE_AUTHENTICATION_2 descriptor upon 'Data' within function
VariableServiceSetVariable() to prevent the speculative execution.

Also, please note that the change made within function
VariableServiceSetVariable() will affect DXE as well. However, since we only focuses on the SMM codes, the commit will introduce a new module internal function called VariableLoadFence() to handle this. This internal function will have 2 implementations (1 for SMM, 1 for DXE). For the SMM implementation, it is a wrapper to call the AsmLfence() API; for the DXE implementation, it is empty.

A more detailed explanation of the purpose of commit is under the 'Bounds check bypass mitigation' section of the below link:
https://software.intel.com/security-software-guidance/insights/host-firmware-speculative-execution-side-channel-mitigation

And the document at:
https://software.intel.com/security-software-guidance/api-app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-vulnerabilities.pdf

Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Star Zeng <star.zeng@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Hao Wu <hao.a.wu@intel.com>
---
 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c         | 31 ++++++++++++++++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c         | 30 +++++++++++++++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h | 13 +++++++-
 MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c             |  6 ++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf |  1 +
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c          | 18 ++++++++++++
 MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf        |  1 +
 7 files changed, 99 insertions(+), 1 deletion(-)

diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c b/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
new file mode 100644
index 0000000000..697c5b41c6
--- /dev/null
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceDxe.c
@@ -0,0 +1,31 @@
+/** @file
+  Serialize operation on all load-from-memory instructions (DXE version).
+
+Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> This 
+program and the accompanying materials are licensed and made available 
+under the terms and conditions of the BSD License which accompanies 
+this distribution.  The full text of the license may be found at 
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "Variable.h"
+
+/**
+  This service is consumed by the variable modules to perform a 
+serializing
+  operation on all load-from-memory instructions that were issued prior 
+to the
+  call of this function.
+
+**/
+VOID
+VariableLoadFence (
+  VOID
+  )
+{
+  //
+  // Do nothing.
+  //
+}
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c b/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
new file mode 100644
index 0000000000..19fd0c294e
--- /dev/null
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/LoadFenceSmm.c
@@ -0,0 +1,30 @@
+/** @file
+  Serialize operation on all load-from-memory instructions (SMM version).
+
+Copyright (c) 2018, Intel Corporation. All rights reserved.<BR> This 
+program and the accompanying materials are licensed and made available 
+under the terms and conditions of the BSD License which accompanies 
+this distribution.  The full text of the license may be found at 
+http://opensource.org/licenses/bsd-license.php
+
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, 
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include <Library/BaseLib.h>
+#include "Variable.h"
+
+/**
+  This service is consumed by the variable modules to perform a 
+serializing
+  operation on all load-from-memory instructions that were issued prior 
+to the
+  call of this function.
+
+**/
+VOID
+VariableLoadFence (
+  VOID
+  )
+{
+  AsmLfence ();
+}
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h b/MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h
index b98b8556a2..7493777976 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/PrivilegePolymorphic.h
@@ -7,7 +7,7 @@
   vs. non-privileged driver code.
 
   Copyright (c) 2017, Red Hat, Inc.<BR>
-  Copyright (c) 2010 - 2017, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2010 - 2018, Intel Corporation. All rights 
+ reserved.<BR>
 
   This program and the accompanying materials are licensed and made available
   under the terms and conditions of the BSD License which accompanies this @@ -84,4 +84,15 @@ SetVariableCheckHandlerMor (
   IN VOID       *Data
   );
 
+/**
+  This service is consumed by the variable modules to perform a 
+serializing
+  operation on all load-from-memory instructions that were issued prior 
+to the
+  call of this function.
+
+**/
+VOID
+VariableLoadFence (
+  VOID
+  );
+
 #endif
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
index 1ea2f84dda..c7620bf70d 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/Variable.c
@@ -3198,6 +3198,12 @@ VariableServiceSetVariable (
       ((EFI_VARIABLE_AUTHENTICATION_2 *) Data)->AuthInfo.Hdr.dwLength < OFFSET_OF (WIN_CERTIFICATE_UEFI_GUID, CertData)) {
       return EFI_SECURITY_VIOLATION;
     }
+    //
+    // The VariableLoadFence() call here is to ensure the above sanity check
+    // for the EFI_VARIABLE_AUTHENTICATION_2 descriptor has been completed
+    // before the execution of subsequent codes.
+    //
+    VariableLoadFence ();
     PayloadSize = DataSize - AUTHINFO2_SIZE (Data);
   } else {
     PayloadSize = DataSize;
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
index 2d0a172ece..868981ccaf 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
@@ -46,6 +46,7 @@
   TcgMorLockDxe.c
   VarCheck.c
   VariableExLib.c
+  LoadFenceDxe.c
 
 [Packages]
   MdePkg/MdePkg.dec
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c
index e495d971a0..e9c7095148 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.c
@@ -537,6 +537,12 @@ SmmVariableHandler (
         goto EXIT;
       }
 
+      //
+      // The VariableLoadFence() call here is to ensure the previous range/content
+      // checks for the CommBuffer have been completed before the subsequent
+      // consumption of the CommBuffer content.
+      //
+      VariableLoadFence ();
       if (SmmVariableHeader->NameSize < sizeof (CHAR16) || SmmVariableHeader->Name[SmmVariableHeader->NameSize/sizeof (CHAR16) - 1] != L'\0') {
         //
         // Make sure VariableName is A Null-terminated string.
@@ -631,6 +637,12 @@ SmmVariableHandler (
         goto EXIT;
       }
 
+      //
+      // The VariableLoadFence() call here is to ensure the previous range/content
+      // checks for the CommBuffer have been completed before the subsequent
+      // consumption of the CommBuffer content.
+      //
+      VariableLoadFence ();
       if (SmmVariableHeader->NameSize < sizeof (CHAR16) || SmmVariableHeader->Name[SmmVariableHeader->NameSize/sizeof (CHAR16) - 1] != L'\0') {
         //
         // Make sure VariableName is A Null-terminated string.
@@ -766,6 +778,12 @@ SmmVariableHandler (
         goto EXIT;
       }
 
+      //
+      // The VariableLoadFence() call here is to ensure the previous range/content
+      // checks for the CommBuffer have been completed before the subsequent
+      // consumption of the CommBuffer content.
+      //
+      VariableLoadFence ();
       if (CommVariableProperty->NameSize < sizeof (CHAR16) || CommVariableProperty->Name[CommVariableProperty->NameSize/sizeof (CHAR16) - 1] != L'\0') {
         //
         // Make sure VariableName is A Null-terminated string.
diff --git a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
index dbb0674a46..ac40364d8a 100644
--- a/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
+++ b/MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf
@@ -54,6 +54,7 @@
   PrivilegePolymorphic.h
   VariableExLib.c
   TcgMorLockSmm.c
+  LoadFenceDxe.c
 
 [Packages]
   MdePkg/MdePkg.dec
--
2.12.0.windows.1

Re: [PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass

[Wu, Hao A]

> -----Original Message-----
> From: Zeng, Star
> Sent: Saturday, September 29, 2018 2:11 PM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Yao, Jiewen; Zeng, Star
> Subject: RE: [PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-
> 5753]Fix bounds check bypass
> 
> Please double check whether the AsmLfence calling should be before the line
> below.
> 
>         PrivateData = (VOID *)&SmmFtwWriteHeader->Data[Length];

Hi,

The above code is getting the address of a possible cross bounday access
during the speculative execution.

I also checked that the subsequent usage of 'PrivateData' does not have a
code pattern of the 'Bounds check bypass' issue. So I think the
AsmLfence() is not needed here.

Best Regards,
Hao Wu

> 
> 
> Thanks,
> Star
> -----Original Message-----
> From: Wu, Hao A
> Sent: Tuesday, September 25, 2018 2:13 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A <hao.a.wu@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>;
> Zeng, Star <star.zeng@intel.com>
> Subject: [PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-
> 5753]Fix bounds check bypass
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194
> 
> Speculative execution is used by processor to avoid having to wait for data to
> arrive from memory, or for previous operations to finish, the processor may
> speculate as to what will be executed.
> 
> If the speculation is incorrect, the speculatively executed instructions might
> leave hints such as which memory locations have been brought into cache.
> Malicious actors can use the bounds check bypass method (code gadgets with
> controlled external inputs) to infer data values that have been used in
> speculative operations to reveal secrets which should not otherwise be
> accessed.
> 
> This commit will focus on the SMI handler(s) registered within the
> FaultTolerantWriteDxe driver and insert AsmLfence API to mitigate the bounds
> check bypass issue.
> 
> For SMI handler SmmFaultTolerantWriteHandler():
> 
> Under "case FTW_FUNCTION_WRITE:", 'SmmFtwWriteHeader->Length' can be
> a potential cross boundary access of the 'CommBuffer' (controlled external
> inputs) during speculative execution. This cross boundary access is later passed
> as parameter 'Length' into function FtwWrite().
> 
> Within function FtwWrite(), the value of 'Length' can be inferred by code:
> "CopyMem (MyBuffer + Offset, Buffer, Length);". One can observe which part
> of the content within 'Buffer' was brought into cache to possibly reveal the
> value of 'Length'.
> 
> Hence, this commit adds a AsmLfence() after the boundary/range checks of
> 'CommBuffer' to prevent the speculative execution.
> 
> A more detailed explanation of the purpose of commit is under the 'Bounds
> check bypass mitigation' section of the below link:
> https://software.intel.com/security-software-guidance/insights/host-firmware-
> speculative-execution-side-channel-mitigation
> 
> And the document at:
> https://software.intel.com/security-software-guidance/api-
> app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass-
> vulnerabilities.pdf
> 
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
>  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
> | 7 +++++++
>  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
> | 1 +
>  2 files changed, 8 insertions(+)
> 
> diff --git
> a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
> b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
> index 632313f076..27fcab19b6 100644
> ---
> a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
> +++
> b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm
> +++ .c
> @@ -57,6 +57,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY
> KIND, EITHER EXPRESS OR IMPLIED.
>  #include <PiSmm.h>
>  #include <Library/SmmServicesTableLib.h>  #include <Library/SmmMemLib.h>
> +#include <Library/BaseLib.h>
>  #include <Protocol/SmmSwapAddressRange.h>  #include
> "FaultTolerantWrite.h"
>  #include "FaultTolerantWriteSmmCommon.h"
> @@ -417,6 +418,12 @@ SmmFaultTolerantWriteHandler (
>                   &SmmFvbHandle
>                   );
>        if (!EFI_ERROR (Status)) {
> +        //
> +        // The AsmLfence() call here is to ensure the previous range/content
> +        // checks for the CommBuffer have been completed before calling into
> +        // FtwWrite().
> +        //
> +        AsmLfence ();
>          Status = FtwWrite(
>                     &mFtwDevice->FtwInstance,
>                     SmmFtwWriteHeader->Lba, diff --git
> a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.in
> f
> b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.in
> f
> index 85d109e8d9..606cc2266b 100644
> ---
> a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.in
> f
> +++
> b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm
> +++ .inf
> @@ -55,6 +55,7 @@
>    PcdLib
>    ReportStatusCodeLib
>    SmmMemLib
> +  BaseLib
> 
>  [Guids]
>    #
> --
> 2.12.0.windows.1

Re: [PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass

[Zeng, Star]

Got it, thanks.

Reviewed-by: Star Zeng <star.zeng@intel.com>

Star
-----Original Message-----
From: Wu, Hao A 
Sent: Saturday, September 29, 2018 2:21 PM
To: Zeng, Star <star.zeng@intel.com>; edk2-devel@lists.01.org
Cc: Yao, Jiewen <jiewen.yao@intel.com>
Subject: RE: [PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-5753]Fix bounds check bypass

> -----Original Message-----
> From: Zeng, Star
> Sent: Saturday, September 29, 2018 2:11 PM
> To: Wu, Hao A; edk2-devel@lists.01.org
> Cc: Yao, Jiewen; Zeng, Star
> Subject: RE: [PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-
> 5753]Fix bounds check bypass
> 
> Please double check whether the AsmLfence calling should be before the 
> line below.
> 
>         PrivateData = (VOID *)&SmmFtwWriteHeader->Data[Length];

Hi,

The above code is getting the address of a possible cross bounday access during the speculative execution.

I also checked that the subsequent usage of 'PrivateData' does not have a code pattern of the 'Bounds check bypass' issue. So I think the
AsmLfence() is not needed here.

Best Regards,
Hao Wu

> 
> 
> Thanks,
> Star
> -----Original Message-----
> From: Wu, Hao A
> Sent: Tuesday, September 25, 2018 2:13 PM
> To: edk2-devel@lists.01.org
> Cc: Wu, Hao A <hao.a.wu@intel.com>; Yao, Jiewen 
> <jiewen.yao@intel.com>; Zeng, Star <star.zeng@intel.com>
> Subject: [PATCH v2 2/5] MdeModulePkg/FaultTolerantWrite:[CVE-2017-
> 5753]Fix bounds check bypass
> 
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=1194
> 
> Speculative execution is used by processor to avoid having to wait for 
> data to arrive from memory, or for previous operations to finish, the 
> processor may speculate as to what will be executed.
> 
> If the speculation is incorrect, the speculatively executed 
> instructions might leave hints such as which memory locations have been brought into cache.
> Malicious actors can use the bounds check bypass method (code gadgets 
> with controlled external inputs) to infer data values that have been 
> used in speculative operations to reveal secrets which should not 
> otherwise be accessed.
> 
> This commit will focus on the SMI handler(s) registered within the 
> FaultTolerantWriteDxe driver and insert AsmLfence API to mitigate the 
> bounds check bypass issue.
> 
> For SMI handler SmmFaultTolerantWriteHandler():
> 
> Under "case FTW_FUNCTION_WRITE:", 'SmmFtwWriteHeader->Length' can be a 
> potential cross boundary access of the 'CommBuffer' (controlled 
> external
> inputs) during speculative execution. This cross boundary access is 
> later passed as parameter 'Length' into function FtwWrite().
> 
> Within function FtwWrite(), the value of 'Length' can be inferred by code:
> "CopyMem (MyBuffer + Offset, Buffer, Length);". One can observe which 
> part of the content within 'Buffer' was brought into cache to possibly 
> reveal the value of 'Length'.
> 
> Hence, this commit adds a AsmLfence() after the boundary/range checks 
> of 'CommBuffer' to prevent the speculative execution.
> 
> A more detailed explanation of the purpose of commit is under the 
> 'Bounds check bypass mitigation' section of the below link:
> https://software.intel.com/security-software-guidance/insights/host-fi
> rmware- speculative-execution-side-channel-mitigation
> 
> And the document at:
> https://software.intel.com/security-software-guidance/api-
> app/sites/default/files/337879-analyzing-potential-bounds-Check-bypass
> -
> vulnerabilities.pdf
> 
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
> Signed-off-by: Hao Wu <hao.a.wu@intel.com>
> ---
>  MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
> | 7 +++++++
>  
> MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf
> | 1 +
>  2 files changed, 8 insertions(+)
> 
> diff --git
> a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
> b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
> index 632313f076..27fcab19b6 100644
> ---
> a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.c
> +++
> b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm
> +++ .c
> @@ -57,6 +57,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, 
> EITHER EXPRESS OR IMPLIED.
>  #include <PiSmm.h>
>  #include <Library/SmmServicesTableLib.h>  #include 
> <Library/SmmMemLib.h>
> +#include <Library/BaseLib.h>
>  #include <Protocol/SmmSwapAddressRange.h>  #include 
> "FaultTolerantWrite.h"
>  #include "FaultTolerantWriteSmmCommon.h"
> @@ -417,6 +418,12 @@ SmmFaultTolerantWriteHandler (
>                   &SmmFvbHandle
>                   );
>        if (!EFI_ERROR (Status)) {
> +        //
> +        // The AsmLfence() call here is to ensure the previous range/content
> +        // checks for the CommBuffer have been completed before calling into
> +        // FtwWrite().
> +        //
> +        AsmLfence ();
>          Status = FtwWrite(
>                     &mFtwDevice->FtwInstance,
>                     SmmFtwWriteHeader->Lba, diff --git 
> a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.i
> n
> f
> b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.i
> n
> f
> index 85d109e8d9..606cc2266b 100644
> ---
> a/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.i
> n
> f
> +++
> b/MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm
> +++ .inf
> @@ -55,6 +55,7 @@
>    PcdLib
>    ReportStatusCodeLib
>    SmmMemLib
> +  BaseLib
> 
>  [Guids]
>    #
> --
> 2.12.0.windows.1