From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.136; helo=mga12.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 716DE21190728 for ; Mon, 19 Nov 2018 19:54:56 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Nov 2018 19:54:56 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.56,255,1539673200"; d="scan'208";a="92490810" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga006.jf.intel.com with ESMTP; 19 Nov 2018 19:54:55 -0800 Received: from fmsmsx158.amr.corp.intel.com (10.18.116.75) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 19 Nov 2018 19:54:55 -0800 Received: from shsmsx103.ccr.corp.intel.com (10.239.4.69) by fmsmsx158.amr.corp.intel.com (10.18.116.75) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 19 Nov 2018 19:54:55 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.84]) by SHSMSX103.ccr.corp.intel.com ([169.254.4.161]) with mapi id 14.03.0415.000; Tue, 20 Nov 2018 11:54:53 +0800 From: "Zeng, Star" To: "Chiu, Chasel" , "edk2-devel@lists.01.org" CC: "Yao, Jiewen" , "Zeng, Star" Thread-Topic: [PATCH] IntelFsp2WrapperPkg: Revert 90c5bc08 Thread-Index: AQHUgISNMMqWDWCTDU+NwMOLyGnZfaVYCHTw Date: Tue, 20 Nov 2018 03:54:52 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB048310401F33DA@shsmsx102.ccr.corp.intel.com> References: <20181120035237.18340-1-chasel.chiu@intel.com> In-Reply-To: <20181120035237.18340-1-chasel.chiu@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-ctpclassification: CTP_NT x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMWNkN2NmOTAtYmE5My00YWViLTgzYmMtYTJlYThiNTdmOGMzIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoid1gwRmVYQ0w1aTlFbnJwK2lwS1Z3d0pVN0kzVFIyOTkwUCtmNmtYXC9WV3c5QnRGb1lyZndyMGl6KzNpanBXV2IifQ== dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH] IntelFsp2WrapperPkg: Revert 90c5bc08 X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Nov 2018 03:54:56 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Reviewed-by: Star Zeng -----Original Message----- From: Chiu, Chasel=20 Sent: Tuesday, November 20, 2018 11:53 AM To: edk2-devel@lists.01.org Cc: Yao, Jiewen ; Zeng, Star ; C= hiu, Chasel Subject: [PATCH] IntelFsp2WrapperPkg: Revert 90c5bc08 Commit message issue and reverted commit 90c5bc081d15d077606131a61114ddfdefe62e61. Will re-submit with correct formats. Cc: Jiewen Yao Cc: Star Zeng Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu --- IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c | 20 ++++---------= ------- IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 14 ++-----------= - IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf | 3 +-- IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf | 3 +-- IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 13 ++----------- 5 files changed, 10 insertions(+), 43 deletions(-) diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelF= sp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c index fa0441ce6c..7b7c5f5d86 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register Memor= yDiscoveredPpi notify to call FspSiliconInit API. =20 - Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -65,7 +65,7 @@ PeiFspMemoryInit ( FspHobListPtr =3D NULL; FspmUpdDataPtr =3D NULL; =20 - FspmHeaderPtr =3D (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFsp= mBaseAddress)); + FspmHeaderPtr =3D (FSP_INFO_HEADER *)FspFindFspHeader (PcdGet32 (PcdFspm= BaseAddress)); DEBUG ((DEBUG_INFO, "FspmHeaderPtr - 0x%x\n", FspmHeaderPtr)); if (FspmHeaderPtr =3D=3D NULL) { return EFI_DEVICE_ERROR; @@ -155,20 +155,8 @@ FspmWrapperInit ( { EFI_STATUS Status; =20 - Status =3D EFI_SUCCESS; - - if (FixedPcdGet8 (PcdFspModeSelection) =3D=3D 1) { - Status =3D PeiFspMemoryInit (); - ASSERT_EFI_ERROR (Status); - } else { - PeiServicesInstallFvInfoPpi ( - NULL, - (VOID *)(UINTN) PcdGet32 (PcdFspmBaseAddress), - (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspmBas= eAddress))->FvLength, - NULL, - NULL - ); - } + Status =3D PeiFspMemoryInit (); + ASSERT_EFI_ERROR (Status); =20 return Status; } diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c b/IntelF= sp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c index 87dd61e5c5..70dac7a414 100644 --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register Memor= yDiscoveredPpi notify to call FspSiliconInit API. =20 - Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -349,17 +349,7 @@ FspsWrapperPeimEntryPoint ( { DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n")); =20 - if (FixedPcdGet8 (PcdFspModeSelection) =3D=3D 1) { - FspsWrapperInit (); - } else { - PeiServicesInstallFvInfoPpi ( - NULL, - (VOID *)(UINTN) PcdGet32 (PcdFspsBaseAddress), - (UINT32)((EFI_FIRMWARE_VOLUME_HEADER *) (UINTN) PcdGet32 (PcdFspsBas= eAddress))->FvLength, - NULL, - NULL - ); - } + FspsWrapperInit (); =20 return EFI_SUCCESS; } diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf b/Inte= lFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf index b3776a80f3..542356b582 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register Memor= yDiscoveredPpi # notify to call FspSiliconInit API. # -# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -61,7 +61,6 @@ [Pcd] gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES - gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES =20 [Sources] FspmWrapperPeim.c diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf b/Inte= lFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf index 910286982b..cd87a99c40 100644 --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register Memor= yDiscoveredPpi # notify to call FspSiliconInit API. # -# Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -68,7 +68,6 @@ [Pcd] gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## CONSUMES - gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES =20 [Guids] gFspHobGuid ## CONSUMES ## HOB diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2Wrapper= Pkg/IntelFsp2WrapperPkg.dec index 96f2858fb4..69df16452d 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec @@ -71,8 +71,9 @@ ## Indicate the PEI memory size platform want to report gIntelFsp2WrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT3= 2|0x40000005 =20 - ## This is the base address of FSP-T + ## This is the base address of FSP-T/M/S gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x0= 0000300 + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x0= 0000301 =20 ## This PCD indicates if FSP APIs are skipped from FSP wrapper.

# If a bit is set, that means this FSP API is skipped.
@@ -92,17 +93,7 @@ # @Prompt Skip FSP API from FSP wrapper. gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x400000= 09 =20 - ## This PCD decides how Wrapper code utilizes FSP - # 0: DISPATCH mode (FSP Wrapper will load PeiCore from FSP without calli= ng FSP API) - # 1: API mode (FSP Wrapper will call FSP API) - # - gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection|0x00000001|UINT8|0x4= 000000A - [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx] - # - ## These are the base address of FSP-M/S - # - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x0= 0001000 gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x0= 0001001 # # To provide flexibility for platform to pre-allocate FSP UPD buffer --=20 2.13.3.windows.1