From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.151; helo=mga17.intel.com; envelope-from=star.zeng@intel.com; receiver=edk2-devel@lists.01.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 47222208AE342 for ; Thu, 14 Feb 2019 19:04:46 -0800 (PST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Feb 2019 19:04:45 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.58,371,1544515200"; d="scan'208";a="115088902" Received: from fmsmsx104.amr.corp.intel.com ([10.18.124.202]) by orsmga007.jf.intel.com with ESMTP; 14 Feb 2019 19:04:45 -0800 Received: from fmsmsx119.amr.corp.intel.com (10.18.124.207) by fmsmsx104.amr.corp.intel.com (10.18.124.202) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 14 Feb 2019 19:04:44 -0800 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX119.amr.corp.intel.com (10.18.124.207) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 14 Feb 2019 19:04:44 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.207]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.109]) with mapi id 14.03.0415.000; Fri, 15 Feb 2019 11:04:42 +0800 From: "Zeng, Star" To: "Chiu, Chasel" , "edk2-devel@lists.01.org" CC: Laszlo Ersek , "Dong, Eric" , "Zeng, Star" Thread-Topic: [edk2] [PATCH v3 3/3] UefiCpuPkg/SecCore: Support EFI_PEI_CORE_FV_LOCATION_PPI Thread-Index: AQHUxFRgEknf/IlBTEy5rEjtjpJYvqXgLX7A Date: Fri, 15 Feb 2019 03:04:41 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB0483104026B492@shsmsx102.ccr.corp.intel.com> References: <20190214105858.5580-1-chasel.chiu@intel.com> <20190214105858.5580-4-chasel.chiu@intel.com> In-Reply-To: <20190214105858.5580-4-chasel.chiu@intel.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Subject: Re: [PATCH v3 3/3] UefiCpuPkg/SecCore: Support EFI_PEI_CORE_FV_LOCATION_PPI X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 15 Feb 2019 03:04:46 -0000 Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable // // Perform platform specific initialization before entering PeiCore. // This comment block should be also moved together with SecPlatformMain() cal= ling, right? Thanks, Star -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Chas= el, Chiu Sent: Thursday, February 14, 2019 6:59 PM To: edk2-devel@lists.01.org Cc: Laszlo Ersek ; Dong, Eric Subject: [edk2] [PATCH v3 3/3] UefiCpuPkg/SecCore: Support EFI_PEI_CORE_FV_= LOCATION_PPI REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D1524 EFI_PEI_CORE_FV_LOCATION_PPI may be passed by platform when PeiCore not in = BFV so SecCore has to search PeiCore either from the FV location provided b= y EFI_PEI_CORE_FV_LOCATION_PPI or from BFV. Test: Verified on internal platform and booting successfully. Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu --- UefiCpuPkg/SecCore/SecMain.c | 35 +++++++++++++++++++++++++++++------ UefiCpuPkg/SecCore/SecCore.inf | 3 ++- UefiCpuPkg/SecCore/SecMain.h | 3 ++- 3 files changed, 33 insertions(+), 8 deletions(-) diff --git a/UefiCpuPkg/SecCore/SecMain.c b/UefiCpuPkg/SecCore/SecMain.c in= dex b24e190617..d84eb675f5 100644 --- a/UefiCpuPkg/SecCore/SecMain.c +++ b/UefiCpuPkg/SecCore/SecMain.c @@ -1,7 +1,7 @@ /** @file C functions in SEC =20 - Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2008 - 2019, Intel Corporation. All rights=20 + reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -232,22 +232,45 @@ SecStartupPhase2( EFI_PEI_PPI_DESCRIPTOR *AllSecPpiList; EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint; =20 + PeiCoreEntryPoint =3D NULL; SecCoreData =3D (EFI_SEC_PEI_HAND_OFF *) Context; AllSecPpiList =3D (EFI_PEI_PPI_DESCRIPTOR *) SecCoreData->PeiTemporaryRa= mBase; + // // Find Pei Core entry point. It will report SEC and Pei Core debug info= rmation if remote debug // is enabled. // - FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->Bo= otFirmwareVolumeBase, &PeiCoreEntryPoint); - if (PeiCoreEntryPoint =3D=3D NULL) - { - CpuDeadLoop (); + PpiList =3D SecPlatformMain (SecCoreData); if (PpiList !=3D NULL) { + for (Index =3D 0; + (PpiList[Index].Flags & EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST) !=3D = EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST; + Index++) { + if (CompareGuid (PpiList[Index].Guid, &gEfiPeiCoreFvLocationPpiGuid)= && (((EFI_PEI_CORE_FV_LOCATION_PPI *) PpiList[Index].Ppi)->PeiCoreFvLocati= on !=3D 0)) { + FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) ((EFI_PEI= _CORE_FV_LOCATION_PPI *) PpiList[Index].Ppi)->PeiCoreFvLocation, &PeiCoreEn= tryPoint); + if (PeiCoreEntryPoint !=3D NULL) { + break; + } else { + // + // PeiCore not found + // + CpuDeadLoop (); + } + } + } + } + // + // If EFI_PEI_CORE_FV_LOCATION_PPI not found, try to locate PeiCore from= BFV. + // + if (PeiCoreEntryPoint =3D=3D NULL) { + FindAndReportEntryPoints ((EFI_FIRMWARE_VOLUME_HEADER *) SecCoreData->= BootFirmwareVolumeBase, &PeiCoreEntryPoint); + if (PeiCoreEntryPoint =3D=3D NULL) { + CpuDeadLoop (); + } } =20 // // Perform platform specific initialization before entering PeiCore. // - PpiList =3D SecPlatformMain (SecCoreData); if (PpiList !=3D NULL) { // // Remove the terminal flag from the terminal PPI diff --git a/UefiCpuPkg/SecCore/SecCore.inf b/UefiCpuPkg/SecCore/SecCore.in= f index 442f663911..fc1485b5cb 100644 --- a/UefiCpuPkg/SecCore/SecCore.inf +++ b/UefiCpuPkg/SecCore/SecCore.inf @@ -7,7 +7,7 @@ # protected mode, setup flat memory model, enable temporary memory and # call into SecStartup(). # -# Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.
# This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License # which accompanies this distribution. The full text of the license may = be found at @@ -73,6 +73,7 @@ ## NOTIFY ## SOMETIMES_CONSUMES gPeiSecPerformancePpiGuid + gEfiPeiCoreFvLocationPpiGuid =20 [Guids] ## SOMETIMES_PRODUCES ## HOB diff --git a/UefiCpuPkg/SecCore/SecMain.h b/UefiCpuPkg/SecCore/SecMain.h index 83244af119..80045d34f4 100644 --- a/UefiCpuPkg/SecCore/SecMain.h +++ b/UefiCpuPkg/SecCore/SecMain.h @@ -1,7 +1,7 @@ /** @file Master header file for SecCore. =20 - Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
+ Copyright (c) 2008 - 2019, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License which accompanies this distribution. The full text of the license may b= e found at @@ -20,6 +20,7 @@ #include #include #include +#include =20 #include =20 --=20 2.13.3.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel