From: "Zeng, Star" <star.zeng@intel.com>
To: "Chiu, Chasel" <chasel.chiu@intel.com>,
"devel@edk2.groups.io" <devel@edk2.groups.io>
Cc: "Desimone, Nathaniel L" <nathaniel.l.desimone@intel.com>,
"Zeng, Star" <star.zeng@intel.com>
Subject: Re: [PATCH] IntelFsp2WrapperPkg: Perform post FSP-S process.
Date: Sun, 14 Apr 2019 10:15:29 +0000 [thread overview]
Message-ID: <0C09AFA07DD0434D9E2A0C6AEB048310402B6902@shsmsx102.ccr.corp.intel.com> (raw)
In-Reply-To: <20190412150203.14836-1-chasel.chiu@intel.com>
Minor comment inline.
> -----Original Message-----
> From: Chiu, Chasel
> Sent: Friday, April 12, 2019 11:02 PM
> To: devel@edk2.groups.io
> Cc: Chiu, Chasel <chasel.chiu@intel.com>; Desimone, Nathaniel L
> <nathaniel.l.desimone@intel.com>; Zeng, Star <star.zeng@intel.com>
> Subject: [PATCH] IntelFsp2WrapperPkg: Perform post FSP-S process.
>
> From: "Chasel, Chiu" <chasel.chiu@intel.com>
>
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1716
>
> In API mode FSP wrapper will perform some post FSP-S process but such
> process was skipped in Dispatch mode which may impact some of boot
> loaders.
> To align behavior between API and Dispatch, an End-of-Pei callback is
> introduced to perform same process in Dispatch mode.
>
> Test: Verified on internal platform and both
> FSP API and Dispatch modes booted successfully.
>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Cc: Star Zeng <star.zeng@intel.com>
> Contributed-under: TianoCore Contribution Agreement 1.1
This line should be not needed for new license.
> Signed-off-by: Chasel Chiu <chasel.chiu@intel.com>
> ---
> IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c | 50
> +++++++++++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 49 insertions(+), 1 deletion(-)
>
> diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> index bb126797ae..c1823656ed 100644
> --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c
> @@ -3,7 +3,7 @@
> register TemporaryRamDonePpi to call TempRamExit API, and register
> MemoryDiscoveredPpi
> notify to call FspSiliconInit API.
>
> - Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>
> + Copyright (c) 2014 - 2019, Intel Corporation. All rights
> + reserved.<BR>
> SPDX-License-Identifier: BSD-2-Clause-Patent
>
> **/
> @@ -179,6 +179,46 @@ FspSiliconInitDoneGetFspHobList ( }
>
> /**
> + This function is for FSP dispatch mode to perform post FSP-S process.
> +
> + @param[in] PeiServices Pointer to PEI Services Table.
> + @param[in] NotifyDesc Pointer to the descriptor for the Notification
> event that
> + caused this function to execute.
> + @param[in] Ppi Pointer to the PPI data associated with this
> function.
> +
> + @retval EFI_STATUS Status returned by PeiServicesInstallPpi ()
> +**/
> +EFI_STATUS
> +EFIAPI
> +FspsWrapperEndOfPeiNotify (
> + IN EFI_PEI_SERVICES **PeiServices,
> + IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDesc,
> + IN VOID *Ppi
> + )
> +{
> + EFI_STATUS Status;
> +
> + //
> + // In Dispatch mode no FspHobList so passing NULL //
> + PostFspsHobProcess (NULL);
Why this calling is needed?
> +
> + //
> + // Install FspSiliconInitDonePpi so that any other driver can consume this
> info.
> + //
> + Status = PeiServicesInstallPpi (&mPeiFspSiliconInitDonePpi);
There is a typo "FReturn" in FspSiliconInitDoneGetFspHobList, up to you to fix it or not in this patch.
Thanks,
Star
> + ASSERT_EFI_ERROR(Status);
> +
> + return Status;
> +}
> +
> +EFI_PEI_NOTIFY_DESCRIPTOR mFspsWrapperEndOfPeiNotifyDesc = {
> + (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK |
> +EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),
> + &gEfiEndOfPeiSignalPpiGuid,
> + FspsWrapperEndOfPeiNotify
> +};
> +
> +/**
> This function is called after PEI core discover memory and finish migration.
>
> @param[in] PeiServices Pointer to PEI Services Table.
> @@ -341,6 +381,8 @@ FspsWrapperPeimEntryPoint (
> IN CONST EFI_PEI_SERVICES **PeiServices
> )
> {
> + EFI_STATUS Status;
> +
> DEBUG ((DEBUG_INFO, "FspsWrapperPeimEntryPoint\n"));
>
> if (PcdGet8 (PcdFspModeSelection) == 1) { @@ -353,6 +395,12 @@
> FspsWrapperPeimEntryPoint (
> NULL,
> NULL
> );
> +
> + //
> + // Register EndOfPei Nofity to run post FSP-S process.
> + //
> + Status = PeiServicesNotifyPpi (&mFspsWrapperEndOfPeiNotifyDesc);
> + ASSERT_EFI_ERROR (Status);
> }
>
> return EFI_SUCCESS;
> --
> 2.13.3.windows.1
prev parent reply other threads:[~2019-04-14 10:15 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-12 15:02 [PATCH] IntelFsp2WrapperPkg: Perform post FSP-S process Chiu, Chasel
2019-04-13 1:05 ` Nate DeSimone
2019-04-14 10:15 ` Zeng, Star [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=0C09AFA07DD0434D9E2A0C6AEB048310402B6902@shsmsx102.ccr.corp.intel.com \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox