From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by mx.groups.io with SMTP id smtpd.web09.11126.1577267048278022463 for ; Wed, 25 Dec 2019 01:44:08 -0800 Authentication-Results: mx.groups.io; dkim=missing; spf=pass (domain: intel.com, ip: 134.134.136.24, mailfrom: star.zeng@intel.com) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Dec 2019 01:44:07 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,354,1571727600"; d="scan'208";a="223390929" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga001.fm.intel.com with ESMTP; 25 Dec 2019 01:44:07 -0800 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 25 Dec 2019 01:44:07 -0800 Received: from shsmsx153.ccr.corp.intel.com (10.239.6.53) by fmsmsx110.amr.corp.intel.com (10.18.116.10) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 25 Dec 2019 01:44:06 -0800 Received: from shsmsx102.ccr.corp.intel.com ([169.254.2.109]) by SHSMSX153.ccr.corp.intel.com ([169.254.12.195]) with mapi id 14.03.0439.000; Wed, 25 Dec 2019 17:44:05 +0800 From: "Zeng, Star" To: "devel@edk2.groups.io" , "niruiyu@users.noreply.github.com" CC: "Ni, Ray" , "Dong, Eric" Subject: Re: [edk2-devel] [PATCH v2 2/3] UefiCpuPkg/RegisterCpuFeaturesLib: Rename [Before|After]FeatureBitMask Thread-Topic: [edk2-devel] [PATCH v2 2/3] UefiCpuPkg/RegisterCpuFeaturesLib: Rename [Before|After]FeatureBitMask Thread-Index: AQHVpHrZsaF2rHX33Ua2NT4/hCVnKqfKxiTA Date: Wed, 25 Dec 2019 09:44:04 +0000 Message-ID: <0C09AFA07DD0434D9E2A0C6AEB04831040496078@shsmsx102.ccr.corp.intel.com> References: <20191126061550.494828-1-niruiyu@users.noreply.github.com> <20191126061550.494828-3-niruiyu@users.noreply.github.com> In-Reply-To: <20191126061550.494828-3-niruiyu@users.noreply.github.com> Accept-Language: zh-CN, en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] MIME-Version: 1.0 Return-Path: star.zeng@intel.com Content-Language: en-US Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Minor comment added. > -----Original Message----- > From: devel@edk2.groups.io [mailto:devel@edk2.groups.io] On Behalf Of > Ray Ni > Sent: Tuesday, November 26, 2019 2:16 PM > To: devel@edk2.groups.io > Cc: Ni, Ray ; Dong, Eric > Subject: [edk2-devel] [PATCH v2 2/3] UefiCpuPkg/RegisterCpuFeaturesLib: > Rename [Before|After]FeatureBitMask >=20 > From: Ray Ni >=20 > The patch doesn't have any functionality impact. >=20 > Signed-off-by: Ray Ni > Cc: Eric Dong > --- > .../RegisterCpuFeatures.h | 4 +- > .../RegisterCpuFeaturesLib.c | 68 +++++++++++-------- > 2 files changed, 40 insertions(+), 32 deletions(-) >=20 > diff --git [Trimmed] >=20 > FeatureMask =3D NULL; > - BeforeFeatureBitMask =3D NULL; > - AfterFeatureBitMask =3D NULL; > + ThreadBeforeFeatureBitMask =3D NULL; > + ThreadAfterFeatureBitMask =3D NULL; > CoreBeforeFeatureBitMask =3D NULL; > CoreAfterFeatureBitMask =3D NULL; > PackageBeforeFeatureBitMask =3D NULL; > @@ -850,10 +850,18 @@ RegisterCpuFeature ( > VA_START (Marker, InitializeFunc); > Feature =3D VA_ARG (Marker, UINT32); > while (Feature !=3D CPU_FEATURE_END) { > - ASSERT ((Feature & (CPU_FEATURE_BEFORE | CPU_FEATURE_AFTER)) > - !=3D (CPU_FEATURE_BEFORE | CPU_FEATURE_AFTER)); > + // > + // It's invalid to require a feature is before AND after all other = features. > + // > ASSERT ((Feature & (CPU_FEATURE_BEFORE_ALL | > CPU_FEATURE_AFTER_ALL)) > !=3D (CPU_FEATURE_BEFORE_ALL | CPU_FEATURE_AFTER_AL= L)); > + > + // > + // It's invalid to require feature A is before AND after before fea= ture B, "after before" should be just "after", right? With it corrected, Reviewed-by: Star Zeng Thanks, Star > + // either in thread level, core level or package level. > + // > + ASSERT ((Feature & (CPU_FEATURE_THREAD_BEFORE | > CPU_FEATURE_THREAD_AFTER)) > + !=3D (CPU_FEATURE_THREAD_BEFORE | > CPU_FEATURE_THREAD_AFTER)); > ASSERT ((Feature & (CPU_FEATURE_CORE_BEFORE | > CPU_FEATURE_CORE_AFTER)) > !=3D (CPU_FEATURE_CORE_BEFORE | CPU_FEATURE_CORE_AF= TER)); > ASSERT ((Feature & (CPU_FEATURE_PACKAGE_BEFORE | > CPU_FEATURE_PACKAGE_AFTER)) > @@ -865,9 +873,9 @@ RegisterCpuFeature ( > ASSERT (FeatureMask =3D=3D NULL); > SetCpuFeaturesBitMask (&FeatureMask, Feature, CpuFeaturesData- > >BitMaskSize); > } else if ((Feature & CPU_FEATURE_THREAD_BEFORE) !=3D 0) { > - SetCpuFeaturesBitMask (&BeforeFeatureBitMask, Feature & > ~CPU_FEATURE_THREAD_BEFORE, CpuFeaturesData->BitMaskSize); > + SetCpuFeaturesBitMask (&ThreadBeforeFeatureBitMask, Feature & > ~CPU_FEATURE_THREAD_BEFORE, CpuFeaturesData->BitMaskSize); > } else if ((Feature & CPU_FEATURE_THREAD_AFTER) !=3D 0) { > - SetCpuFeaturesBitMask (&AfterFeatureBitMask, Feature & > ~CPU_FEATURE_THREAD_AFTER, CpuFeaturesData->BitMaskSize); > + SetCpuFeaturesBitMask (&ThreadAfterFeatureBitMask, Feature & > ~CPU_FEATURE_THREAD_AFTER, CpuFeaturesData->BitMaskSize); > } else if ((Feature & CPU_FEATURE_CORE_BEFORE) !=3D 0) { > SetCpuFeaturesBitMask (&CoreBeforeFeatureBitMask, Feature & > ~CPU_FEATURE_CORE_BEFORE, CpuFeaturesData->BitMaskSize); > } else if ((Feature & CPU_FEATURE_CORE_AFTER) !=3D 0) { > @@ -885,8 +893,8 @@ RegisterCpuFeature ( > ASSERT (CpuFeature !=3D NULL); > CpuFeature->Signature =3D CPU_FEATURE_ENTRY_SIGNATU= RE; > CpuFeature->FeatureMask =3D FeatureMask; > - CpuFeature->BeforeFeatureBitMask =3D BeforeFeatureBitMask; > - CpuFeature->AfterFeatureBitMask =3D AfterFeatureBitMask; > + CpuFeature->ThreadBeforeFeatureBitMask =3D > ThreadBeforeFeatureBitMask; > + CpuFeature->ThreadAfterFeatureBitMask =3D ThreadAfterFeatureBitMask= ; > CpuFeature->CoreBeforeFeatureBitMask =3D CoreBeforeFeatureBitMask; > CpuFeature->CoreAfterFeatureBitMask =3D CoreAfterFeatureBitMask; > CpuFeature->PackageBeforeFeatureBitMask =3D > PackageBeforeFeatureBitMask; > -- > 2.21.0.windows.1 >=20 >=20 >=20