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* [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.
@ 2016-10-25 15:32 gdong1
  2016-10-25 23:31 ` Yao, Jiewen
  0 siblings, 1 reply; 4+ messages in thread
From: gdong1 @ 2016-10-25 15:32 UTC (permalink / raw)
  To: edk2-devel; +Cc: jiewen.yao, giri.p.mudusuru, maurice.ma, guo.dong

[-- Warning: decoded text below may be mangled, UTF-8 assumed --]
[-- Attachment #1: Type: text/plain; charset=UTF-8, Size: 4506 bytes --]

 PciEnumerationComplete might be signaled to FSP in Coreboot. So FSP
 wrapper driver don't need send it again. Add a PCD to control if a
 FSP API could be skipped from FspWrapperNotifyDxe driver.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Dong <guo.dong@intel.com>
Reviewed-by: Maurice Ma <maurice.ma@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
---
 .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.c      | 22 ++++++++++++++--------
 .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf    |  1 +
 IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec        | 18 ++++++++++++++++++
 3 files changed, 33 insertions(+), 8 deletions(-)

diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
index 0797f44..d09e20e 100644
--- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
+++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
@@ -26,6 +26,8 @@
 #include <Library/PerformanceLib.h>
 #include <Library/HobLib.h>
 
+#define   FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION     BIT16
+
 typedef
 EFI_STATUS
 (EFIAPI * ADD_PERFORMANCE_RECORDS)(
@@ -237,6 +239,7 @@ FspWrapperNotifyDxeEntryPoint (
   EFI_EVENT  ReadyToBootEvent;
   VOID       *Registration;
   EFI_EVENT  ProtocolNotifyEvent;
+  UINT32     FspApiMask;
 
   //
   // Load this driver's image to memory
@@ -246,14 +249,17 @@ FspWrapperNotifyDxeEntryPoint (
     return EFI_SUCCESS;
   }
 
-  ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
-                          &gEfiPciEnumerationCompleteProtocolGuid,
-                          TPL_CALLBACK,
-                          OnPciEnumerationComplete,
-                          NULL,
-                          &Registration
-                          );
-  ASSERT (ProtocolNotifyEvent != NULL);
+  FspApiMask = PcdGet32 (PcdSkipFspApi);
+  if ((FspApiMask & FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION) == 0) {
+    ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
+                            &gEfiPciEnumerationCompleteProtocolGuid,
+                            TPL_CALLBACK,
+                            OnPciEnumerationComplete,
+                            NULL,
+                            &Registration
+                            );
+    ASSERT (ProtocolNotifyEvent != NULL);
+  }
 
   Status = EfiCreateEventReadyToBootEx (
              TPL_CALLBACK,
diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
index f851f68..54c2cbf 100644
--- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
+++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
@@ -62,6 +62,7 @@
 
 [Pcd]
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress  ## CONSUMES
+  gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi       ## CONSUMES
 
 [Depex]
   TRUE
diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
index d9d2d80..ea3bc70 100644
--- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
+++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
@@ -75,6 +75,24 @@
   gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT32|0x00000300
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT32|0x00000301
 
+  ## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
+  #  If a bit is set, that means this FSP API is skipped.<BR>
+  #  If a bit is clear, that means this FSP API is NOT skipped.<BR>
+  #  NOTE: Only NotifyPhase Post PCI enumeration (BIT16) is implemented.<BR>
+  #  BIT[15:0] is for function:<BR>
+  #    BIT0    – Skip TempRamInit<BR>
+  #    BIT1    – Skip MemoryInit<BR>
+  #    BIT2    – Skip TempRamExit<BR>
+  #    BIT3    – Skip SiliconInit<BR>
+  #    BIT4    – Skip NotifyPhase<BR>
+  #  BIT[32:16] is for sub-function:<BR>
+  #    BIT16   – Skip NotifyPhase (AfterPciEnumeration)<BR>
+  #    BIT17   – Skip NotifyPhase (ReadyToBoot)<BR>
+  #    BIT18   – Skip NotifyPhase (EndOfFirmware)<BR>
+  #  Any undefined BITs are reserved for future use.<BR>
+  # @Prompt Skip FSP API from FSP wrapper.
+  gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x40000009
+
 [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
   gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT32|0x00001001
   
\ No newline at end of file
-- 
2.7.0.windows.1



^ permalink raw reply related	[flat|nested] 4+ messages in thread

* Re: [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.
  2016-10-25 15:32 [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete gdong1
@ 2016-10-25 23:31 ` Yao, Jiewen
  2016-10-25 23:55   ` Dong, Guo
  0 siblings, 1 reply; 4+ messages in thread
From: Yao, Jiewen @ 2016-10-25 23:31 UTC (permalink / raw)
  To: Dong, Guo, edk2-devel@lists.01.org

I found the comment section has unreadable char. I think it should be "-".

We need update it to be readable asci char.
With that change, reviewed-by: jiewen.yao@intel.com

> -----Original Message-----
> From: Dong, Guo
> Sent: Tuesday, October 25, 2016 11:33 PM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen <jiewen.yao@intel.com>; Mudusuru, Giri P
> <giri.p.mudusuru@intel.com>; Ma, Maurice <maurice.ma@intel.com>; Dong,
> Guo <guo.dong@intel.com>
> Subject: [edk2] [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if
> signaling PciEnumerationComplete.
> 
>  PciEnumerationComplete might be signaled to FSP in Coreboot. So FSP
>  wrapper driver don't need send it again. Add a PCD to control if a
>  FSP API could be skipped from FspWrapperNotifyDxe driver.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Guo Dong <guo.dong@intel.com>
> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
> ---
>  .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.c      | 22
> ++++++++++++++--------
>  .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf    |  1 +
>  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec        | 18
> ++++++++++++++++++
>  3 files changed, 33 insertions(+), 8 deletions(-)
> 
> diff --git
> a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> index 0797f44..d09e20e 100644
> --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> @@ -26,6 +26,8 @@
>  #include <Library/PerformanceLib.h>
>  #include <Library/HobLib.h>
> 
> +#define   FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION
> BIT16
> +
>  typedef
>  EFI_STATUS
>  (EFIAPI * ADD_PERFORMANCE_RECORDS)(
> @@ -237,6 +239,7 @@ FspWrapperNotifyDxeEntryPoint (
>    EFI_EVENT  ReadyToBootEvent;
>    VOID       *Registration;
>    EFI_EVENT  ProtocolNotifyEvent;
> +  UINT32     FspApiMask;
> 
>    //
>    // Load this driver's image to memory
> @@ -246,14 +249,17 @@ FspWrapperNotifyDxeEntryPoint (
>      return EFI_SUCCESS;
>    }
> 
> -  ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
> -
> &gEfiPciEnumerationCompleteProtocolGuid,
> -                          TPL_CALLBACK,
> -                          OnPciEnumerationComplete,
> -                          NULL,
> -                          &Registration
> -                          );
> -  ASSERT (ProtocolNotifyEvent != NULL);
> +  FspApiMask = PcdGet32 (PcdSkipFspApi);
> +  if ((FspApiMask & FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION)
> == 0) {
> +    ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
> +
> &gEfiPciEnumerationCompleteProtocolGuid,
> +                            TPL_CALLBACK,
> +                            OnPciEnumerationComplete,
> +                            NULL,
> +                            &Registration
> +                            );
> +    ASSERT (ProtocolNotifyEvent != NULL);
> +  }
> 
>    Status = EfiCreateEventReadyToBootEx (
>               TPL_CALLBACK,
> diff --git
> a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> index f851f68..54c2cbf 100644
> --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> +++
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> @@ -62,6 +62,7 @@
> 
>  [Pcd]
>    gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress  ##
> CONSUMES
> +  gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi       ## CONSUMES
> 
>  [Depex]
>    TRUE
> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> index d9d2d80..ea3bc70 100644
> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> @@ -75,6 +75,24 @@
> 
> gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT3
> 2|0x00000300
> 
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT
> 32|0x00000301
> 
> +  ## This PCD indicates if FSP APIs are skipped from FSP wrapper.<BR><BR>
> +  #  If a bit is set, that means this FSP API is skipped.<BR>
> +  #  If a bit is clear, that means this FSP API is NOT skipped.<BR>
> +  #  NOTE: Only NotifyPhase Post PCI enumeration (BIT16) is
> implemented.<BR>
> +  #  BIT[15:0] is for function:<BR>
> +  #    BIT0    � Skip TempRamInit<BR>
> +  #    BIT1    � Skip MemoryInit<BR>
> +  #    BIT2    � Skip TempRamExit<BR>
> +  #    BIT3    � Skip SiliconInit<BR>
> +  #    BIT4    � Skip NotifyPhase<BR>
> +  #  BIT[32:16] is for sub-function:<BR>
> +  #    BIT16   � Skip NotifyPhase (AfterPciEnumeration)<BR>
> +  #    BIT17   � Skip NotifyPhase (ReadyToBoot)<BR>
> +  #    BIT18   � Skip NotifyPhase (EndOfFirmware)<BR>
> +  #  Any undefined BITs are reserved for future use.<BR>
> +  # @Prompt Skip FSP API from FSP wrapper.
> +
> gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x4
> 0000009
> +
>  [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
> 
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT
> 32|0x00001001
> 
> \ No newline at end of file
> --
> 2.7.0.windows.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.
  2016-10-25 23:31 ` Yao, Jiewen
@ 2016-10-25 23:55   ` Dong, Guo
  2016-10-26  2:47     ` Yao, Jiewen
  0 siblings, 1 reply; 4+ messages in thread
From: Dong, Guo @ 2016-10-25 23:55 UTC (permalink / raw)
  To: Yao, Jiewen, edk2-devel@lists.01.org

Hi Jiewen,

Thank you catch this issue. I have sent an updated patch for it.
Could you help check it in if there is no other comments? Since I don't have write access.

Thanks,
Guo

-----Original Message-----
From: Yao, Jiewen 
Sent: Tuesday, October 25, 2016 4:32 PM
To: Dong, Guo <guo.dong@intel.com>; edk2-devel@lists.01.org
Cc: Mudusuru, Giri P <giri.p.mudusuru@intel.com>; Ma, Maurice <maurice.ma@intel.com>
Subject: RE: [edk2] [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.

I found the comment section has unreadable char. I think it should be "-".

We need update it to be readable asci char.
With that change, reviewed-by: jiewen.yao@intel.com

> -----Original Message-----
> From: Dong, Guo
> Sent: Tuesday, October 25, 2016 11:33 PM
> To: edk2-devel@lists.01.org
> Cc: Yao, Jiewen <jiewen.yao@intel.com>; Mudusuru, Giri P 
> <giri.p.mudusuru@intel.com>; Ma, Maurice <maurice.ma@intel.com>; Dong, 
> Guo <guo.dong@intel.com>
> Subject: [edk2] [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control 
> if signaling PciEnumerationComplete.
> 
>  PciEnumerationComplete might be signaled to FSP in Coreboot. So FSP  
> wrapper driver don't need send it again. Add a PCD to control if a  
> FSP API could be skipped from FspWrapperNotifyDxe driver.
> 
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Guo Dong <guo.dong@intel.com>
> Reviewed-by: Maurice Ma <maurice.ma@intel.com>
> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com>
> ---
>  .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.c      | 22
> ++++++++++++++--------
>  .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf    |  1 +
>  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec        | 18
> ++++++++++++++++++
>  3 files changed, 33 insertions(+), 8 deletions(-)
> 
> diff --git
> a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> index 0797f44..d09e20e 100644
> --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> @@ -26,6 +26,8 @@
>  #include <Library/PerformanceLib.h>
>  #include <Library/HobLib.h>
> 
> +#define   FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION
> BIT16
> +
>  typedef
>  EFI_STATUS
>  (EFIAPI * ADD_PERFORMANCE_RECORDS)(
> @@ -237,6 +239,7 @@ FspWrapperNotifyDxeEntryPoint (
>    EFI_EVENT  ReadyToBootEvent;
>    VOID       *Registration;
>    EFI_EVENT  ProtocolNotifyEvent;
> +  UINT32     FspApiMask;
> 
>    //
>    // Load this driver's image to memory @@ -246,14 +249,17 @@ 
> FspWrapperNotifyDxeEntryPoint (
>      return EFI_SUCCESS;
>    }
> 
> -  ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
> -
> &gEfiPciEnumerationCompleteProtocolGuid,
> -                          TPL_CALLBACK,
> -                          OnPciEnumerationComplete,
> -                          NULL,
> -                          &Registration
> -                          );
> -  ASSERT (ProtocolNotifyEvent != NULL);
> +  FspApiMask = PcdGet32 (PcdSkipFspApi);  if ((FspApiMask & 
> + FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION)
> == 0) {
> +    ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
> +
> &gEfiPciEnumerationCompleteProtocolGuid,
> +                            TPL_CALLBACK,
> +                            OnPciEnumerationComplete,
> +                            NULL,
> +                            &Registration
> +                            );
> +    ASSERT (ProtocolNotifyEvent != NULL);  }
> 
>    Status = EfiCreateEventReadyToBootEx (
>               TPL_CALLBACK,
> diff --git
> a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> index f851f68..54c2cbf 100644
> --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> +++
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> @@ -62,6 +62,7 @@
> 
>  [Pcd]
>    gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress  ## CONSUMES
> +  gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi       ## CONSUMES
> 
>  [Depex]
>    TRUE
> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> index d9d2d80..ea3bc70 100644
> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> @@ -75,6 +75,24 @@
> 
> gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT3
> 2|0x00000300
> 
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT
> 32|0x00000301
> 
> +  ## This PCD indicates if FSP APIs are skipped from FSP 
> + wrapper.<BR><BR>  #  If a bit is set, that means this FSP API is 
> + skipped.<BR>  #  If a bit is clear, that means this FSP API is NOT 
> + skipped.<BR>  #  NOTE: Only NotifyPhase Post PCI enumeration (BIT16) 
> + is
> implemented.<BR>
> +  #  BIT[15:0] is for function:<BR>
> +  #    BIT0      Skip TempRamInit<BR>
> +  #    BIT1      Skip MemoryInit<BR>
> +  #    BIT2      Skip TempRamExit<BR>
> +  #    BIT3      Skip SiliconInit<BR>
> +  #    BIT4      Skip NotifyPhase<BR>
> +  #  BIT[32:16] is for sub-function:<BR>
> +  #    BIT16     Skip NotifyPhase (AfterPciEnumeration)<BR>
> +  #    BIT17     Skip NotifyPhase (ReadyToBoot)<BR>
> +  #    BIT18     Skip NotifyPhase (EndOfFirmware)<BR>
> +  #  Any undefined BITs are reserved for future use.<BR>  # @Prompt 
> + Skip FSP API from FSP wrapper.
> +
> gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x4
> 0000009
> +
>  [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
> 
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT
> 32|0x00001001
> 
> \ No newline at end of file
> --
> 2.7.0.windows.1


^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.
  2016-10-25 23:55   ` Dong, Guo
@ 2016-10-26  2:47     ` Yao, Jiewen
  0 siblings, 0 replies; 4+ messages in thread
From: Yao, Jiewen @ 2016-10-26  2:47 UTC (permalink / raw)
  To: Dong, Guo, edk2-devel@lists.01.org

Yes, I will do that. ☺

From: Dong, Guo
Sent: Wednesday, October 26, 2016 7:56 AM
To: Yao, Jiewen <jiewen.yao@intel.com>; edk2-devel@lists.01.org
Cc: Mudusuru, Giri P <giri.p.mudusuru@intel.com>; Ma, Maurice <maurice.ma@intel.com>
Subject: RE: [edk2] [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.

Hi Jiewen,

Thank you catch this issue. I have sent an updated patch for it.
Could you help check it in if there is no other comments? Since I don't have write access.

Thanks,
Guo

-----Original Message-----
From: Yao, Jiewen
Sent: Tuesday, October 25, 2016 4:32 PM
To: Dong, Guo <guo.dong@intel.com<mailto:guo.dong@intel.com>>; edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org>
Cc: Mudusuru, Giri P <giri.p.mudusuru@intel.com<mailto:giri.p.mudusuru@intel.com>>; Ma, Maurice <maurice.ma@intel.com<mailto:maurice.ma@intel.com>>
Subject: RE: [edk2] [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete.

I found the comment section has unreadable char. I think it should be "-".

We need update it to be readable asci char.
With that change, reviewed-by: jiewen.yao@intel.com<mailto:jiewen.yao@intel.com>

> -----Original Message-----
> From: Dong, Guo
> Sent: Tuesday, October 25, 2016 11:33 PM
> To: edk2-devel@lists.01.org<mailto:edk2-devel@lists.01.org>
> Cc: Yao, Jiewen <jiewen.yao@intel.com<mailto:jiewen.yao@intel.com>>; Mudusuru, Giri P
> <giri.p.mudusuru@intel.com<mailto:giri.p.mudusuru@intel.com>>; Ma, Maurice <maurice.ma@intel.com<mailto:maurice.ma@intel.com>>; Dong,
> Guo <guo.dong@intel.com<mailto:guo.dong@intel.com>>
> Subject: [edk2] [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control
> if signaling PciEnumerationComplete.
>
>  PciEnumerationComplete might be signaled to FSP in Coreboot. So FSP
> wrapper driver don't need send it again. Add a PCD to control if a
> FSP API could be skipped from FspWrapperNotifyDxe driver.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Guo Dong <guo.dong@intel.com<mailto:guo.dong@intel.com>>
> Reviewed-by: Maurice Ma <maurice.ma@intel.com<mailto:maurice.ma@intel.com>>
> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com<mailto:jiewen.yao@intel.com>>
> Reviewed-by: Giri P Mudusuru <giri.p.mudusuru@intel.com<mailto:giri.p.mudusuru@intel.com>>
> ---
>  .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.c      | 22
> ++++++++++++++--------
>  .../FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf    |  1 +
>  IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec        | 18
> ++++++++++++++++++
>  3 files changed, 33 insertions(+), 8 deletions(-)
>
> diff --git
> a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> index 0797f44..d09e20e 100644
> --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> +++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
> @@ -26,6 +26,8 @@
>  #include <Library/PerformanceLib.h>
>  #include <Library/HobLib.h>
>
> +#define   FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION
> BIT16
> +
>  typedef
>  EFI_STATUS
>  (EFIAPI * ADD_PERFORMANCE_RECORDS)(
> @@ -237,6 +239,7 @@ FspWrapperNotifyDxeEntryPoint (
>    EFI_EVENT  ReadyToBootEvent;
>    VOID       *Registration;
>    EFI_EVENT  ProtocolNotifyEvent;
> +  UINT32     FspApiMask;
>
>    //
>    // Load this driver's image to memory @@ -246,14 +249,17 @@
> FspWrapperNotifyDxeEntryPoint (
>      return EFI_SUCCESS;
>    }
>
> -  ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
> -
> &gEfiPciEnumerationCompleteProtocolGuid,
> -                          TPL_CALLBACK,
> -                          OnPciEnumerationComplete,
> -                          NULL,
> -                          &Registration
> -                          );
> -  ASSERT (ProtocolNotifyEvent != NULL);
> +  FspApiMask = PcdGet32 (PcdSkipFspApi);  if ((FspApiMask &
> + FSP_API_NOTIFY_PHASE_AFTER_PCI_ENUMERATION)
> == 0) {
> +    ProtocolNotifyEvent = EfiCreateProtocolNotifyEvent (
> +
> &gEfiPciEnumerationCompleteProtocolGuid,
> +                            TPL_CALLBACK,
> +                            OnPciEnumerationComplete,
> +                            NULL,
> +                            &Registration
> +                            );
> +    ASSERT (ProtocolNotifyEvent != NULL);  }
>
>    Status = EfiCreateEventReadyToBootEx (
>               TPL_CALLBACK,
> diff --git
> a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> index f851f68..54c2cbf 100644
> --- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> +++
> b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.inf
> @@ -62,6 +62,7 @@
>
>  [Pcd]
>    gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress  ## CONSUMES
> +  gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi       ## CONSUMES
>
>  [Depex]
>    TRUE
> diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> index d9d2d80..ea3bc70 100644
> --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec
> @@ -75,6 +75,24 @@
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress|0x00000000|UINT3
> 2|0x00000300
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress|0x00000000|UINT
> 32|0x00000301
>
> +  ## This PCD indicates if FSP APIs are skipped from FSP
> + wrapper.<BR><BR>  #  If a bit is set, that means this FSP API is
> + skipped.<BR>  #  If a bit is clear, that means this FSP API is NOT
> + skipped.<BR>  #  NOTE: Only NotifyPhase Post PCI enumeration (BIT16)
> + is
> implemented.<BR>
> +  #  BIT[15:0] is for function:<BR>
> +  #    BIT0      Skip TempRamInit<BR>
> +  #    BIT1      Skip MemoryInit<BR>
> +  #    BIT2      Skip TempRamExit<BR>
> +  #    BIT3      Skip SiliconInit<BR>
> +  #    BIT4      Skip NotifyPhase<BR>
> +  #  BIT[32:16] is for sub-function:<BR>
> +  #    BIT16     Skip NotifyPhase (AfterPciEnumeration)<BR>
> +  #    BIT17     Skip NotifyPhase (ReadyToBoot)<BR>
> +  #    BIT18     Skip NotifyPhase (EndOfFirmware)<BR>
> +  #  Any undefined BITs are reserved for future use.<BR>  # @Prompt
> + Skip FSP API from FSP wrapper.
> +
> gIntelFsp2WrapperTokenSpaceGuid.PcdSkipFspApi|0x00000000|UINT32|0x4
> 0000009
> +
>  [PcdsFixedAtBuild, PcdsPatchableInModule,PcdsDynamic,PcdsDynamicEx]
>
> gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress|0x00000000|UINT
> 32|0x00001001
>
> \ No newline at end of file
> --
> 2.7.0.windows.1

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2016-10-26  2:47 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2016-10-25 15:32 [PATCH v3] IntelFsp2WrapperPkg: Add a PCD to control if signaling PciEnumerationComplete gdong1
2016-10-25 23:31 ` Yao, Jiewen
2016-10-25 23:55   ` Dong, Guo
2016-10-26  2:47     ` Yao, Jiewen

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