From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp-fw-6001.amazon.com (smtp-fw-6001.amazon.com [52.95.48.154]) by mx.groups.io with SMTP id smtpd.web10.11783.1630766556103250560 for ; Sat, 04 Sep 2021 07:42:36 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@amazon.com header.s=amazon201209 header.b=Qpwlkcda; spf=pass (domain: amazon.de, ip: 52.95.48.154, mailfrom: prvs=874eef02e=ncoleon@amazon.de) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1630766557; x=1662302557; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=jgvjCWsysXU1hVYwvioLtivLbQa0OkZUTUX3z+A0KCk=; b=QpwlkcdamPpBoks8mzp1KrMhIrrUm2wSl6sNOPTR7MRWvMzQkOURg4Cy oBOZ9iLMmGxJ3tOUSJJgVpUm1xeZhFs+cNGejHxTrZM6YeWIdlZQ9pem7 GGgkSpIM8/SygrdFE3I46RW70tbtSuWzDY734uCx4bJrSI4sJd8JOp8Y2 w=; X-IronPort-AV: E=Sophos;i="5.85,268,1624320000"; d="scan'208";a="139382571" Received: from iad12-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-1e-c7f73527.us-east-1.amazon.com) ([10.43.8.6]) by smtp-border-fw-6001.iad6.amazon.com with ESMTP; 04 Sep 2021 14:42:29 +0000 Received: from EX13D49EUC003.ant.amazon.com (iad12-ws-svc-p26-lb9-vlan2.iad.amazon.com [10.40.163.34]) by email-inbound-relay-1e-c7f73527.us-east-1.amazon.com (Postfix) with ESMTPS id B1289C20D1 for ; Sat, 4 Sep 2021 14:42:27 +0000 (UTC) Received: from ub4014a598e6c52.ant.amazon.com (10.43.162.52) by EX13D49EUC003.ant.amazon.com (10.43.164.91) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Sat, 4 Sep 2021 14:42:24 +0000 From: Nicolas Ojeda Leon To: CC: Nicolas Ojeda Leon , Alexander Graf Subject: [PATCH 4/5] MdeModulePkg/Pci MdePkg: Create service to retrieve PCI base addresses Date: Sat, 4 Sep 2021 16:37:55 +0200 Message-ID: <0a176a5dd9cd1e9796737596f695f0f6f92fb105.1630676569.git.ncoleon@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.43.162.52] X-ClientProxiedBy: EX13D16UWC001.ant.amazon.com (10.43.162.117) To EX13D49EUC003.ant.amazon.com (10.43.164.91) Content-Type: text/plain Extend the PCI host bridge resource allocation protocol to include one more service that retrieves the base addresses of all resources of a given root bridge. The service is defined to provide, on runtime, the possibility to fetch the base addresses of a root bridge, replicating the address alignment used when placing the host bridge's resources in the Gcd memory map. The intention of this service, initially, is to allow the PCI allocation process to get the base addresses before allocating the individual BARs grouped under a root bridge. This enables the placing logic to be enhanced to account and calculate offsets for pre-populated BARs (PCI devices' BARs that are already configured and need to be respected). Signed-off-by: Nicolas Ojeda Leon Cc: Alexander Graf --- .../Bus/Pci/PciHostBridgeDxe/PciHostBridge.h | 29 +++++++ .../PciHostBridgeResourceAllocation.h | 33 ++++++++ MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c | 10 +++ .../Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 80 +++++++++++++++++++ 4 files changed, 152 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h index 755ab75b19..3b8432fb29 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.h @@ -239,6 +239,35 @@ PreprocessController ( IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase ); +/** + + Retrieve the aligned base addresses for all resources of a root bridge. + + @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance. + @param RootBridgeHandle RootBridgeHandle returned by GetNextRootBridge to locate the + root bridge of interest among the list of root bridges. + @param IoBase Returns the PIO aperture base address. + @param Mem32Base Returns the 32-bit aperture base address. + @param PMem32Base Returns the 32-bit prefetchable aperture base address. + @param Mem64Base Returns the 64-bit aperture base address. + @param PMem64Base Returns the 64-bit prefetchable aperture base address. + + @retval EFI_SUCCESS Succeed. + @retval EFI_NOT_FOUND Root bridge was not found. + +**/ +EFI_STATUS +EFIAPI +GetResourcesBases( + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This, + IN EFI_HANDLE RootBridgeHandle, + OUT UINT64 *IoBase, + OUT UINT64 *Mem32Base, + OUT UINT64 *PMem32Base, + OUT UINT64 *Mem64Base, + OUT UINT64 *PMem64Base + ); + /** This routine constructs the resource descriptors for all root bridges and call PciHostBridgeResourceConflict(). diff --git a/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h b/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h index 17b1b5a8d8..f42521a348 100644 --- a/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h +++ b/MdePkg/Include/Protocol/PciHostBridgeResourceAllocation.h @@ -367,6 +367,33 @@ EFI_STATUS IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase ); +/** + Retrieves the base addresses of ost bridge resources. + + @param This The pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance. + @param RootBridgeHandle The PCI root bridge handle. + @param IoBase The pointer to PIO aperture base address. + @param Mem32Base The pointer to 32-bit aperture base address. + @param PMem32Base The pointer to 32-bit prefetchable aperture base address. + @param Mem64Base The pointer to 64-bit aperture base address. + @param PMem64Base The pointer to 64-bit prefetchable aperture base address. + + @retval EFI_SUCCESS Succeed. + @retval EFI_NOT_FOUND Root bridge was not found. + +**/ +typedef +EFI_STATUS +(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_RESOURCES_BASES) ( + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This, + IN EFI_HANDLE RootBridgeHandle, + OUT UINT64 *IoBase, + OUT UINT64 *Mem32Base, + OUT UINT64 *PMem32Base, + OUT UINT64 *Mem64Base, + OUT UINT64 *PMem64Base + ); + /// /// Provides the basic interfaces to abstract a PCI host bridge resource allocation. /// @@ -415,6 +442,12 @@ struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL { /// before enumeration. /// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER PreprocessController; + + /// + /// Returns the aligned base addresses of the different resource windows + /// of the host bridge. Intended for use before resources are submitted. + /// + EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_RESOURCES_BASES GetResourcesBases; }; extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid; diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c index 4caac56f1d..82147a4946 100644 --- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c +++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c @@ -561,6 +561,16 @@ PciHostBridgeResourceAllocator ( PciResUsageTypical ); + Status = PciResAlloc->GetResourcesBases( + PciResAlloc, + RootBridgeDev->Handle, + &IoBase, + &Mem32Base, + &PMem32Base, + &Mem64Base, + &PMem64Base + ); + // // Get the max ROM size that the root bridge can process // Insert to resource map so that there will be dedicate MEM32 resource range for Option ROM. diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c index 4ab9415c96..0ba9e100fc 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c @@ -527,6 +527,7 @@ InitializePciHostBridge ( HostBridge->ResAlloc.SubmitResources = SubmitResources; HostBridge->ResAlloc.GetProposedResources = GetProposedResources; HostBridge->ResAlloc.PreprocessController = PreprocessController; + HostBridge->ResAlloc.GetResourcesBases = GetResourcesBases; Status = gBS->InstallMultipleProtocolInterfaces ( &HostBridge->Handle, @@ -1594,3 +1595,82 @@ PreprocessController ( return EFI_INVALID_PARAMETER; } + +/** + + Retrieve the aligned base addresses for all resources of a root bridge. + + @param This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance. + @param RootBridgeHandle RootBridgeHandle returned by GetNextRootBridge to locate the + root bridge of interest among the list of root bridges. + @param IoBase Returns the PIO aperture base address. + @param Mem32Base Returns the 32-bit aperture base address. + @param PMem32Base Returns the 32-bit prefetchable aperture base address. + @param Mem64Base Returns the 64-bit aperture base address. + @param PMem64Base Returns the 64-bit prefetchable aperture base address. + + @retval EFI_SUCCESS Succeed. + @retval EFI_NOT_FOUND Root bridge was not found. + +**/ +EFI_STATUS +EFIAPI +GetResourcesBases( + IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This, + IN EFI_HANDLE RootBridgeHandle, + OUT UINT64 *IoBase, + OUT UINT64 *Mem32Base, + OUT UINT64 *PMem32Base, + OUT UINT64 *Mem64Base, + OUT UINT64 *PMem64Base + ) +{ + PCI_HOST_BRIDGE_INSTANCE *HostBridge; + PCI_ROOT_BRIDGE_INSTANCE *RootBridge; + LIST_ENTRY *Link; + UINT64 Alignment; + UINTN BitsOfAlignment; + + HostBridge = PCI_HOST_BRIDGE_FROM_THIS(This); + + for (Link = GetFirstNode (&HostBridge->RootBridges) + ; !IsNull (&HostBridge->RootBridges, Link) + ; Link = GetNextNode (&HostBridge->RootBridges, Link) + ) { + RootBridge = ROOT_BRIDGE_FROM_LINK (Link); + + if (RootBridgeHandle == RootBridge->Handle) { + // + // Have to make sure Alignment is handled since we are doing direct address allocation + // + Alignment = RootBridge->ResAllocNode[TypeIo].Alignment; + BitsOfAlignment = MIN (15, LowBitSet64 (Alignment + 1)); + *IoBase = ALIGN_VALUE (RootBridge->Io.Base, Alignment + 1); + *IoBase = ALIGN_VALUE (*IoBase, LShiftU64 (1, BitsOfAlignment)); + + Alignment = RootBridge->ResAllocNode[TypeMem32].Alignment; + BitsOfAlignment = MIN (31, LowBitSet64 (Alignment + 1)); + *Mem32Base = ALIGN_VALUE (RootBridge->Mem.Base, Alignment + 1); + *Mem32Base = ALIGN_VALUE (*Mem32Base, LShiftU64 (1, BitsOfAlignment)); + + Alignment = RootBridge->ResAllocNode[TypePMem32].Alignment; + BitsOfAlignment = MIN (31, LowBitSet64 (Alignment + 1)); + *PMem32Base = ALIGN_VALUE(RootBridge->PMem.Base, Alignment + 1); + *PMem32Base = ALIGN_VALUE (*PMem32Base, LShiftU64 (1, BitsOfAlignment)); + + Alignment = RootBridge->ResAllocNode[TypeMem64].Alignment; + BitsOfAlignment = MIN (63, LowBitSet64 (Alignment + 1)); + *Mem64Base = ALIGN_VALUE(RootBridge->MemAbove4G.Base, Alignment + 1); + *Mem64Base = ALIGN_VALUE (*Mem64Base, LShiftU64 (1, BitsOfAlignment)); + + Alignment = RootBridge->ResAllocNode[TypePMem64].Alignment; + BitsOfAlignment = MIN (63, LowBitSet64 (Alignment + 1)); + *PMem64Base = ALIGN_VALUE(RootBridge->PMemAbove4G.Base, Alignment + 1); + *PMem64Base = ALIGN_VALUE (*PMem64Base, LShiftU64 (1, BitsOfAlignment)); + + return EFI_SUCCESS; + } + } + + return EFI_NOT_FOUND; +} -- 2.17.1 Amazon Development Center Germany GmbH Krausenstr. 38 10117 Berlin Geschaeftsfuehrung: Christian Schlaeger, Jonathan Weiss Eingetragen am Amtsgericht Charlottenburg unter HRB 149173 B Sitz: Berlin Ust-ID: DE 289 237 879