Hi, Ric:

Thanks for your reply.

I think maybe some standard PCI config space registers, such as BAR registers, its content is restored by OS during S3 resume procedure.

Such as:

PCI bus driver scans PCI bus and assigns every PCI device’s resource requirements, and sets these BAR registers.

But PCI bus driver doesn’t save these BAR configurations into Boot Script.

So, I think PCI bridges’ secondary bus number / subordinate bus number registers are all standard PCI bridge’s config space registers.

Maybe OS will also restore its original setting.

Thanks

It’s done by BIOS pei s3 resume code.  Restored register value saved  while BIOS normal POST BY BootScriptExecutor.  You can refer  gEfiPeiS3Resume2Ppi  usage

Thanks