From: Ming <ming.huang@linaro.org>
To: Ard Biesheuvel <ard.biesheuvel@linaro.org>, liudongdong3@huawei.com
Cc: Leif Lindholm <leif.lindholm@linaro.org>,
linaro-uefi <linaro-uefi@lists.linaro.org>,
"edk2-devel@lists.01.org" <edk2-devel@lists.01.org>,
Graeme Gregory <graeme.gregory@linaro.org>,
guoheyi@huawei.com, wanghuiqiang <wanghuiqiang@huawei.com>,
huangming <huangming23@huawei.com>,
Jason Zhang <zhangjinsong2@huawei.com>,
huangdaode@hisilicon.com, John Garry <john.garry@huawei.com>,
Heyi Guo <heyi.guo@linaro.org>
Subject: Re: [PATCH edk2-platforms v3 4/6] Hisilicon/D05: Add PlatformMiscDxe driver
Date: Thu, 26 Jul 2018 10:17:15 +0800 [thread overview]
Message-ID: <0b31813f-8166-c27e-a593-25bb42ea2f91@linaro.org> (raw)
In-Reply-To: <CAKv+Gu8rw-mP6GFeQmdqwO+bc1gLn+Zvae3Mp28u65SAYUcRJw@mail.gmail.com>
在 7/25/2018 6:51 PM, Ard Biesheuvel 写道:
> On 13 July 2018 at 10:15, Ming Huang <ming.huang@linaro.org> wrote:
>> Fix the issue of onboard Nic not work kerenl with AMD GPU and
>> NVME SSD in board. The GPU don't support 64 MSI, so need to
>> allocate INTx, but the default interrupt number 255 is invalid,
>> so Change all the PCI Device interrupt number to 0.
>>
>> Contributed-under: TianoCore Contribution Agreement 1.1
>> Signed-off-by: Ming Huang <ming.huang@linaro.org>
>> Signed-off-by: Heyi Guo <heyi.guo@linaro.org>
>
> I don't understand why this issue is specific to this platform.
>
> Can you explain in more detail what the failure mode is, and why
> setting the PCI interrupt line is necessary here, while it doesn't
> seem to be on other platforms, even when falling back to INTx
> interrupts?
>
I don't know exactly why setting the PCI interrupt line is necessary in uefi.
This issue is analyzed by kernel guy DongDong.Liu.
@DongDong,
Can you explain the questions?
Thanks.
>> ---
>> Platform/Hisilicon/D05/D05.dsc | 1 +
>> Platform/Hisilicon/D05/D05.fdf | 1 +
>> Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c | 99 ++++++++++++++++++++
>> Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf | 47 ++++++++++
>> 4 files changed, 148 insertions(+)
>>
>> diff --git a/Platform/Hisilicon/D05/D05.dsc b/Platform/Hisilicon/D05/D05.dsc
>> index b6e1a9d98a..0e6d5912a0 100644
>> --- a/Platform/Hisilicon/D05/D05.dsc
>> +++ b/Platform/Hisilicon/D05/D05.dsc
>> @@ -629,6 +629,7 @@
>>
>>
>> Silicon/Hisilicon/Drivers/Smbios/ProcessorSubClassDxe/ProcessorSubClassDxe.inf
>> + Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf
>>
>> #
>> # Memory test
>> diff --git a/Platform/Hisilicon/D05/D05.fdf b/Platform/Hisilicon/D05/D05.fdf
>> index 4503776d63..61e8d907f9 100644
>> --- a/Platform/Hisilicon/D05/D05.fdf
>> +++ b/Platform/Hisilicon/D05/D05.fdf
>> @@ -354,6 +354,7 @@ READ_LOCK_STATUS = TRUE
>> INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
>> INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
>> INF Platform/Hisilicon/D05/EarlyConfigPeim/EarlyConfigPeimD05.inf
>> + INF Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf
>>
>> INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
>>
>> diff --git a/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c b/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c
>> new file mode 100644
>> index 0000000000..8519b7139d
>> --- /dev/null
>> +++ b/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.c
>> @@ -0,0 +1,99 @@
>> +/** @file
>> +*
>> +* Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +* Copyright (c) 2016, Linaro Limited. All rights reserved.
>> +*
>> +* This program and the accompanying materials
>> +* are licensed and made available under the terms and conditions of the BSD License
>> +* which accompanies this distribution. The full text of the license may be found at
>> +* http://opensource.org/licenses/bsd-license.php
>> +*
>> +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +*
>> +**/
>> +
>> +#include <Uefi.h>
>> +#include <IndustryStandard/Pci.h>
>> +#include <Library/DebugLib.h>
>> +#include <Library/UefiBootServicesTableLib.h>
>> +#include <Protocol/PciIo.h>
>> +
>> +VOID
>> +SetIntLine (
>> + )
>> +{
>> + EFI_STATUS Status;
>> + UINTN HandleIndex;
>> + EFI_HANDLE *HandleBuffer;
>> + UINTN HandleCount;
>> + EFI_PCI_IO_PROTOCOL *PciIo;
>> + UINT8 INTLine;
>> + UINTN Segment;
>> + UINTN Bus;
>> + UINTN Device;
>> + UINTN Fun;
>> +
>> + Status = gBS->LocateHandleBuffer (
>> + ByProtocol,
>> + &gEfiPciIoProtocolGuid,
>> + NULL,
>> + &HandleCount,
>> + &HandleBuffer
>> + );
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, " Locate gEfiPciIoProtocol Failed.\n"));
>> + gBS->FreePool ((VOID *)HandleBuffer);
>> + return;
>> + }
>> +
>> + for (HandleIndex = 0; HandleIndex < HandleCount; HandleIndex++) {
>> + Status = gBS->HandleProtocol (
>> + HandleBuffer[HandleIndex],
>> + &gEfiPciIoProtocolGuid,
>> + (VOID **)&PciIo
>> + );
>> + if (EFI_ERROR (Status)) {
>> + continue;
>> + }
>> +
>> + INTLine = 0;
>> + (VOID)PciIo->Pci.Write (
>> + PciIo,
>> + EfiPciIoWidthUint8,
>> + PCI_INT_LINE_OFFSET,
>> + 1,
>> + &INTLine);
>> + (VOID)PciIo->GetLocation (PciIo, &Segment, &Bus, &Device, &Fun);
>> + DEBUG ((DEBUG_INFO, "Set BDF(%x-%x-%x) IntLine to 0\n", Bus, Device, Fun));
>> + }
>> +
>> + gBS->FreePool ((VOID *)HandleBuffer);
>> + return;
>> +}
>> +
>> +EFI_STATUS
>> +EFIAPI
>> +PlatformMiscDxeEntry (
>> + IN EFI_HANDLE ImageHandle,
>> + IN EFI_SYSTEM_TABLE *SystemTable
>> + )
>> +{
>> + EFI_STATUS Status;
>> + EFI_EVENT Event;
>> +
>> + Status = gBS->CreateEventEx (
>> + EVT_NOTIFY_SIGNAL,
>> + TPL_CALLBACK,
>> + SetIntLine,
>> + NULL,
>> + &gEfiEventReadyToBootGuid,
>> + &Event
>> + );
>> + if (EFI_ERROR (Status)) {
>> + DEBUG ((DEBUG_ERROR, "Create event for SetIntLine, %r!\n", Status));
>> + }
>> +
>> + return EFI_SUCCESS;
>> +}
>> +
>> diff --git a/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf b/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf
>> new file mode 100644
>> index 0000000000..0b365e7a53
>> --- /dev/null
>> +++ b/Platform/Hisilicon/D05/Drivers/PlatformMiscDxe/PlatformMiscDxe.inf
>> @@ -0,0 +1,47 @@
>> +#/** @file
>> +#
>> +# Copyright (c) 2018, Hisilicon Limited. All rights reserved.
>> +# Copyright (c) 2016, Linaro Limited. All rights reserved.
>> +#
>> +# This program and the accompanying materials
>> +# are licensed and made available under the terms and conditions of the BSD License
>> +# which accompanies this distribution. The full text of the license may be found at
>> +# http://opensource.org/licenses/bsd-license.php
>> +#
>> +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
>> +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
>> +#
>> +#**/
>> +
>> +[Defines]
>> + INF_VERSION = 0x0001001A
>> + BASE_NAME = PlatformMiscDxe
>> + FILE_GUID = a48f7a09-253f-468b-87c6-caf78baf47bb
>> + MODULE_TYPE = DXE_DRIVER
>> + VERSION_STRING = 1.0
>> + ENTRY_POINT = PlatformMiscDxeEntry
>> +
>> +[Sources.common]
>> + PlatformMiscDxe.c
>> +
>> +[Packages]
>> + MdeModulePkg/MdeModulePkg.dec
>> + MdePkg/MdePkg.dec
>> + Silicon/Hisilicon/HisiPkg.dec
>> +
>> +[Guids]
>> + gEfiEventReadyToBootGuid
>> +
>> +[Protocols]
>> + gEfiPciIoProtocolGuid
>> +
>> +[LibraryClasses]
>> + BaseLib
>> + DebugLib
>> + UefiBootServicesTableLib
>> + UefiDriverEntryPoint
>> +
>> +[FixedPcd]
>> +
>> +[Depex]
>> + TRUE
>> --
>> 2.17.0
>>
next prev parent reply other threads:[~2018-07-26 2:17 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-13 8:15 [PATCH edk2-platforms v3 0/6] Improve D0x platforms and bug fix Ming Huang
2018-07-13 8:15 ` [PATCH edk2-platforms v3 1/6] Hisilicon/D0x: Fix invoke SetMemorySpaceAttributes error bug Ming Huang
2018-07-13 8:15 ` [PATCH edk2-platforms v3 2/6] Hisilicon/D03/D05: Correct ATU Cfg0/Cfg1 base address Ming Huang
2018-07-13 8:15 ` [PATCH edk2-platforms v3 3/6] Hisilicon/D0x: Fix SetAtuConfig1RW bug Ming Huang
2018-07-13 8:15 ` [PATCH edk2-platforms v3 4/6] Hisilicon/D05: Add PlatformMiscDxe driver Ming Huang
2018-07-25 10:51 ` Ard Biesheuvel
2018-07-26 2:17 ` Ming [this message]
2018-07-13 8:15 ` [PATCH edk2-platforms v3 5/6] Hisilicon/D05/Pcie: optimize two pcie ports space Ming Huang
2018-07-13 8:15 ` [PATCH edk2-platforms v3 6/6] Hisilicon/D0x: Correct smbios product name Ming Huang
2018-07-25 11:11 ` [PATCH edk2-platforms v3 0/6] Improve D0x platforms and bug fix Ard Biesheuvel
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