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Wed, 26 Apr 2023 02:22:53 -0500 From: "Abdul Lateef Attar" To: CC: Abdul Lateef Attar , Abner Chang , Garrett Kirkendall , "Paul Grimes" , Eric Dong , Ray Ni , Rahul Kumar Subject: [PATCH v9 4/9] UefiCpuPkg/SmmCpuFeaturesLib: Restructure arch-dependent code Date: Wed, 26 Apr 2023 12:52:22 +0530 Message-ID: <0c824c88a457fc9cace930869109b4f417683396.1682493282.git.abdattar@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: References: MIME-Version: 1.0 Return-Path: AbdulLateef.Attar@amd.com X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT058:EE_|BY5PR12MB4854:EE_ X-MS-Office365-Filtering-Correlation-Id: b025fbfa-1991-48ab-a6e1-08db462727c6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 2loE4rIi+BpwnU2TUL8WCsvvrEbhfy4/bgIYpEEZulWiIgjRZ1DyNuFg4wqA8c6XBCiMHoh4Gu9uqFZs56PXrexclCiuvpuHwB8AsLvH0CaKcZWGkNtJblsrmRGhYvDqDs3RQy1ThP9+8EnU9Iq22RM94oFPW1fGoROimSgRuzbKMtJIDv5nfsbRwhex49ITax4GZEMbld7pnbCCd5FS6ymKTc2NjwmlytlF9fV5dQyHL68dU2Aka5TxfRhet4edTsuf9fLERiqIjtU60QgnvSuHc2Nfw375RIrBjaQ0Xz9E4t5MmM/Ps8DCZRyFkqnCu+oGlnA/1jfjmJSX01eb8dWEW+2yGzyT+U5Bhs4JHe1nZcn0Aj1y12F7ClDTLg+K7oPeQoj/4TWBsrM08Abg+Zq+y47+gILob/nJasERj8XXszgjml7QsLkizF0nOdNVS5Gee2C1NK7WUdhlNXt4m9ZXKwszBk9+B2jppsT7NoVqMJESbdTwseXSAnKCpPspyU9XTTcbuXAS9KUBr+Wiq/1SwYFc2RxzgpjWuiR1aZZ9CXG2GjpGSe1UMTaBXtfrD8M+SADiSxvcqm3LbRZC5ogfUWpy2I5d1rXmXFaT/dGmsX63JnelITiTW1p4ALBgkQZ01CVP0HL2QdHGjPCQvCKifFIiJnwD1//rLoeEouoZavWQqZHfNxsbVTGOO9gfSHl7MnrMY19LBaGdHzdJPehRFAq4zj841y7TKVA6rNs= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(136003)(39860400002)(346002)(396003)(376002)(451199021)(40470700004)(46966006)(36840700001)(426003)(336012)(966005)(26005)(36860700001)(2616005)(186003)(5660300002)(47076005)(83380400001)(82310400005)(7696005)(6666004)(40460700003)(19627235002)(36756003)(8936002)(54906003)(8676002)(41300700001)(316002)(82740400003)(356005)(81166007)(30864003)(2906002)(70586007)(70206006)(4326008)(6916009)(478600001)(40480700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Apr 2023 07:23:38.7275 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: b025fbfa-1991-48ab-a6e1-08db462727c6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT058.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4854 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain From: Abdul Lateef Attar BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4182 moves Intel-specific code to the arch-dependent file. Other processor families might have different implementation of these functions. Hence, moving out of the common file. Cc: Abner Chang Cc: Garrett Kirkendall Cc: Paul Grimes Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Signed-off-by: Abdul Lateef Attar Reviewed-by: Abner Chang --- .../IntelSmmCpuFeaturesLib.c | 128 ++++++++++++++++++ .../SmmCpuFeaturesLibCommon.c | 128 ------------------ 2 files changed, 128 insertions(+), 128 deletions(-) diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c = b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c index 1a2c706fa1f1..8f382b60266c 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/IntelSmmCpuFeaturesLib.c @@ -417,3 +417,131 @@ SmmCpuFeaturesSetSmmRegister ( AsmWriteMsr64 (SMM_FEATURES_LIB_SMM_FEATURE_CONTROL, Value); } } + +/** + This function updates the SMRAM save state on the currently executing CP= U + to resume execution at a specific address after an RSM instruction. Thi= s + function must evaluate the SMRAM save state to determine the execution m= ode + the RSM instruction resumes and update the resume execution address with + either NewInstructionPointer32 or NewInstructionPoint. The auto HALT re= start + flag in the SMRAM save state must always be cleared. This function retu= rns + the value of the instruction pointer from the SMRAM save state that was + replaced. If this function returns 0, then the SMRAM save state was not + modified. + + This function is called during the very first SMI on each CPU after + SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mo= de + to signal that the SMBASE of each CPU has been updated before the defaul= t + SMBASE address is used for the first SMI to the next CPU. + + @param[in] CpuIndex The index of the CPU to hook. The v= alue + must be between 0 and the NumberOfCp= us + field in the System Management Syste= m Table + (SMST). + @param[in] CpuState Pointer to SMRAM Save State Map for = the + currently executing CPU. + @param[in] NewInstructionPointer32 Instruction pointer to use if resumi= ng to + 32-bit execution mode from 64-bit SM= M. + @param[in] NewInstructionPointer Instruction pointer to use if resumi= ng to + same execution mode as SMM. + + @retval 0 This function did modify the SMRAM save state. + @retval > 0 The original instruction pointer value from the SMRAM save = state + before it was replaced. +**/ +UINT64 +EFIAPI +SmmCpuFeaturesHookReturnFromSmm ( + IN UINTN CpuIndex, + IN SMRAM_SAVE_STATE_MAP *CpuState, + IN UINT64 NewInstructionPointer32, + IN UINT64 NewInstructionPointer + ) +{ + return 0; +} + +/** + Read an SMM Save State register on the target processor. If this functi= on + returns EFI_UNSUPPORTED, then the caller is responsible for reading the + SMM Save Sate register. + + @param[in] CpuIndex The index of the CPU to read the SMM Save State. = The + value must be between 0 and the NumberOfCpus field= in + the System Management System Table (SMST). + @param[in] Register The SMM Save State register to read. + @param[in] Width The number of bytes to read from the CPU save stat= e. + @param[out] Buffer Upon return, this holds the CPU register value rea= d + from the save state. + + @retval EFI_SUCCESS The register was read from Save State. + @retval EFI_INVALID_PARAMETER Buffer is NULL. + @retval EFI_UNSUPPORTED This function does not support reading Reg= ister. + +**/ +EFI_STATUS +EFIAPI +SmmCpuFeaturesReadSaveStateRegister ( + IN UINTN CpuIndex, + IN EFI_SMM_SAVE_STATE_REGISTER Register, + IN UINTN Width, + OUT VOID *Buffer + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Writes an SMM Save State register on the target processor. If this func= tion + returns EFI_UNSUPPORTED, then the caller is responsible for writing the + SMM Save Sate register. + + @param[in] CpuIndex The index of the CPU to write the SMM Save State. = The + value must be between 0 and the NumberOfCpus field = in + the System Management System Table (SMST). + @param[in] Register The SMM Save State register to write. + @param[in] Width The number of bytes to write to the CPU save state. + @param[in] Buffer Upon entry, this holds the new CPU register value. + + @retval EFI_SUCCESS The register was written to Save State. + @retval EFI_INVALID_PARAMETER Buffer is NULL. + @retval EFI_UNSUPPORTED This function does not support writing Reg= ister. +**/ +EFI_STATUS +EFIAPI +SmmCpuFeaturesWriteSaveStateRegister ( + IN UINTN CpuIndex, + IN EFI_SMM_SAVE_STATE_REGISTER Register, + IN UINTN Width, + IN CONST VOID *Buffer + ) +{ + return EFI_UNSUPPORTED; +} + +/** + Check to see if an SMM register is supported by a specified CPU. + + @param[in] CpuIndex The index of the CPU to check for SMM register supp= ort. + The value must be between 0 and the NumberOfCpus fi= eld + in the System Management System Table (SMST). + @param[in] RegName Identifies the SMM register to check for support. + + @retval TRUE The SMM register specified by RegName is supported by the= CPU + specified by CpuIndex. + @retval FALSE The SMM register specified by RegName is not supported by= the + CPU specified by CpuIndex. +**/ +BOOLEAN +EFIAPI +SmmCpuFeaturesIsSmmRegisterSupported ( + IN UINTN CpuIndex, + IN SMM_REG_NAME RegName + ) +{ + if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName =3D=3D SmmReg= FeatureControl)) { + return TRUE; + } + + return FALSE; +} diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c= b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c index 5498fda38da4..cbf4b495185b 100644 --- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c +++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLibCommon.c @@ -17,49 +17,6 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 #include "CpuFeaturesLib.h" =20 -/** - This function updates the SMRAM save state on the currently executing CP= U - to resume execution at a specific address after an RSM instruction. Thi= s - function must evaluate the SMRAM save state to determine the execution m= ode - the RSM instruction resumes and update the resume execution address with - either NewInstructionPointer32 or NewInstructionPoint. The auto HALT re= start - flag in the SMRAM save state must always be cleared. This function retu= rns - the value of the instruction pointer from the SMRAM save state that was - replaced. If this function returns 0, then the SMRAM save state was not - modified. - - This function is called during the very first SMI on each CPU after - SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mo= de - to signal that the SMBASE of each CPU has been updated before the defaul= t - SMBASE address is used for the first SMI to the next CPU. - - @param[in] CpuIndex The index of the CPU to hook. The v= alue - must be between 0 and the NumberOfCp= us - field in the System Management Syste= m Table - (SMST). - @param[in] CpuState Pointer to SMRAM Save State Map for = the - currently executing CPU. - @param[in] NewInstructionPointer32 Instruction pointer to use if resumi= ng to - 32-bit execution mode from 64-bit SM= M. - @param[in] NewInstructionPointer Instruction pointer to use if resumi= ng to - same execution mode as SMM. - - @retval 0 This function did modify the SMRAM save state. - @retval > 0 The original instruction pointer value from the SMRAM save = state - before it was replaced. -**/ -UINT64 -EFIAPI -SmmCpuFeaturesHookReturnFromSmm ( - IN UINTN CpuIndex, - IN SMRAM_SAVE_STATE_MAP *CpuState, - IN UINT64 NewInstructionPointer32, - IN UINT64 NewInstructionPointer - ) -{ - return 0; -} - /** Hook point in normal execution mode that allows the one CPU that was ele= cted as monarch during System Management Mode initialization to perform addit= ional @@ -90,91 +47,6 @@ SmmCpuFeaturesRendezvousExit ( { } =20 -/** - Check to see if an SMM register is supported by a specified CPU. - - @param[in] CpuIndex The index of the CPU to check for SMM register supp= ort. - The value must be between 0 and the NumberOfCpus fi= eld - in the System Management System Table (SMST). - @param[in] RegName Identifies the SMM register to check for support. - - @retval TRUE The SMM register specified by RegName is supported by the= CPU - specified by CpuIndex. - @retval FALSE The SMM register specified by RegName is not supported by= the - CPU specified by CpuIndex. -**/ -BOOLEAN -EFIAPI -SmmCpuFeaturesIsSmmRegisterSupported ( - IN UINTN CpuIndex, - IN SMM_REG_NAME RegName - ) -{ - if (FeaturePcdGet (PcdSmmFeatureControlEnable) && (RegName =3D=3D SmmReg= FeatureControl)) { - return TRUE; - } - - return FALSE; -} - -/** - Read an SMM Save State register on the target processor. If this functi= on - returns EFI_UNSUPPORTED, then the caller is responsible for reading the - SMM Save Sate register. - - @param[in] CpuIndex The index of the CPU to read the SMM Save State. = The - value must be between 0 and the NumberOfCpus field= in - the System Management System Table (SMST). - @param[in] Register The SMM Save State register to read. - @param[in] Width The number of bytes to read from the CPU save stat= e. - @param[out] Buffer Upon return, this holds the CPU register value rea= d - from the save state. - - @retval EFI_SUCCESS The register was read from Save State. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED This function does not support reading Reg= ister. - -**/ -EFI_STATUS -EFIAPI -SmmCpuFeaturesReadSaveStateRegister ( - IN UINTN CpuIndex, - IN EFI_SMM_SAVE_STATE_REGISTER Register, - IN UINTN Width, - OUT VOID *Buffer - ) -{ - return EFI_UNSUPPORTED; -} - -/** - Writes an SMM Save State register on the target processor. If this func= tion - returns EFI_UNSUPPORTED, then the caller is responsible for writing the - SMM Save Sate register. - - @param[in] CpuIndex The index of the CPU to write the SMM Save State. = The - value must be between 0 and the NumberOfCpus field = in - the System Management System Table (SMST). - @param[in] Register The SMM Save State register to write. - @param[in] Width The number of bytes to write to the CPU save state. - @param[in] Buffer Upon entry, this holds the new CPU register value. - - @retval EFI_SUCCESS The register was written to Save State. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED This function does not support writing Reg= ister. -**/ -EFI_STATUS -EFIAPI -SmmCpuFeaturesWriteSaveStateRegister ( - IN UINTN CpuIndex, - IN EFI_SMM_SAVE_STATE_REGISTER Register, - IN UINTN Width, - IN CONST VOID *Buffer - ) -{ - return EFI_UNSUPPORTED; -} - /** This function is hook point called after the gEfiSmmReadyToLockProtocolG= uid notification is completely processed. --=20 2.25.1