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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C X-Received: from SATLEXMB04.amd.com (165.204.84.17) by BN2PEPF000044A9.mail.protection.outlook.com (10.167.243.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7292.25 via Frontend Transport; Thu, 22 Feb 2024 17:31:23 +0000 X-Received: from tlendack-t1.amdoffice.net (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Thu, 22 Feb 2024 11:31:22 -0600 From: "Lendacky, Thomas via groups.io" To: CC: Ard Biesheuvel , Erdem Aktas , Gerd Hoffmann , Jiewen Yao , Laszlo Ersek , Liming Gao , Michael D Kinney , Min Xu , Zhiguang Liu , "Rahul Kumar" , Ray Ni , Michael Roth Subject: [edk2-devel] [PATCH v2 10/23] MdePkg/Register/Amd: Define the SVSM related information Date: Thu, 22 Feb 2024 11:29:49 -0600 Message-ID: <0d8005bc4f4059b42518ecd500aa9a534318178e.1708623001.git.thomas.lendacky@amd.com> In-Reply-To: References: MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF000044A9:EE_|SJ2PR12MB9237:EE_ X-MS-Office365-Filtering-Correlation-Id: 5178d78d-86dc-40d9-ce18-08dc33cc1764 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: dsFG/vUkCxw31pE7/iOQcbvi3XINLcc5MMeVHNNU51EU/nD53MY419xZ4uAy7T7Q0ztZc3o+0scMIn+kNedGd3NpsL3zoPB/ASHJd+Lm5bzTkNNNj47eDamYIQsqYvefu6VX9pJMphkNlmOiv99tvVjD2JFqhJv75KMn9NsZqKNQKU+E/z3w0Kf3cdaTqdCoYxm3KzsRG3qa7oANIJt0XYw+2xvBhKE0L9glVdjHbAfiGYc1bwhJwczHpL4vBPFxv/wr1QxDj18KInWf0/nxb1kgsclNgJBE/VDxy01eG7caGSpd3vqiNY5s/1CPdrbdNd6qTRq2YXC9p88d3QM4smMnkvH9+SkpIfFj8Qpie8GG0ERm/3HqoAM3YJYTxxwfOuuZRI0g1+rh8Y6ayBi+b95koiM52mzWnnpJfy1TxlasRFqyrqm+04lx0L57FtpEFWHzO1wKNCa9U0Tmqn5cVtChXoqLwDJl6rxwnojkDhTxnJ8CqoHFVzBPBYbSdM0DsI0BzsSSxP4l4Eavh6Ew295Zy1Oj6ip2b+Slw+V7YwiBlSBYEyVuHNg6ls31RTqQgVVdZEzJH71JDO1hVkXa7lN7XDt6YhEyMbi5OYoAaoJUo/irIQpP8iez4jp82cghWwWaD9g2xGJHsdWHl6ZL5w== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 22 Feb 2024 17:31:23.8126 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5178d78d-86dc-40d9-ce18-08dc33cc1764 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF000044A9.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB9237 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,thomas.lendacky@amd.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: vPuK2MOtMumJpsTWxW8O7R0nx7686176AA= Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=lQpfwP8z; dmarc=pass (policy=none) header.from=groups.io; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4654 The Secure VM Service Module specification defines the interfaces needed to allow multi-VMPL level execution of an SEV-SNP guest. Define the SVSM related structures for the SVSM Calling Area as well as the SVSM CAA MSR. The SVSM CAA MSR is an MSR register that is reserved for software use and will not be implemented in hardware. Acked-by: Gerd Hoffmann Signed-off-by: Tom Lendacky --- MdePkg/Include/Register/Amd/Fam17Msr.h | 19 +++- MdePkg/Include/Register/Amd/Msr.h | 3 +- MdePkg/Include/Register/Amd/Svsm.h | 101 ++++++++++++++++++++ MdePkg/Include/Register/Amd/SvsmMsr.h | 35 +++++++ 4 files changed, 156 insertions(+), 2 deletions(-) diff --git a/MdePkg/Include/Register/Amd/Fam17Msr.h b/MdePkg/Include/Regist= er/Amd/Fam17Msr.h index bb4e143e2456..f2d5ccb39dc7 100644 --- a/MdePkg/Include/Register/Amd/Fam17Msr.h +++ b/MdePkg/Include/Register/Amd/Fam17Msr.h @@ -6,7 +6,7 @@ returned is a single 32-bit or 64-bit value, then a data structure is no= t provided for that MSR. =20 - Copyright (c) 2017, Advanced Micro Devices. All rights reserved.
+ Copyright (c) 2017 - 2024, Advanced Micro Devices. All rights reserved.<= BR> SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Specification Reference: @@ -71,9 +71,24 @@ typedef union { UINT32 ErrorCode; } SnpPageStateChangeResponse; =20 + struct { + UINT64 Function : 12; + UINT64 Reserved1 : 20; + UINT64 Vmpl : 8; + UINT64 Reserved2 : 56; + } SnpVmplRequest; + + struct { + UINT32 Function : 12; + UINT32 Reserved : 20; + UINT32 ErrorCode; + } SnpVmplResponse; + VOID *Ghcb; =20 UINT64 GhcbPhysicalAddress; + + UINT64 Uint64; } MSR_SEV_ES_GHCB_REGISTER; =20 #define GHCB_INFO_SEV_INFO 1 @@ -84,6 +99,8 @@ typedef union { #define GHCB_INFO_GHCB_GPA_REGISTER_RESPONSE 19 #define GHCB_INFO_SNP_PAGE_STATE_CHANGE_REQUEST 20 #define GHCB_INFO_SNP_PAGE_STATE_CHANGE_RESPONSE 21 +#define GHCB_INFO_SNP_VMPL_REQUEST 22 +#define GHCB_INFO_SNP_VMPL_RESPONSE 23 #define GHCB_HYPERVISOR_FEATURES_REQUEST 128 #define GHCB_HYPERVISOR_FEATURES_RESPONSE 129 #define GHCB_INFO_TERMINATE_REQUEST 256 diff --git a/MdePkg/Include/Register/Amd/Msr.h b/MdePkg/Include/Register/Am= d/Msr.h index 084eb892cdd9..04a3cbeb4315 100644 --- a/MdePkg/Include/Register/Amd/Msr.h +++ b/MdePkg/Include/Register/Amd/Msr.h @@ -6,7 +6,7 @@ returned is a single 32-bit or 64-bit value, then a data structure is no= t provided for that MSR. =20 - Copyright (c) 2017 - 2019, Advanced Micro Devices. All rights reserved.<= BR> + Copyright (c) 2017 - 2024, Advanced Micro Devices. All rights reserved.<= BR> SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Specification Reference: @@ -19,5 +19,6 @@ =20 #include #include +#include =20 #endif diff --git a/MdePkg/Include/Register/Amd/Svsm.h b/MdePkg/Include/Register/A= md/Svsm.h new file mode 100644 index 000000000000..9a989f803107 --- /dev/null +++ b/MdePkg/Include/Register/Amd/Svsm.h @@ -0,0 +1,101 @@ +/** @file + Secure VM Service Module (SVSM) Definition. + + Provides data types allowing an SEV-SNP guest to interact with the SVSM. + + Copyright (C) 2024, Advanced Micro Devices, Inc. All rights reserved. + SPDX-License-Identifier: BSD-2-Clause-Patent + + @par Specification Reference: + Secure VM Service Module Specification + +**/ + +#ifndef SVSM_H_ +#define SVSM_H_ + +#include +#include +#include + +// +// The SVSM definitions are part of the SNP Secrets Page: +// An SVSM is considered present if the SvsmSize field is non-zero. +// +typedef PACKED struct { + UINT8 Reserved1[320]; + + UINT64 SvsmBase; + UINT64 SvsmSize; + UINT64 SvsmCaa; + UINT32 SvsmMaxVersion; + UINT8 SvsmGuestVmpl; + UINT8 Reserved2[3]; +} SVSM_INFORMATION; + +typedef PACKED struct { + UINT8 SvsmCallPending; + UINT8 SvsmMemAvailable; + UINT8 Reserved1[6]; + + // + // The remainder of the CAA 4KB area can be used for argument + // passing to the SVSM. + // + UINT8 SvsmBuffer[SIZE_4KB - 8]; +} SVSM_CAA; + +#define SVSM_SUCCESS 0x00000000 +#define SVSM_ERR_INCOMPLETE 0x80000000 +#define SVSM_ERR_UNSUPPORTED_PROTOCOL 0x80000001 +#define SVSM_ERR_UNSUPPORTED_CALL 0x80000002 +#define SVSM_ERR_INVALID_ADDRESS 0x80000003 +#define SVSM_ERR_INVALID_FORMAT 0x80000004 +#define SVSM_ERR_INVALID_PARAMETER 0x80000005 +#define SVSM_ERR_INVALID_REQUEST 0x80000006 +#define SVSM_ERR_BUSY 0x80000007 + +#define SVSM_ERR_PVALIDATE_FAIL_INPUT 0x80001001 +#define SVSM_ERR_PVALIDATE_FAIL_SIZE_MISMATCH 0x80001006 +#define SVSM_ERR_PVALIDATE_FAIL_NO_CHANGE 0x80001010 + +typedef PACKED struct { + UINT16 Entries; + UINT16 Next; + + UINT8 Reserved[4]; +} SVSM_PVALIDATE_HEADER; + +typedef union { + struct { + UINT64 PageSize : 2; + UINT64 Action : 1; + UINT64 IgnoreCf : 1; + UINT64 Reserved_2 : 8; + UINT64 Address : 52; + } Bits; + UINT64 Uint64; +} SVSM_PVALIDATE_ENTRY; + +typedef PACKED struct { + SVSM_PVALIDATE_HEADER Header; + SVSM_PVALIDATE_ENTRY Entry[]; +} SVSM_PVALIDATE_REQUEST; + +#define SVSM_PVALIDATE_MAX_ENTRY \ + ((sizeof (((SVSM_CAA *)0)->SvsmBuffer) - sizeof (SVSM_PVALIDATE_HEADER))= / sizeof (SVSM_PVALIDATE_ENTRY)) + +typedef union { + SVSM_PVALIDATE_REQUEST PvalidateRequest; +} SVSM_REQUEST; + +typedef union { + struct { + UINT32 CallId; + UINT32 Protocol; + } Id; + + UINT64 Uint64; +} SVSM_FUNCTION; + +#endif diff --git a/MdePkg/Include/Register/Amd/SvsmMsr.h b/MdePkg/Include/Registe= r/Amd/SvsmMsr.h new file mode 100644 index 000000000000..9e7fca880ba5 --- /dev/null +++ b/MdePkg/Include/Register/Amd/SvsmMsr.h @@ -0,0 +1,35 @@ +/** @file + MSR Definitions. + + Provides defines for Machine Specific Registers(MSR) indexes. Data struc= tures + are provided for MSRs that contain one or more bit fields. If the MSR v= alue + returned is a single 32-bit or 64-bit value, then a data structure is no= t + provided for that MSR. + + Copyright (c) 2024, Advanced Micro Devices. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef SVSM_MSR_H_ +#define SVSM_MSR_H_ + +/** + Secure VM Service Module CAA register + +**/ +#define MSR_SVSM_CAA 0xc001f000 + +/** + MSR information returned for #MSR_SVSM_CAA +**/ +typedef union { + struct { + UINT32 Lower32Bits; + UINT32 Upper32Bits; + } Bits; + + UINT64 Uint64; +} MSR_SVSM_CAA_REGISTER; + +#endif --=20 2.42.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#115845): https://edk2.groups.io/g/devel/message/115845 Mute This Topic: https://groups.io/mt/104512952/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-