From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 25599740032 for ; Mon, 4 Mar 2024 03:39:52 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=ePGUOKrzDc/YOUpk6PxachnrUY+by9fqDCUaybrEtFM=; c=relaxed/simple; d=groups.io; h=Message-ID:Date:MIME-Version:User-Agent:Subject:To:Cc:References:From:In-Reply-To:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Type; s=20140610; t=1709523591; v=1; b=BwupF+xs8dEwvwQvGAVR9Dn0IcTvDK/H2jpEoXFtN4HqyRgFVUVmnB6xty5Rz22lzJzLg84N +YHG9Ewk97dMCbJMjIOHgYS7c9iwjX3Hk8eAzI8d8jgpDP9Ie4qhbhYhoNRz1vLCdpaMXrrtTfP UAZb2LaI/WgMUY72uTKk5xtI= X-Received: by 127.0.0.2 with SMTP id X0j2YY7687511xaQif7Wb5qU; Sun, 03 Mar 2024 19:39:51 -0800 X-Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.90367.1709523588460289527 for ; Sun, 03 Mar 2024 19:39:50 -0800 X-Received: from loongson.cn (unknown [10.40.24.149]) by gateway (Coremail) with SMTP id _____8DxdfGAQuVlmfITAA--.50471S3; Mon, 04 Mar 2024 11:39:44 +0800 (CST) X-Received: from [10.40.24.149] (unknown [10.40.24.149]) by localhost.localdomain (Coremail) with SMTP id AQAAf8DxDc98QuVlTYhNAA--.9387S3; Mon, 04 Mar 2024 11:39:42 +0800 (CST) Message-ID: <0dd107d1-4e12-45d7-ac27-a755272c55c2@loongson.cn> Date: Mon, 4 Mar 2024 11:39:40 +0800 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [edk2-devel] [PATCH v8 14/37] UefiCpuPkg: Add CpuMmuLib to UefiCpuPkg To: Laszlo Ersek , devel@edk2.groups.io, "Ni, Ray" Cc: "Dong, Eric" , "Kumar, Rahul R" , Gerd Hoffmann , Baoqi Zhang , Dongyan Qian , Xianglai Li , Bibo Mao References: <20240126062715.3099433-1-lichao@loongson.cn> <20240126062919.3101691-1-lichao@loongson.cn> <856ebd67-d345-6e41-2e34-74b9bdd7ed7e@redhat.com> <2187d8cd-3578-4f3f-a158-2961571f851b@loongson.cn> <8e97514d-cd2f-881a-f1e4-ed1bdbd03320@redhat.com> From: "Chao Li" In-Reply-To: <8e97514d-cd2f-881a-f1e4-ed1bdbd03320@redhat.com> X-CM-TRANSID: AQAAf8DxDc98QuVlTYhNAA--.9387S3 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQAGCGXkNOUDjQABsQ X-Coremail-Antispam: 1Uk129KBj93XoW7tw4UXr4UZFWDtr45ZrW5Jwc_yoW8Xw1kpF ZFgrW2kr4DJa45Jr4xAayrXFnakrZ7A345J3s0krZrCw4jvr429rWv9rZ8Aa43ursxt3Wj 9a12g3ykuFWqk3gCm3ZEXasCq-sJn29KB7ZKAUJUUUU8529EdanIXcx71UUUUU7KY7ZEXa sCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnRJUUUgvb4IE77IF4wAF F20E14v26r1j6r4UM7CY07I20VC2zVCF04k26cxKx2IYs7xG6rWj6s0DM7CIcVAFz4kK6r 106r15M28lY4IEw2IIxxk0rwA2F7IY1VAKz4vEj48ve4kI8wA2z4x0Y4vE2Ix0cI8IcVAF wI0_JFI_Gr1l84ACjcxK6xIIjxv20xvEc7CjxVAFwI0_Jr0_Gr1l84ACjcxK6I8E87Iv67 AKxVWxJVW8Jr1l84ACjcxK6I8E87Iv6xkF7I0E14v26r4UJVWxJr1le2I262IYc4CY6c8I j28IcVAaY2xG8wAqjxCEc2xF0cIa020Ex4CE44I27wAv7VC0I7IYx2IY67AKxVWUJVWUGw Av7VC2z280aVAFwI0_Jr0_Gr1lOx8S6xCaFVCjc4AY6r1j6r4UM4x0Y48IcVAKI48JMxAI w28IcxkI7VAKI48JMxC20s026xCaFVCjc4AY6r1j6r4UMI8I3I0E5I8CrVAFwI0_JrI_Jr Wlx2IqxVCjr7xvwVAFwI0_JrI_JrWlx4CE17CEb7AF67AKxVWUtVW8ZwCIc40Y0x0EwIxG rwCI42IY6xIIjxv20xvE14v26r1j6r1xMIIF0xvE2Ix0cI8IcVCY1x0267AKxVWUJVW8Jw CI42IY6xAIw20EY4v20xvaj40_Jr0_JF4lIxAIcVC2z280aVAFwI0_Jr0_Gr1lIxAIcVC2 z280aVCY1x0267AKxVWUJVW8JbIYCTnIWIevJa73UjIFyTuYvjxUz4SrUUUUU Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lichao@loongson.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: hzLxDtZu8pheNXO3241orBDHx7686176AA= Content-Type: multipart/alternative; boundary="------------QtVJjo0z27j60pYbfUyI5okz" X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=BwupF+xs; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io --------------QtVJjo0z27j60pYbfUyI5okz Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: quoted-printable Hi Laszlo, OK. When I discussed the CpuMmuLib API as a public API with Ray in the early=20 days, the API recommended by Ray should be the patch 13 in this series,=20 which only contains set/get memory region attribute, but in the first=20 version in this series, it contains more API, one is ConfigureMmu API,=20 which is included in ARM and RISCV versions. This API provides a=20 interface called in PEI or DXE stage, it will configures the MMU and=20 enables it, such as creating the page tables, filling the static page=20 tables, cofniguring the MMU registers, enbale MMU, etc. The paths for ARM and RISCV version APIs: ARM: ArmPkg/Include/Library/ArmMmuLib.h RISCV: UefiCpuPkg/Include/Library/BaseRiscVMmuLib.h Thanks, Chao On 2024/3/1 19:27, Laszlo Ersek wrote: > On 3/1/24 02:26, Chao Li wrote: >> Hi Ray, Lazslo, >> >> This library is almost complete to refactored, it refer to ARM and >> RISC-V version, the API include set/get memory region attribute. >> >> I have one last question, in ARM and RISC-V version, even LoongArch old >> and current version, they all request a configure interface, which may >> be called in PEI or DXE stage, so should we open configure API? If so, >> it is possible for ARM RISC-V and LongArch's MMU libraries to be meged >> into the same instance if they wished. > Sorry, I've lost all context by now. I don't understand what you mean by > "they all request a configure interface". > > Please provide pathnames and function names for the existent code that > you are referring to as examples (and then please restate / rephrase > your question as well). > > Laszlo -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#116303): https://edk2.groups.io/g/devel/message/116303 Mute This Topic: https://groups.io/mt/103971653/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- --------------QtVJjo0z27j60pYbfUyI5okz Content-Type: text/html; charset=UTF-8 Content-Transfer-Encoding: quoted-printable

Hi Laszlo,

OK.

When I discussed the CpuMmuLib API as a public API with Ray in the early days, the API recommended by Ray should be the patch 13 in this series, which only contains set/get memory region attribute, but in the first version in this series, it contains more API, one is ConfigureMmu API, which is included in ARM and RISCV versions. This API provides a interface called in PEI or DXE stage, it will configures the MMU and enables it, such as creating the page tables, filling the static page tables, cofniguring the MMU registers, enbale MMU, etc.

The paths for ARM and RISCV version APIs:

ARM: ArmPkg/Include/Library/ArmMmuLib.h

RISCV: UefiCpuPkg/Include/Library/BaseRiscVMmuLib.h


=
Thanks,
Chao
On 2024/3/1 19:27, Laszlo Ersek wrote: 
On 3/1/24 02:26, Chao Li wrote=
:

Hi Ray, Lazslo,

This library is almost complete to refactored, it refer to ARM and
RISC-V version, the API include set/get memory region attribute.

I have one last question, in ARM and RISC-V version, even LoongArch old
and current version, they all request a configure interface, which may
be called in PEI or DXE stage, so should we open configure API? If so,
it is possible for ARM RISC-V and LongArch's MMU libraries to be meged
into the same instance if they wished.

Sorry, I've lost all context by now. I don't understand what you mean by
"they all request a configure interface".

Please provide pathnames and function names for the existent code that
you are referring to as examples (and then please restate / rephrase
your question as well).

Laszlo
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