Re: [edk2-devel] [PATCH v2 0/5] OvmfPkg: Add support for 5-level paging

["Lendacky, Thomas via groups.io" <thomas.lendacky=amd.com@groups.io>]

On 2/2/24 02:44, Gerd Hoffmann wrote:
> On Fri, Feb 02, 2024 at 08:30:23AM +0000, Xu, Min M wrote:
>>> Pushed branch with two experimental patches:
>>>    https://github.com/kraxel/edk2/commits/devel/paging-5lvl/
>>>
>>> One for tdx, writing different values into TDX_WORK_AREA_PGTBL_READY for
>>> 4-level and 5-level paging modes.
>>>
>>> One for sev, which adds a 2-level page directory for the first gigabyte and
>>> places it at the same physical address it has in 4-level paging.
>>> With that SevClearPageEncMaskForGhcbPage should work unmodified in 5-
>>> level mode.
>>>
>>> Test results are welcome.
>>
>> Thanks Gerd, it works in TDX. One typo in the patch that pageTableEntriesLoopla57  and pageTableEntriesLoopLa57.
> 
> Thanks for testing.
> 
> Added a second sev patch to the branch, rearranging the #vc
> handler uninstall to make the la57 cpuid checks work on sev.
> 
> @Tom: Would be great if you can give this a test

So this gets us past the ASM code CPUID instructions, however, the
SEV support is still assuming 4-level paging and so:

SEV ASSERT:
   AmdSevDxe:SetMemoryEncDec: bad PML4 for Physical=0x8000000000

   ASSERT_EFI_ERROR (Status = No mapping)
   ASSERT [AmdSevDxe] /root/kernels/ovmf-gerd-build-X64/OvmfPkg/AmdSevDxe/AmdSevDxe.c(235): !(((INTN)(RETURN_STATUS)(Status)) < 0)

SEV-ES and SEV-SNP ASSERT:
   PlatformPei:SetMemoryEncDec: bad PDPE for Physical=0x7FE5C000

   ASSERT_RETURN_ERROR (Status = No mapping)
   ASSERT [PlatformPei] /root/kernels/ovmf-gerd-build-X64/OvmfPkg/PlatformPei/AmdSev.c(254): !(((INTN)(RETURN_STATUS)(Status)) < 0)

FYI, this uncovered an SNP CPUID table processing bug in the ResetVector
code and so I sent a fix to the mailing list.

Thanks,
Tom

> 
> thanks & take care,
>    Gerd
> 
> PS: I'll be offline next week.
> 


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