答复: [edk2-devel] question about PCI bridge's bus range window configure's save and restore

[wangxiao.bj@inspur.com]

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It’s done by BIOS pei s3 resume code.  Restored register value saved  while BIOS normal POST BY BootScriptExecutor.  You can refer  gEfiPeiS3Resume2Ppi  usage

Thanks

发件人: devel@edk2.groups.io [mailto:devel@edk2.groups.io] 代表 Tiger Liu(BJ-RD)
发送时间: 2020年8月10日 17:32
收件人: devel@edk2.groups.io
主题: [edk2-devel] question about PCI bridge's bus range window configure's save and restore



Hi, Experts:

I have a question about PCI Bridge’s config space’s save and restore.



Pci bus driver configured PCI Bridges’ secondary bus number register and subordinate bus number register.



So, if system resumes from S3(Suspend to ram) state, who is responsible for restoring PCI Bridges’ secondary bus number / subordinate bus number registers’ content?



Will the OS be responsible for it?



Thanks





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