* [edk2-devel] [PATCH 0/1] Add support for generating SRAT tables
@ 2024-01-31 13:15 Xiong Yining
2024-01-31 13:15 ` [edk2-devel] [PATCH 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime Xiong Yining
0 siblings, 1 reply; 5+ messages in thread
From: Xiong Yining @ 2024-01-31 13:15 UTC (permalink / raw)
To: devel
Cc: quic_llindhol, ardb+tianocore, graeme, marcin.juszkiewicz,
chenbaozi, Xiong Yining
SbsaQemu can configure with numa-related arguments, but OS cannot
identify the numa architecture without SRAT tables. We add supporting
for generating SRAT tables at runtime to solve this issue.
the numa-related information and memory information can be obtained via
SMC calls which is provided on the EDK2 patch "get rid of DeviceTree from
SbsaQemu"
Xiong Yining (1):
SbsaQemu: AcpiDxe: Create SRAT table at runtime
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 27 ++++++
.../Include/Library/SbsaQemuHardwareInfoLib.h | 11 +++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 92 +++++++++++++++++++
.../SbsaQemuHardwareInfoLib.c | 36 ++++++++
4 files changed, 166 insertions(+)
--
2.34.1
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* [edk2-devel] [PATCH 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime
2024-01-31 13:15 [edk2-devel] [PATCH 0/1] Add support for generating SRAT tables Xiong Yining
@ 2024-01-31 13:15 ` Xiong Yining
2024-02-15 14:17 ` Marcin Juszkiewicz
0 siblings, 1 reply; 5+ messages in thread
From: Xiong Yining @ 2024-01-31 13:15 UTC (permalink / raw)
To: devel
Cc: quic_llindhol, ardb+tianocore, graeme, marcin.juszkiewicz,
chenbaozi, Xiong Yining
Add support to create SRAT(System resource affinity table) for
sbsa platform at runtime.
Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
---
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 27 ++++++
.../Include/Library/SbsaQemuHardwareInfoLib.h | 11 +++
.../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 92 +++++++++++++++++++
.../SbsaQemuHardwareInfoLib.c | 36 ++++++++
4 files changed, 166 insertions(+)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
index 7595df4c8a2d..b8c29b803b81 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
@@ -63,4 +63,31 @@ typedef struct {
#define GTDT_WDTIMER_FLAGS (GTDT_WDTIMER_ACTIVE_HIGH | GTDT_WDTIMER_LEVEL_TRIGGERED)
+#define SBSAQEMU_ACPI_MEMORY_AFFINITY_STRUCTURE_INIT( \
+ ProximityDomain, Base, Length, Flags) \
+ { \
+ 1, /* Type */ \
+ sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE), /* Length */ \
+ ProximityDomain, /* Proximity Domain */ \
+ 0, /* Reserved */ \
+ (Base) & 0xffffffff, /* Base Address Low */ \
+ ((Base) >> 32) & 0xffffffff , /* Base Address High */ \
+ (Length) & 0xffffffff, /* Length Low */ \
+ ((Length) >> 32) & 0xffffffff, /* Length High */ \
+ 0, /* Reserved */ \
+ Flags, /* Flags */ \
+ 0 /* Reserved */ \
+ }
+
++#define SBSAQEMU_ACPI_GICC_AFFINITY_STRUCTURE_INIT( \
+ ProximtyDomain, ACPIProcessorUID, Flags, ClockDomain) \
+ { \
+ 3, /* Type */ \
+ sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE), /* Length */ \
+ ProximityDomain, /* Proximity Domain */ \
+ ACPIProcessorUID, /* ACPI Processor UID */ \
+ Flags, /* Flags */ \
+ ClockDomain /* Clock Domain */ \
+ }
+
#endif
diff --git a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
index 0b71a3f7e6eb..831efe2e8d1d 100644
--- a/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
+++ b/Silicon/Qemu/SbsaQemu/Include/Library/SbsaQemuHardwareInfoLib.h
@@ -70,4 +70,15 @@ SbsaQemuGetMemInfo (
IN UINTN MemoryId
);
+/**
+ Get the number of numa node from device tree passed by Qemu.
+
+ @retval the number of numa node.
+**/
+UINT64
+SbsaQemuGetNumaNodeCount (
+ VOID
+ );
+
+
#endif /* SBSA_QEMU_HARDWARE_INFO_ */
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
index 03f7a34977a0..2685d4b00426 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c
@@ -682,6 +682,91 @@ AddGtdtTable (
return Status;
}
+/*
+ * A function that adds the SRAT ACPI table.
+ */
+EFI_STATUS
+AddSratTable (
+ IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable
+ )
+{
+ EFI_STATUS Status;
+ UINT8 *New;
+ EFI_PHYSICAL_ADDRESS PageAddress;
+ UINTN TableHandle;
+ UINT32 TableSize;
+ UINT32 Index;
+ UINT32 NodeId;
+ UINT32 NumMemNodes;
+ MemoryInfo MemInfo;
+ UINT32 NumCores = PcdGet32 (PcdCoreCount);
+
+ // Initialize SRAT ACPI Header
+ EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER Header = {
+ SBSAQEMU_ACPI_HEADER (EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_SIGNATURE,
+ EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER,
+ EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION),
+ 1, 0 };
+
+ NumMemNodes = SbsaQemuGetMemNodeCount();
+
+ // Calculate the new table size based on the number of cores
+ TableSize = sizeof (EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER) +
+ (sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE) * NumMemNodes ) +
+ (sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE) * NumCores);
+
+ Status = gBS->AllocatePages (
+ AllocateAnyPages,
+ EfiACPIReclaimMemory,
+ EFI_SIZE_TO_PAGES (TableSize),
+ &PageAddress
+ );
+
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to allocate pages for SRAT table\n"));
+ return EFI_OUT_OF_RESOURCES;
+ }
+
+ New = (UINT8 *)(UINTN) PageAddress;
+ ZeroMem (New, TableSize);
+
+ // Add the ACPI Description table header
+ CopyMem (New, &Header, sizeof (EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER));
+ ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length = TableSize;
+ New += sizeof (EFI_ACPI_6_4_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER);
+
+ // Add memory structures
+ for (Index = 0; Index < NumMemNodes ; Index++) {
+ MemInfo = SbsaQemuGetMemInfo (Index);
+ EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE memory = SBSAQEMU_ACPI_MEMORY_AFFINITY_STRUCTURE_INIT (MemInfo.NodeId, MemInfo.AddressBase, MemInfo.AddressSize, 1);
+ CopyMem (New, &memory, sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE));
+ New += sizeof (EFI_ACPI_6_4_MEMORY_AFFINITY_STRUCTURE);
+ }
+
+ // Add processor structures for the cores
+ for (Index = 0; Index < NumCores; Index++) {
+ NodeId = SbsaQemuGetCpuNumaNode(Index);
+ EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE gicc = SBSAQEMU_ACPI_GICC_AFFINITY_STRUCTURE_INIT(NodeId, Index, 1, 0);
+ CopyMem (New, &gicc, sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE));
+ New += sizeof (EFI_ACPI_6_4_GICC_AFFINITY_STRUCTURE);
+ }
+
+ // Perform Checksum
+ AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize);
+
+ Status = AcpiTable->InstallAcpiTable (
+ AcpiTable,
+ (EFI_ACPI_COMMON_HEADER *)PageAddress,
+ TableSize,
+ &TableHandle
+ );
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to install SRAT table\n"));
+ }
+
+ return Status;
+}
+
/*
* A function to disable XHCI node on Platform Version lower than 0.3
*/
@@ -793,6 +878,13 @@ InitializeSbsaQemuAcpiDxe (
DEBUG ((DEBUG_ERROR, "Failed to add PPTT table\n"));
}
+ if (SbsaQemuGetNumaNodeCount() > 0){
+ Status = AddSratTable (AcpiTable);
+ if (EFI_ERROR (Status)) {
+ DEBUG ((DEBUG_ERROR, "Failed to add SRAT table\n"));
+ }
+ }
+
Status = AddGtdtTable (AcpiTable);
if (EFI_ERROR (Status)) {
DEBUG ((DEBUG_ERROR, "Failed to add GTDT table\n"));
diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
index 03e33c544ee0..04a8a076ab64 100644
--- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
+++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuHardwareInfoLib/SbsaQemuHardwareInfoLib.c
@@ -352,3 +352,39 @@ SbsaQemuGetMemInfo (
return MemInfo;
}
+
+UINT64
+SbsaQemuGetNumaNodeCount (
+ VOID
+)
+{
+ UINT64 Arg;
+ UINT32 Index;
+ UINT32 NumNumaCount;
+ UINT32 NumMemCount;
+ UINT32 NumCores = PcdGet32 (PcdCoreCount);
+ MemoryInfo MemInfo;
+
+ NumNumaCount = 0;
+ NumMemCount = SbsaQemuGetMemNodeCount();
+
+ if (NumCores > 0){
+ for (Index = 0; Index < NumCores; Index ++){
+ Arg = SbsaQemuGetCpuNumaNode(Index);
+ if (NumNumaCount == 0 || NumNumaCount < (Arg + 1)){
+ NumNumaCount = Arg + 1;
+ }
+ }
+ }
+
+ if (NumMemCount > 0){
+ for (Index = 0; Index < NumMemCount; Index ++){
+ MemInfo = SbsaQemuGetMemInfo(Index);
+ if (NumNumaCount == 0 || NumNumaCount < (MemInfo.NodeId + 1)){
+ NumNumaCount = MemInfo.NodeId + 1;
+ }
+ }
+ }
+
+ return NumNumaCount;
+}
--
2.34.1
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* Re: [edk2-devel] [PATCH 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime
2024-01-31 13:15 ` [edk2-devel] [PATCH 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime Xiong Yining
@ 2024-02-15 14:17 ` Marcin Juszkiewicz
2024-02-20 8:03 ` Xiong Yining
0 siblings, 1 reply; 5+ messages in thread
From: Marcin Juszkiewicz @ 2024-02-15 14:17 UTC (permalink / raw)
To: Xiong Yining, devel; +Cc: quic_llindhol, ardb+tianocore, graeme, chenbaozi
W dniu 31.01.2024 o 2:15 PM, Xiong Yining pisze:
> Add support to create SRAT(System resource affinity table) for
> sbsa platform at runtime.
>
> Signed-off-by: Xiong Yining <xiongyining1480@phytium.com.cn>
> Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn>
> ---
> .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h | 27 ++++++
> .../Include/Library/SbsaQemuHardwareInfoLib.h | 11 +++
> .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 92 +++++++++++++++++++
> .../SbsaQemuHardwareInfoLib.c | 36 ++++++++
> 4 files changed, 166 insertions(+)
>
> diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
> index 7595df4c8a2d..b8c29b803b81 100644
> --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
> +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.h
> @@ -63,4 +63,31 @@ typedef struct {
>
> ++#define SBSAQEMU_ACPI_GICC_AFFINITY_STRUCTURE_INIT( \
> + ProximtyDomain, ACPIProcessorUID, Flags, ClockDomain) \
s/ProximtyDomain/ProximityDomain/ please
Applied it on top of 20240131120507.2829117-1-xiongyining1480@phytium.com.cn
series ("get rid of DeviceTree from SbsaQemu v5" one).
Code boots but only memory from the first node is listed by both EDK2 and Linux.
QEMU arguments:
-smp 4,sockets=4,maxcpus=4
-m 4G,slots=2,maxmem=5G
-object memory-backend-ram,size=1G,id=m0
-object memory-backend-ram,size=3G,id=m1
-numa node,nodeid=0,cpus=0-1,memdev=m0
-numa node,nodeid=1,cpus=2,memdev=m1
-numa node,nodeid=2,cpus=3
EDK2 memmap:
Type Start End # Pages Attributes
Available 0000010000000000-000001003841AFFF 000000000003841B 000000000000000E
LoaderCode 000001003841B000-00000100384FFFFF 00000000000000E5 000000000000000E
RT_Code 0000010038500000-000001003857FFFF 0000000000000080 800000000000000E
RT_Data 0000010038580000-000001003861FFFF 00000000000000A0 800000000000000E
RT_Code 0000010038620000-000001003866FFFF 0000000000000050 800000000000000E
ACPI_Recl 0000010038670000-00000100386DFFFF 0000000000000070 000000000000000E
RT_Code 00000100386E0000-000001003872FFFF 0000000000000050 800000000000000E
Available 0000010038730000-000001003A00DFFF 00000000000018DE 000000000000000E
BS_Data 000001003A00E000-000001003A02BFFF 000000000000001E 000000000000000E
Available 000001003A02C000-000001003A039FFF 000000000000000E 000000000000000E
BS_Data 000001003A03A000-000001003A056FFF 000000000000001D 000000000000000E
Available 000001003A057000-000001003A057FFF 0000000000000001 000000000000000E
BS_Data 000001003A058000-000001003B623FFF 00000000000015CC 000000000000000E
Available 000001003B624000-000001003B7D3FFF 00000000000001B0 000000000000000E
BS_Code 000001003B7D4000-000001003BBFFFFF 000000000000042C 000000000000000E
RT_Code 000001003BC00000-000001003BD8FFFF 0000000000000190 800000000000000E
RT_Data 000001003BD90000-000001003BFDFFFF 0000000000000250 800000000000000E
Available 000001003BFE0000-000001003BFFEFFF 000000000000001F 000000000000000E
BS_Data 000001003BFFF000-000001003C01FFFF 0000000000000021 000000000000000E
Available 000001003C020000-000001003F7D4FFF 00000000000037B5 000000000000000E
BS_Data 000001003F7D5000-000001003F7F5FFF 0000000000000021 000000000000000E
BS_Code 000001003F7F6000-000001003F83CFFF 0000000000000047 000000000000000E
BS_Data 000001003F83D000-000001003FFD9FFF 000000000000079D 000000000000000E
BS_Code 000001003FFDA000-000001003FFF7FFF 000000000000001E 000000000000000E
BS_Data 000001003FFF8000-000001003FFFFFFF 0000000000000008 000000000000000E
MMIO 0000000010000000-00000000106BFFFF 00000000000006C0 8000000000000001
MMIO 0000000060010000-0000000060010FFF 0000000000000001 8000000000000001
Reserved : 0 Pages (0 Bytes)
LoaderCode: 229 Pages (937,984 Bytes)
LoaderData: 0 Pages (0 Bytes)
BS_Code : 1,169 Pages (4,788,224 Bytes)
BS_Data : 7,662 Pages (31,383,552 Bytes)
RT_Code : 688 Pages (2,818,048 Bytes)
RT_Data : 752 Pages (3,080,192 Bytes)
ACPI_Recl : 112 Pages (458,752 Bytes)
ACPI_NVS : 0 Pages (0 Bytes)
MMIO : 1,729 Pages (7,081,984 Bytes)
MMIO_Port : 0 Pages (0 Bytes)
PalCode : 0 Pages (0 Bytes)
Available : 251,532 Pages (1,030,275,072 Bytes)
Persistent: 0 Pages (0 Bytes)
--------------
Total Memory: 1,024 MB (1,073,741,824 Bytes)
SRAT table shows both memory nodes:
--------------- SRAT Table ---------------
Address : 0x100386DFD18
Length : 200
00000000 : 53 52 41 54 C8 00 00 00 - 03 48 4C 49 4E 41 52 4F SRAT.....HLINARO
00000010 : 53 42 53 41 51 45 4D 55 - 10 08 20 20 4C 4E 52 4F SBSAQEMU.. LNRO
00000020 : 01 00 00 00 01 00 00 00 - 00 00 00 00 00 00 00 00 ................
00000030 : 01 28 01 00 00 00 00 00 - 00 00 00 40 00 01 00 00 .(.........@....
00000040 : 00 00 00 C0 00 00 00 00 - 00 00 00 00 01 00 00 00 ................
00000050 : 00 00 00 00 00 00 00 00 - 01 28 00 00 00 00 00 00 .........(......
00000060 : 00 00 00 00 00 01 00 00 - 00 00 00 40 00 00 00 00 ...........@....
00000070 : 00 00 00 00 01 00 00 00 - 00 00 00 00 00 00 00 00 ................
00000080 : 03 12 00 00 00 00 00 00 - 00 00 01 00 00 00 00 00 ................
00000090 : 00 00 03 12 00 00 00 00 - 01 00 00 00 01 00 00 00 ................
000000A0 : 00 00 00 00 03 12 01 00 - 00 00 02 00 00 00 01 00 ................
000000B0 : 00 00 00 00 00 00 03 12 - 02 00 00 00 03 00 00 00 ................
000000C0 : 01 00 00 00 00 00 00 00 ........
Table Checksum : OK
SRAT :
Signature : SRAT
Length : 200
Revision : 3
Checksum : 0x48
Oem ID : LINARO
Oem Table ID : SBSAQEMU
Oem Revision : 0x20200810
Creator ID : LNRO
Creator Revision : 0x1
Reserved : 0x1
Reserved : 0x0
Memory Affinity Structure [0] :
Type : 0x1
Length : 0x28
Proximity Domain : 0x1
Reserved : 0x0
Base Address Low : 0x40000000
Base Address High : 0x100
Length Low : 0xC0000000
Length High : 0x0
Reserved : 0x0
Flags : 0x1
Reserved : 0x0
Memory Affinity Structure [1] :
Type : 0x1
Length : 0x28
Proximity Domain : 0x0
Reserved : 0x0
Base Address Low : 0x0
Base Address High : 0x100
Length Low : 0x40000000
Length High : 0x0
Reserved : 0x0
Flags : 0x1
Reserved : 0x0
GICC Affinity Structure [0] :
Type : 0x3
Length : 0x12
Proximity Domain : 0x0
ACPI Processor UID : 0x0
Flags : 0x1
Clock Domain : 0x0
GICC Affinity Structure [1] :
Type : 0x3
Length : 0x12
Proximity Domain : 0x0
ACPI Processor UID : 0x1
Flags : 0x1
Clock Domain : 0x0
GICC Affinity Structure [2] :
Type : 0x3
Length : 0x12
Proximity Domain : 0x1
ACPI Processor UID : 0x2
Flags : 0x1
Clock Domain : 0x0
GICC Affinity Structure [3] :
Type : 0x3
Length : 0x12
Proximity Domain : 0x2
ACPI Processor UID : 0x3
Flags : 0x1
Clock Domain : 0x0
Linux (kernel from Debian or Fedora) boots with memory
from the first node only:
[ 0.000000] ACPI: SPCR: console: pl011,mmio32,0x60000000,115200
[ 0.000000] ACPI: SRAT: Node 1 PXM 1 [mem 0x10040000000-0x100ffffffff]
[ 0.000000] ACPI: SRAT: Node 0 PXM 0 [mem 0x10000000000-0x1003fffffff]
[ 0.000000] NUMA: NODE_DATA [mem 0x1003f6fd1c0-0x1003f713fff]
[ 0.000000] NUMA: Initmem setup node 1 [<memory-less node>]
[ 0.000000] NUMA: NODE_DATA [mem 0x1003f6e6380-0x1003f6fd1bf]
[ 0.000000] NUMA: NODE_DATA(1) on node 0
[ 0.000000] NUMA: Initmem setup node 2 [<memory-less node>]
[ 0.000000] NUMA: NODE_DATA [mem 0x1003f6cf540-0x1003f6e637f]
[ 0.000000] NUMA: NODE_DATA(2) on node 0
[ 0.000000] Zone ranges:
[ 0.000000] DMA [mem 0x0000010000000000-0x000001003fffffff]
[ 0.000000] DMA32 empty
[ 0.000000] Normal empty
[ 0.000000] Device empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x0000010000000000-0x00000100384fffff]
[ 0.000000] node 0: [mem 0x0000010038500000-0x000001003866ffff]
[ 0.000000] node 0: [mem 0x0000010038670000-0x00000100386dffff]
[ 0.000000] node 0: [mem 0x00000100386e0000-0x000001003872ffff]
[ 0.000000] node 0: [mem 0x0000010038730000-0x000001003bbfffff]
[ 0.000000] node 0: [mem 0x000001003bc00000-0x000001003bfdffff]
[ 0.000000] node 0: [mem 0x000001003bfe0000-0x000001003fffffff]
[ 0.000000] Initmem setup node 0 [mem 0x0000010000000000-0x000001003fffffff]
[ 0.000000] Initmem setup node 1 as memoryless
[ 0.000000] Initmem setup node 2 as memoryless
[ 0.000000] ACPI: NUMA: SRAT: PXM 0 -> MPIDR 0x0 -> Node 0
[ 0.000000] ACPI: NUMA: SRAT: PXM 0 -> MPIDR 0x1 -> Node 0
[ 0.000000] ACPI: NUMA: SRAT: PXM 1 -> MPIDR 0x2 -> Node 1
[ 0.000000] ACPI: NUMA: SRAT: PXM 2 -> MPIDR 0x3 -> Node 2
[ 0.000000] percpu: Embedded 15 pages/cpu s195368 r8192 d42200 u245760
[ 0.000000] Fallback order for Node 0: 0
[ 0.000000] Fallback order for Node 1: 1 0
[ 0.000000] Fallback order for Node 2: 2 0
[ 0.000000] Built 3 zonelists, mobility grouping on. Total pages: 65280
[ 0.000000] Memory: 833824K/1048576K available (18496K kernel code, 4236K rwdata, 16112K rodata, 10560K init, 10585K bss, 149216K reserved, 65536K cma-reserved)
[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=3
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^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: [edk2-devel] [PATCH 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime
2024-02-15 14:17 ` Marcin Juszkiewicz
@ 2024-02-20 8:03 ` Xiong Yining
2024-02-21 13:22 ` Marcin Juszkiewicz
0 siblings, 1 reply; 5+ messages in thread
From: Xiong Yining @ 2024-02-20 8:03 UTC (permalink / raw)
To: Marcin Juszkiewicz, devel
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This is beacuse UEFI only allocates the first memory node memory space for SbsaQemu platform, i refer to implemet of "OvmfPkg/Fdt/HighMemDxe" and add the support for other memory nodes via GCD services. Maybe you can apply patch "support multi memory nodes" together with this patch.
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* Re: [edk2-devel] [PATCH 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime
2024-02-20 8:03 ` Xiong Yining
@ 2024-02-21 13:22 ` Marcin Juszkiewicz
0 siblings, 0 replies; 5+ messages in thread
From: Marcin Juszkiewicz @ 2024-02-21 13:22 UTC (permalink / raw)
To: devel, xiongyining1480
W dniu 20.02.2024 o 9:03 AM, Xiong Yining pisze:
> This is beacuse UEFI only allocates the first memory node memory space
> for SbsaQemu platform, i refer to implemet of "OvmfPkg/Fdt/HighMemDxe"
> and add the support for other memory nodes via GCD services. Maybe you
> can apply patch "support multi memory nodes" together with this patch.
Collected patches:
6ea06a5ae4c9 (tag: multi-node-v3) SbsaQemu: add memory space for the high memory nodes
6cad2691e06e (tag: srat-v2) SbsaQemu: AcpiDxe: Create SRAT table at runtime
86c5fc908bd4 Platform/SbsaQemu: add DeviceTree fallbacks to parse memory information
a2e8ffb1e046 Platform/SbsaQemu: get the information of memory via SMC calls
6007fcaae876 Platform/SbsaQemu: hang if there is no cpu information
dc9360e2e2c8 Platform/SbsaQemu: move FdtHandlerLib to SbsaQemuHardwareInfoLib
5a0a7fa00139 Platform/SbsaQemu: use PcdCoreCount directly
9bebc3a2a7b9 Platform/SbsaQemu: read amount of cpus during init
e7ec1d2d346b (tag: nodt-v5) Platform/SbsaQemu: add SbsaQemuHardwareInfoLib
And effect is nice.
QEMU args:
-smp 4,sockets=4,maxcpus=4
-m 4G,slots=2,maxmem=5G
-object memory-backend-ram,size=1G,id=m0
-object memory-backend-ram,size=3G,id=m1
-numa node,nodeid=0,cpus=0-1,memdev=m0
-numa node,nodeid=1,cpus=2,memdev=m1
-numa node,nodeid=2,cpus=3
EDK2 reports 4GB ram, Linux gets 4GB ram too.
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Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-01-31 13:15 [edk2-devel] [PATCH 0/1] Add support for generating SRAT tables Xiong Yining
2024-01-31 13:15 ` [edk2-devel] [PATCH 1/1] SbsaQemu: AcpiDxe: Create SRAT table at runtime Xiong Yining
2024-02-15 14:17 ` Marcin Juszkiewicz
2024-02-20 8:03 ` Xiong Yining
2024-02-21 13:22 ` Marcin Juszkiewicz
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