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Wed, 20 Dec 2023 11:31:51 -0800 From: "Jake Garver via groups.io" To: CC: , , , , , , Jake Garver Subject: [edk2-devel] [PATCH v2] BaseTools/GenFw: Correct offset when relocating an ADR Date: Wed, 20 Dec 2023 11:31:39 -0800 Message-ID: <1089e51f1e60222d591d92de518e664be7843123.1703099891.git.jake@nvidia.com> MIME-Version: 1.0 X-NVConfidentiality: public X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636C:EE_|DM6PR12MB4483:EE_ X-MS-Office365-Filtering-Correlation-Id: 713900f8-2549-4d7c-d4c9-08dc019258e9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: DM1QlFK3iNBRoKWhLSa37GbIGb1BE2uX1UqCKQoNwr0t0e72Q+GI/4g6UpVjorNiy3tkpquPPOYce1yJxpDgqDC06ilKfeyILfC40HdZn1mD6P9p8KEmHrodEBh1hmSNu4VQwsiAEpwOVhp30frwAAFbenCgQGngkrOf5+rK0jiDahrpsoa944iQSmbceTtmCw2ND0+/sA+eJwpQ03CyHXu66/hhjQN308qzcPJ/+JPrlgJBvcKhFoCDpXliavAHQJ1fKQSifPkRdw82QUTxjhF8WbQwBPf6WB4RrjKrS0XpN63c66fyEZeF6CCLJa9a9Le5N8DtemhIiZrDuWgGjUU+I9RBG6RWeQiOULBpXou+OhlACaE9/sNcdjxsmZ3r724LtyhjZZk0nVSBaNvfptttYR+Y/iEWo8sZXnCudLvQdDaklE0xeqwfRkPWBDxrCG7xAAVV/IOBBvOfUw9ajS2iLUu+mDQbuzQo80/2i42MZ3ng/KOH2lvIQf0BxFZGtBxW6V2BT9PzLVNajieHHIy8ls1/kifUDBPgPmLAWaya6woURwbi5P5xT+nLlLbv3JnvUCQHZTVtKgYJxPfcO2gOLB/TCoxj4E4kCheTWSuT6wRsjhg8d5C8u+UQnqm4OpVKb0/bsH5Nm4q9ky13tn3AjWCIe3oaXU5zc4+CMi8JtMMDVhK7VHa9D7ZmUiE82KrH7V5XXlZtyDgTIdn6Q+BabY2jTjzONaOzlSqCSVRXo0vOk5diypSwzB7OY1uG X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Dec 2023 19:32:04.7246 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 713900f8-2549-4d7c-d4c9-08dc019258e9 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.232];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636C.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4483 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,jake@nvidia.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: bs38U05QZPkGsCBo9oq48Y0gx7686176AA= Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=NZC5BmF5; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}") In the R_AARCH64_ADR_GOT_PAGE case on AARCH64, we may encounter an ADR instead of an ADRP when the toolchain is working around Cortex-A53 erratum #843419. If that's the case, be sure to calculate the offset appropriately. This resolves an issue experienced when building a StandaloneMm image with stack protection enabled on GCC compiled with "--enable-fix-cortex-a53-843419". This scenario sometimes generates an ADR with a R_AARCH64_ADR_GOT_PAGE relocation. In this scenario, the following code is being generated by the toolchain: # Load to set the stack canary 2ffc: 10028020 adr x0, 8000 3008: f940d400 ldr x0, [x0, #424] # Load to check the stack canary 30cc: b0000020 adrp x0, 8000 30d0: f940d400 ldr x0, [x0, #424] GenFw rewrote that to: # Load to set the stack canary 2ffc: 10000480 adr x0, 0x308c 3008: 912ec000 add x0, x0, #0xbb0 # Load to check the stack canary 30cc: f0000460 adrp x0, 0x92000 30d0: 912ec000 add x0, x0, #0xbb0 Note that we're now setting the stack canary from the wrong address, resulting in an erroneous stack fault. After this fix, the offset will be calculated correctly for an ADR and the stack canary is set correctly. Signed-off-by: Jake Garver --- Notes: v2: Implement approach proposed by Ard Biesheuvel. - title changed to: Correct offset when relocating an ADR v1: Original title: Change opcode when converting ADR to ADRP BaseTools/Source/C/GenFw/Elf64Convert.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/G= enFw/Elf64Convert.c index 9911db65af..9d04fc612e 100644 --- a/BaseTools/Source/C/GenFw/Elf64Convert.c +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c @@ -1562,7 +1562,27 @@ WriteSections64 ( // subsequent LDR instruction (covered by a R_AARCH64_LD64_GOT= _LO12_NC // relocation) into an ADD instruction - this is handled above= . // - Offset =3D (Sym->st_value - (Rel->r_offset & ~0xfff)) >> 12; + // In order to handle Cortex-A53 erratum #843419, the GCC tool= chain + // may convert an ADRP instruction at the end of a page (0xffc + // offset) into an ADR instruction. If so, be sure to calculat= e the + // offset for an ADR instead of ADRP. + // + if ((*(UINT32 *)Targ & BIT31) =3D=3D 0) { + // + // Calculate the offset for an ADR. + // + Offset =3D (Sym->st_value & ~0xfff) - Rel->r_offset; + if (Offset < -0x100000 || Offset > 0xfffff) { + Error (NULL, 0, 3000, "Invalid", "WriteSections64(): %s d= ue to its size (> 1 MB), unable to relocate ADR.", + mInImageName); + break; + } + } else { + // + // Calculate the offset for an ADRP. + // + Offset =3D (Sym->st_value - (Rel->r_offset & ~0xfff)) >> 12; + } =20 *(UINT32 *)Targ &=3D 0x9000001f; *(UINT32 *)Targ |=3D ((Offset & 0x1ffffc) << (5 - 2)) | ((Offs= et & 0x3) << 29); --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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