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* [PATCH edk2-platforms v2 0/4] BCM genet fixes
@ 2020-05-10 10:42 Ard Biesheuvel
  2020-05-10 10:42 ` [PATCH edk2-platforms v2 1/4] Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup Ard Biesheuvel
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: Ard Biesheuvel @ 2020-05-10 10:42 UTC (permalink / raw)
  To: devel
  Cc: Ard Biesheuvel, Pete Batard, Jared McNeill, Andrei Warkentin,
	Samer El-Haj-Mahmoud

This fixes the multicast/broadcast/promisc handling, and switches to
ordinary page allocations for RX buffers. Patch #1 is cosmetic only.

https://github.com/pftf/edk2-platforms/tree/rpi4_genet_v2_ardb

Cc: Pete Batard <pete@akeo.ie>
Cc: Jared McNeill <jmcneill@invisible.ca>
Cc: Andrei Warkentin <awarkentin@vmware.com>
Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>

NOTE: build tested only.

Ard Biesheuvel (4):
  Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup
  Silicon/Broadcom/BcmGenetDxe: add support for broadcast filtering
  Silicon/Broadcom/BcmGenetDxe: fix multicast/broadcast handling
  Silicon/Broadcom/BcmGenetDxe: avoid uncached memory for streaming DMA

 .../Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf   |   4 +
 .../Drivers/Net/BcmGenetDxe/GenetUtil.h       |   7 +
 .../Drivers/Net/BcmGenetDxe/DriverBinding.c   |   7 +-
 .../Drivers/Net/BcmGenetDxe/GenetUtil.c       | 706 +++++++++---------
 .../Drivers/Net/BcmGenetDxe/SimpleNetwork.c   |  20 +-
 5 files changed, 396 insertions(+), 348 deletions(-)

-- 
2.17.1


^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH edk2-platforms v2 1/4] Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup
  2020-05-10 10:42 [PATCH edk2-platforms v2 0/4] BCM genet fixes Ard Biesheuvel
@ 2020-05-10 10:42 ` Ard Biesheuvel
  2020-05-10 10:42 ` [PATCH edk2-platforms v2 2/4] Silicon/Broadcom/BcmGenetDxe: add support for broadcast filtering Ard Biesheuvel
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Ard Biesheuvel @ 2020-05-10 10:42 UTC (permalink / raw)
  To: devel
  Cc: Ard Biesheuvel, Pete Batard, Jared McNeill, Andrei Warkentin,
	Samer El-Haj-Mahmoud

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
---
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 672 ++++++++++----------
 1 file changed, 340 insertions(+), 332 deletions(-)

diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
index d471b1cadadc..af7c06656433 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
@@ -31,13 +31,13 @@
 STATIC
 UINT32
 GenetMmioRead (
-    IN GENET_PRIVATE_DATA *Genet,
-    IN UINT32             Offset
-    )
+  IN GENET_PRIVATE_DATA *Genet,
+  IN UINT32             Offset
+  )
 {
-    ASSERT((Offset & 3) == 0);
+  ASSERT ((Offset & 3) == 0);
 
-    return MmioRead32 (Genet->RegBase + Offset);
+  return MmioRead32 (Genet->RegBase + Offset);
 }
 
 /**
@@ -53,15 +53,15 @@ GenetMmioRead (
 STATIC
 VOID
 GenetMmioWrite (
-    IN GENET_PRIVATE_DATA *Genet,
-    IN UINT32             Offset,
-    IN UINT32             Data
-    )
+  IN GENET_PRIVATE_DATA *Genet,
+  IN UINT32             Offset,
+  IN UINT32             Data
+  )
 {
-    ASSERT((Offset & 3) == 0);
+  ASSERT ((Offset & 3) == 0);
 
-    ArmDataSynchronizationBarrier ();
-    MmioWrite32 (Genet->RegBase + Offset, Data);
+  ArmDataSynchronizationBarrier ();
+  MmioWrite32 (Genet->RegBase + Offset, Data);
 }
 
 /**
@@ -79,37 +79,38 @@ GenetMmioWrite (
 EFI_STATUS
 EFIAPI
 GenetPhyRead (
-    IN  VOID   *Priv,
-    IN  UINT8  PhyAddr,
-    IN  UINT8  Reg,
-    OUT UINT16 *Data
-    )
+  IN  VOID   *Priv,
+  IN  UINT8  PhyAddr,
+  IN  UINT8  Reg,
+  OUT UINT16 *Data
+  )
 {
-    GENET_PRIVATE_DATA *Genet = Priv;
-    UINTN Retry;
-    UINT32 Value;
+   GENET_PRIVATE_DATA   *Genet = Priv;
+   UINTN                Retry;
+   UINT32               Value;
 
-    Value = GENET_MDIO_READ |
-            GENET_MDIO_START_BUSY |
-            __SHIFTIN(PhyAddr, GENET_MDIO_PMD) |
-            __SHIFTIN(Reg, GENET_MDIO_REG);
-    GenetMmioWrite (Genet, GENET_MDIO_CMD, Value);
+  Value = GENET_MDIO_READ |
+          GENET_MDIO_START_BUSY |
+          __SHIFTIN(PhyAddr, GENET_MDIO_PMD) |
+          __SHIFTIN(Reg, GENET_MDIO_REG);
+  GenetMmioWrite (Genet, GENET_MDIO_CMD, Value);
 
-    for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) {
-        Value = GenetMmioRead (Genet, GENET_MDIO_CMD);
-        if ((Value & GENET_MDIO_START_BUSY) == 0) {
-            *Data = Value & 0xffff;
-            break;
-        }
-        gBS->Stall (10);
+  for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) {
+    Value = GenetMmioRead (Genet, GENET_MDIO_CMD);
+    if ((Value & GENET_MDIO_START_BUSY) == 0) {
+      *Data = Value & 0xffff;
+      break;
     }
+    gBS->Stall (10);
+  }
 
-    if (Retry == 0) {
-        DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout reading PhyAddr %d, Reg %d\n", PhyAddr, Reg));
-        return EFI_DEVICE_ERROR;
-    }
+  if (Retry == 0) {
+    DEBUG ((DEBUG_ERROR,
+      "GenetPhyRead: Timeout reading PhyAddr %d, Reg %d\n", PhyAddr, Reg));
+    return EFI_DEVICE_ERROR;
+  }
 
-    return EFI_SUCCESS;
+  return EFI_SUCCESS;
 }
 
 /**
@@ -127,36 +128,37 @@ GenetPhyRead (
 EFI_STATUS
 EFIAPI
 GenetPhyWrite (
-    IN VOID   *Priv,
-    IN UINT8  PhyAddr,
-    IN UINT8  Reg,
-    IN UINT16 Data
-    )
+  IN VOID   *Priv,
+  IN UINT8  PhyAddr,
+  IN UINT8  Reg,
+  IN UINT16 Data
+  )
 {
-    GENET_PRIVATE_DATA *Genet = Priv;
-    UINTN Retry;
-    UINT32 Value;
+  GENET_PRIVATE_DATA    *Genet = Priv;
+  UINTN                 Retry;
+  UINT32                Value;
 
-    Value = GENET_MDIO_WRITE |
-            GENET_MDIO_START_BUSY |
-            __SHIFTIN(PhyAddr, GENET_MDIO_PMD) |
-            __SHIFTIN(Reg, GENET_MDIO_REG);
-    GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data);
+  Value = GENET_MDIO_WRITE |
+          GENET_MDIO_START_BUSY |
+          __SHIFTIN(PhyAddr, GENET_MDIO_PMD) |
+          __SHIFTIN(Reg, GENET_MDIO_REG);
+  GenetMmioWrite (Genet, GENET_MDIO_CMD, Value | Data);
 
-    for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) {
-        Value = GenetMmioRead (Genet, GENET_MDIO_CMD);
-        if ((Value & GENET_MDIO_START_BUSY) == 0) {
-            break;
-        }
-        gBS->Stall (10);
+  for (Retry = GENET_PHY_RETRY; Retry > 0; Retry--) {
+    Value = GenetMmioRead (Genet, GENET_MDIO_CMD);
+    if ((Value & GENET_MDIO_START_BUSY) == 0) {
+      break;
     }
+    gBS->Stall (10);
+  }
 
-    if (Retry == 0) {
-        DEBUG ((DEBUG_ERROR, "GenetPhyRead: Timeout writing PhyAddr %d, Reg %d\n", PhyAddr, Reg));
-        return EFI_DEVICE_ERROR;
-    }
+  if (Retry == 0) {
+    DEBUG ((DEBUG_ERROR,
+      "GenetPhyRead: Timeout writing PhyAddr %d, Reg %d\n", PhyAddr, Reg));
+    return EFI_DEVICE_ERROR;
+  }
 
-    return EFI_SUCCESS;
+  return EFI_SUCCESS;
 }
 
 /**
@@ -170,13 +172,13 @@ GenetPhyWrite (
 VOID
 EFIAPI
 GenetPhyConfigure (
-    IN VOID               *Priv,
-    IN GENERIC_PHY_SPEED  Speed,
-    IN GENERIC_PHY_DUPLEX Duplex
-    )
+  IN VOID               *Priv,
+  IN GENERIC_PHY_SPEED  Speed,
+  IN GENERIC_PHY_DUPLEX Duplex
+  )
 {
-    GENET_PRIVATE_DATA *Genet = Priv;
-    UINT32 Value;
+  GENET_PRIVATE_DATA  *Genet = Priv;
+  UINT32              Value;
 
     Value = GenetMmioRead (Genet, GENET_EXT_RGMII_OOB_CTRL);
     Value &= ~GENET_EXT_RGMII_OOB_OOB_DISABLE;
@@ -293,38 +295,40 @@ GenetPhyResetAction (
 **/
 VOID
 GenetReset (
-    IN GENET_PRIVATE_DATA *Genet
-    )
+  IN GENET_PRIVATE_DATA *Genet
+  )
 {
-    UINT32 Value;
+  UINT32 Value;
 
-    Value = GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL);
-    Value |= GENET_SYS_RBUF_FLUSH_RESET;
-    GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value);
-    gBS->Stall (10);
+  Value = GenetMmioRead (Genet, GENET_SYS_RBUF_FLUSH_CTRL);
+  Value |= GENET_SYS_RBUF_FLUSH_RESET;
+  GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value);
+  gBS->Stall (10);
 
-    Value &= ~GENET_SYS_RBUF_FLUSH_RESET;
-    GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value);
-    gBS->Stall (10);
+  Value &= ~GENET_SYS_RBUF_FLUSH_RESET;
+  GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, Value);
+  gBS->Stall (10);
 
-    GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0);
-    gBS->Stall (10);
+  GenetMmioWrite (Genet, GENET_SYS_RBUF_FLUSH_CTRL, 0);
+  gBS->Stall (10);
 
-    GenetMmioWrite (Genet, GENET_UMAC_CMD, 0);
-    GenetMmioWrite (Genet, GENET_UMAC_CMD, GENET_UMAC_CMD_LCL_LOOP_EN | GENET_UMAC_CMD_SW_RESET);
-    gBS->Stall (10);
-    GenetMmioWrite (Genet, GENET_UMAC_CMD, 0);
+  GenetMmioWrite (Genet, GENET_UMAC_CMD, 0);
+  GenetMmioWrite (Genet, GENET_UMAC_CMD,
+    GENET_UMAC_CMD_LCL_LOOP_EN | GENET_UMAC_CMD_SW_RESET);
+  gBS->Stall (10);
+  GenetMmioWrite (Genet, GENET_UMAC_CMD, 0);
 
-    GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, GENET_UMAC_MIB_RESET_RUNT | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_RESET_TX);
-    GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0);
+  GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL,
+    GENET_UMAC_MIB_RESET_RUNT | GENET_UMAC_MIB_RESET_RX | GENET_UMAC_MIB_RESET_TX);
+  GenetMmioWrite (Genet, GENET_UMAC_MIB_CTRL, 0);
 
-    GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536);
+  GenetMmioWrite (Genet, GENET_UMAC_MAX_FRAME_LEN, 1536);
 
-    Value = GenetMmioRead (Genet, GENET_RBUF_CTRL);
-    Value |= GENET_RBUF_ALIGN_2B;
-    GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value);
+  Value = GenetMmioRead (Genet, GENET_RBUF_CTRL);
+  Value |= GENET_RBUF_ALIGN_2B;
+  GenetMmioWrite (Genet, GENET_RBUF_CTRL, Value);
 
-    GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1);
+  GenetMmioWrite (Genet, GENET_RBUF_TBUF_SIZE_CTRL, 1);
 }
 
 /**
@@ -337,20 +341,20 @@ GenetReset (
 VOID
 EFIAPI
 GenetSetMacAddress (
-    IN GENET_PRIVATE_DATA *Genet,
-    IN EFI_MAC_ADDRESS    *MacAddr
-    )
+  IN GENET_PRIVATE_DATA *Genet,
+  IN EFI_MAC_ADDRESS    *MacAddr
+  )
 {
-    UINT32 Value;
+  UINT32 Value;
 
-    Value = MacAddr->Addr[3] |
-            MacAddr->Addr[2] << 8 |
-            MacAddr->Addr[1] << 16 |
-            MacAddr->Addr[0] << 24;
-    GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value);
-    Value = MacAddr->Addr[5] |
-            MacAddr->Addr[4] << 8;
-    GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value);
+  Value = MacAddr->Addr[3] |
+          MacAddr->Addr[2] << 8 |
+          MacAddr->Addr[1] << 16 |
+          MacAddr->Addr[0] << 24;
+  GenetMmioWrite (Genet, GENET_UMAC_MAC0, Value);
+  Value = MacAddr->Addr[5] |
+          MacAddr->Addr[4] << 8;
+  GenetMmioWrite (Genet, GENET_UMAC_MAC1, Value);
 }
 
 /**
@@ -362,24 +366,24 @@ GenetSetMacAddress (
 **/
 VOID
 GenetSetPhyMode (
-    IN GENET_PRIVATE_DATA *Genet,
-    IN GENET_PHY_MODE     PhyMode
-    )
+  IN GENET_PRIVATE_DATA *Genet,
+  IN GENET_PHY_MODE     PhyMode
+  )
 {
-    UINT32 Value;
+  UINT32 Value;
 
-    switch (PhyMode) {
-        case GENET_PHY_MODE_RGMII:
-        case GENET_PHY_MODE_RGMII_RXID:
-        case GENET_PHY_MODE_RGMII_TXID:
-        case GENET_PHY_MODE_RGMII_ID:
-            Value = GENET_SYS_PORT_MODE_EXT_GPHY;
-            break;
-        default:
-            Value = 0;
-            break;
-    }
-    GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value);
+  switch (PhyMode) {
+    case GENET_PHY_MODE_RGMII:
+    case GENET_PHY_MODE_RGMII_RXID:
+    case GENET_PHY_MODE_RGMII_TXID:
+    case GENET_PHY_MODE_RGMII_ID:
+      Value = GENET_SYS_PORT_MODE_EXT_GPHY;
+      break;
+    default:
+      Value = 0;
+      break;
+  }
+  GenetMmioWrite (Genet, GENET_SYS_PORT_CTRL, Value);
 }
 
 /**
@@ -390,31 +394,32 @@ GenetSetPhyMode (
 **/
 VOID
 GenetEnableTxRx (
-    IN GENET_PRIVATE_DATA *Genet
-    )
+  IN GENET_PRIVATE_DATA *Genet
+  )
 {
-    UINT32 Value;
-    UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
+  UINT32 Value;
+  UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
 
-    // Start TX DMA on default queue
-    Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL);
-    Value |= GENET_TX_DMA_CTRL_EN;
-    Value |= GENET_TX_DMA_CTRL_RBUF_EN(Qid);
-    GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value);
+  // Start TX DMA on default queue
+  Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL);
+  Value |= GENET_TX_DMA_CTRL_EN;
+  Value |= GENET_TX_DMA_CTRL_RBUF_EN (Qid);
+  GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value);
 
-    // Start RX DMA on default queue
-    Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL);
-    Value |= GENET_RX_DMA_CTRL_EN;
-    Value |= GENET_RX_DMA_CTRL_RBUF_EN(Qid);
-    GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value);
+  // Start RX DMA on default queue
+  Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL);
+  Value |= GENET_RX_DMA_CTRL_EN;
+  Value |= GENET_RX_DMA_CTRL_RBUF_EN (Qid);
+  GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value);
 
-    // Enable transmitter and receiver
-    Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
-    Value |= GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN;
-    GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
+  // Enable transmitter and receiver
+  Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
+  Value |= GENET_UMAC_CMD_TXEN | GENET_UMAC_CMD_RXEN;
+  GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
 
-    // Enable interrupts
-    GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK, GENET_IRQ_TXDMA_DONE | GENET_IRQ_RXDMA_DONE);
+  // Enable interrupts
+  GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR_MASK,
+    GENET_IRQ_TXDMA_DONE | GENET_IRQ_RXDMA_DONE);
 }
 
 /**
@@ -425,42 +430,42 @@ GenetEnableTxRx (
 **/
 VOID
 GenetDisableTxRx (
-    IN GENET_PRIVATE_DATA *Genet
-    )
+  IN GENET_PRIVATE_DATA *Genet
+  )
 {
-    UINT32 Value;
-    UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
+  UINT32 Value;
+  UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
 
-    // Disable interrupts
-    GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF);
-    GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF);
+  // Disable interrupts
+  GenetMmioWrite (Genet, GENET_INTRL2_CPU_SET_MASK, 0xFFFFFFFF);
+  GenetMmioWrite (Genet, GENET_INTRL2_CPU_CLEAR, 0xFFFFFFFF);
 
-    // Disable receiver
-    Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
-    Value &= ~GENET_UMAC_CMD_RXEN;
-    GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
+  // Disable receiver
+  Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
+  Value &= ~GENET_UMAC_CMD_RXEN;
+  GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
 
-    // Stop RX DMA
-    Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL);
-    Value &= ~GENET_RX_DMA_CTRL_EN;
-    Value &= ~GENET_RX_DMA_CTRL_RBUF_EN(Qid);
-    GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value);
+  // Stop RX DMA
+  Value = GenetMmioRead (Genet, GENET_RX_DMA_CTRL);
+  Value &= ~GENET_RX_DMA_CTRL_EN;
+  Value &= ~GENET_RX_DMA_CTRL_RBUF_EN (Qid);
+  GenetMmioWrite (Genet, GENET_RX_DMA_CTRL, Value);
 
-    // Stop TX DMA
-    Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL);
-    Value &= ~GENET_TX_DMA_CTRL_EN;
-    Value &= ~GENET_TX_DMA_CTRL_RBUF_EN(Qid);
-    GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value);
+  // Stop TX DMA
+  Value = GenetMmioRead (Genet, GENET_TX_DMA_CTRL);
+  Value &= ~GENET_TX_DMA_CTRL_EN;
+  Value &= ~GENET_TX_DMA_CTRL_RBUF_EN (Qid);
+  GenetMmioWrite (Genet, GENET_TX_DMA_CTRL, Value);
 
-    // Flush data in the TX FIFO
-    GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1);
-    gBS->Stall (10);
-    GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0);
+  // Flush data in the TX FIFO
+  GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 1);
+  gBS->Stall (10);
+  GenetMmioWrite (Genet, GENET_UMAC_TX_FLUSH, 0);
 
-    // Disable transmitter
-    Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
-    Value &= ~GENET_UMAC_CMD_TXEN;
-    GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
+  // Disable transmitter
+  Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
+  Value &= ~GENET_UMAC_CMD_TXEN;
+  GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
 }
 
 /**
@@ -472,19 +477,19 @@ GenetDisableTxRx (
 **/
 VOID
 GenetSetPromisc (
-    IN GENET_PRIVATE_DATA *Genet,
-    IN BOOLEAN            Enable
-    )
+  IN GENET_PRIVATE_DATA *Genet,
+  IN BOOLEAN            Enable
+  )
 {
-    UINT32 Value;
+  UINT32 Value;
 
-    Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
-    if (Enable) {
-        Value |= GENET_UMAC_CMD_PROMISC;
-    } else {
-        Value &= ~GENET_UMAC_CMD_PROMISC;
-    }
-    GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
+  Value = GenetMmioRead (Genet, GENET_UMAC_CMD);
+  if (Enable) {
+    Value |= GENET_UMAC_CMD_PROMISC;
+  } else {
+    Value &= ~GENET_UMAC_CMD_PROMISC;
+  }
+  GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
 }
 
 /**
@@ -495,63 +500,63 @@ GenetSetPromisc (
 **/
 VOID
 GenetDmaInitRings (
-    IN GENET_PRIVATE_DATA *Genet
-    )
+  IN GENET_PRIVATE_DATA *Genet
+  )
 {
-    UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
+  UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
 
-    Genet->TxQueued = 0;
-    Genet->TxNext = 0;
-    Genet->TxConsIndex = 0;
-    Genet->TxProdIndex = 0;
+  Genet->TxQueued = 0;
+  Genet->TxNext = 0;
+  Genet->TxConsIndex = 0;
+  Genet->TxProdIndex = 0;
 
-    Genet->RxConsIndex = 0;
-    Genet->RxProdIndex = 0;
+  Genet->RxConsIndex = 0;
+  Genet->RxProdIndex = 0;
 
-    // Configure TX queue
-    GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08);
-    GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO(Qid), 0);
-    GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI(Qid), 0);
-    GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX(Qid), 0);
-    GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX(Qid), 0);
-    GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE(Qid),
-                    __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT) |
-                    __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH));
-    GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO(Qid), 0);
-    GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI(Qid), 0);
-    GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO(Qid),
-                    GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1);
-    GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI(Qid), 0);
-    GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES(Qid), 1);
-    GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD(Qid), 0);
-    GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO(Qid), 0);
-    GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI(Qid), 0);
+  // Configure TX queue
+  GenetMmioWrite (Genet, GENET_TX_SCB_BURST_SIZE, 0x08);
+  GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_LO (Qid), 0);
+  GenetMmioWrite (Genet, GENET_TX_DMA_READ_PTR_HI (Qid), 0);
+  GenetMmioWrite (Genet, GENET_TX_DMA_CONS_INDEX (Qid), 0);
+  GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), 0);
+  GenetMmioWrite (Genet, GENET_TX_DMA_RING_BUF_SIZE (Qid),
+    __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_TX_DMA_RING_BUF_SIZE_DESC_COUNT) |
+    __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_TX_DMA_RING_BUF_SIZE_BUF_LENGTH));
+  GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_LO (Qid), 0);
+  GenetMmioWrite (Genet, GENET_TX_DMA_START_ADDR_HI (Qid), 0);
+  GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_LO (Qid),
+    GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1);
+  GenetMmioWrite (Genet, GENET_TX_DMA_END_ADDR_HI (Qid), 0);
+  GenetMmioWrite (Genet, GENET_TX_DMA_MBUF_DONE_THRES (Qid), 1);
+  GenetMmioWrite (Genet, GENET_TX_DMA_FLOW_PERIOD (Qid), 0);
+  GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_LO (Qid), 0);
+  GenetMmioWrite (Genet, GENET_TX_DMA_WRITE_PTR_HI (Qid), 0);
 
-    // Enable TX queue
-    GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid));
+  // Enable TX queue
+  GenetMmioWrite (Genet, GENET_TX_DMA_RING_CFG, (1U << Qid));
 
-    // Configure RX queue
-    GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08);
-    GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO(Qid), 0);
-    GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI(Qid), 0);
-    GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX(Qid), 0);
-    GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX(Qid), 0);
-    GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE(Qid),
-                    __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT) |
-                    __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH));
-    GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO(Qid), 0);
-    GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI(Qid), 0);
-    GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO(Qid),
-                    GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1);
-    GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI(Qid), 0);
-    GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES(Qid),
-                    __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) |
-                    __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_XOFF_THRES_HI));
-    GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO(Qid), 0);
-    GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI(Qid), 0);
+  // Configure RX queue
+  GenetMmioWrite (Genet, GENET_RX_SCB_BURST_SIZE, 0x08);
+  GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_LO (Qid), 0);
+  GenetMmioWrite (Genet, GENET_RX_DMA_WRITE_PTR_HI (Qid), 0);
+  GenetMmioWrite (Genet, GENET_RX_DMA_PROD_INDEX (Qid), 0);
+  GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), 0);
+  GenetMmioWrite (Genet, GENET_RX_DMA_RING_BUF_SIZE (Qid),
+    __SHIFTIN(GENET_DMA_DESC_COUNT, GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT) |
+    __SHIFTIN(GENET_MAX_PACKET_SIZE, GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH));
+  GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_LO (Qid), 0);
+  GenetMmioWrite (Genet, GENET_RX_DMA_START_ADDR_HI (Qid), 0);
+  GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_LO (Qid),
+    GENET_DMA_DESC_COUNT * GENET_DMA_DESC_SIZE / 4 - 1);
+  GenetMmioWrite (Genet, GENET_RX_DMA_END_ADDR_HI (Qid), 0);
+  GenetMmioWrite (Genet, GENET_RX_DMA_XON_XOFF_THRES (Qid),
+    __SHIFTIN(5, GENET_RX_DMA_XON_XOFF_THRES_LO) |
+    __SHIFTIN(GENET_DMA_DESC_COUNT >> 4, GENET_RX_DMA_XON_XOFF_THRES_HI));
+  GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_LO (Qid), 0);
+  GenetMmioWrite (Genet, GENET_RX_DMA_READ_PTR_HI (Qid), 0);
 
-    // Enable RX queue
-    GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid));
+  // Enable RX queue
+  GenetMmioWrite (Genet, GENET_RX_DMA_RING_CFG, (1U << Qid));
 }
 
 /**
@@ -564,22 +569,22 @@ GenetDmaInitRings (
 **/
 EFI_STATUS
 GenetDmaAlloc (
-    IN GENET_PRIVATE_DATA *Genet
-    )
+  IN GENET_PRIVATE_DATA *Genet
+  )
 {
-    EFI_STATUS Status;
-    UINTN n;
+  EFI_STATUS  Status;
+  UINTN       Idx;
 
-    for (n = 0; n < GENET_DMA_DESC_COUNT; n++) {
-        Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[n]);
-        if (EFI_ERROR (Status)) {
-            DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %r\n", Status));
-            GenetDmaFree (Genet);
-            return Status;
-        }
+  for (Idx = 0; Idx < GENET_DMA_DESC_COUNT; Idx++) {
+    Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[Idx]);
+    if (EFI_ERROR (Status)) {
+      DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %r\n", Status));
+      GenetDmaFree (Genet);
+      return Status;
     }
+  }
 
-    return EFI_SUCCESS;
+  return EFI_SUCCESS;
 }
 
 /**
@@ -594,33 +599,34 @@ GenetDmaAlloc (
 **/
 EFI_STATUS
 GenetDmaMapRxDescriptor (
-    IN GENET_PRIVATE_DATA * Genet,
-    IN UINT8                DescIndex
-    )
+  IN GENET_PRIVATE_DATA * Genet,
+  IN UINT8                DescIndex
+  )
 {
-    EFI_STATUS Status;
-    UINTN DmaNumberOfBytes;
+  EFI_STATUS    Status;
+  UINTN         DmaNumberOfBytes;
 
-    ASSERT (Genet->RxBufferMap[DescIndex].Mapping == NULL);
-    ASSERT (Genet->RxBuffer[DescIndex] != NULL);
+  ASSERT (Genet->RxBufferMap[DescIndex].Mapping == NULL);
+  ASSERT (Genet->RxBuffer[DescIndex] != NULL);
 
-    DmaNumberOfBytes = GENET_MAX_PACKET_SIZE;
-    Status = DmaMap (MapOperationBusMasterWrite,
-                (VOID *)Genet->RxBuffer[DescIndex],
-                &DmaNumberOfBytes,
-                &Genet->RxBufferMap[DescIndex].Pa,
-                &Genet->RxBufferMap[DescIndex].Mapping);
-    if (EFI_ERROR (Status)) {
-        DEBUG ((DEBUG_ERROR, "GenetDmaMapRxDescriptor: Failed to map RX buffer: %r\n", Status));
-        return Status;
-    }
+  DmaNumberOfBytes = GENET_MAX_PACKET_SIZE;
+  Status = DmaMap (MapOperationBusMasterWrite,
+             (VOID *)Genet->RxBuffer[DescIndex],
+             &DmaNumberOfBytes,
+             &Genet->RxBufferMap[DescIndex].Pa,
+             &Genet->RxBufferMap[DescIndex].Mapping);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((DEBUG_ERROR,
+      "GenetDmaMapRxDescriptor: Failed to map RX buffer: %r\n", Status));
+    return Status;
+  }
 
-    //DEBUG ((DEBUG_INFO, "GenetDmaMapRxDescriptor: Desc 0x%X mapped to 0x%X\n", DescIndex, Genet->RxBufferMap[DescIndex].Pa));
+  GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex),
+    Genet->RxBufferMap[DescIndex].Pa & 0xFFFFFFFF);
+  GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex),
+    (Genet->RxBufferMap[DescIndex].Pa >> 32) & 0xFFFFFFFF);
 
-    GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_LO (DescIndex), Genet->RxBufferMap[DescIndex].Pa & 0xFFFFFFFF);
-    GenetMmioWrite (Genet, GENET_RX_DESC_ADDRESS_HI (DescIndex), (Genet->RxBufferMap[DescIndex].Pa >> 32) & 0xFFFFFFFF);
-
-    return EFI_SUCCESS;
+  return EFI_SUCCESS;
 }
 
 /**
@@ -632,14 +638,14 @@ GenetDmaMapRxDescriptor (
 **/
 VOID
 GenetDmaUnmapRxDescriptor (
-    IN GENET_PRIVATE_DATA * Genet,
-    IN UINT8                DescIndex
-    )
+  IN GENET_PRIVATE_DATA * Genet,
+  IN UINT8                DescIndex
+  )
 {
-    if (Genet->RxBufferMap[DescIndex].Mapping != NULL) {
-        DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping);
-        Genet->RxBufferMap[DescIndex].Mapping = NULL;
-    }
+  if (Genet->RxBufferMap[DescIndex].Mapping != NULL) {
+    DmaUnmap (Genet->RxBufferMap[DescIndex].Mapping);
+    Genet->RxBufferMap[DescIndex].Mapping = NULL;
+  }
 }
 
 /**
@@ -651,19 +657,20 @@ GenetDmaUnmapRxDescriptor (
 **/
 VOID
 GenetDmaFree (
-    IN GENET_PRIVATE_DATA *Genet
-    )
+  IN GENET_PRIVATE_DATA *Genet
+  )
 {
-    UINTN n;
+  UINTN Idx;
 
-    for (n = 0; n < GENET_DMA_DESC_COUNT; n++) {
-        GenetDmaUnmapRxDescriptor (Genet, n);
+  for (Idx = 0; Idx < GENET_DMA_DESC_COUNT; Idx++) {
+    GenetDmaUnmapRxDescriptor (Genet, Idx);
 
-        if (Genet->RxBuffer[n] != NULL) {
-            DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), Genet->RxBuffer[n]);
-            Genet->RxBuffer[n] = NULL;
-        }
+    if (Genet->RxBuffer[Idx] != NULL) {
+      DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE),
+        Genet->RxBuffer[Idx]);
+      Genet->RxBuffer[Idx] = NULL;
     }
+  }
 }
 
 /**
@@ -677,26 +684,29 @@ GenetDmaFree (
 **/
 VOID
 GenetDmaTriggerTx (
-    IN GENET_PRIVATE_DATA * Genet,
-    IN UINT8                DescIndex,
-    IN EFI_PHYSICAL_ADDRESS PhysAddr,
-    IN UINTN                NumberOfBytes
-    )
+  IN GENET_PRIVATE_DATA * Genet,
+  IN UINT8                DescIndex,
+  IN EFI_PHYSICAL_ADDRESS PhysAddr,
+  IN UINTN                NumberOfBytes
+  )
 {
-    UINT32 DescStatus;
-    UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
+  UINT32    DescStatus;
+  UINT8     Qid = GENET_DMA_DEFAULT_QUEUE;
 
-    DescStatus = GENET_TX_DESC_STATUS_SOP |
-                 GENET_TX_DESC_STATUS_EOP |
-                 GENET_TX_DESC_STATUS_CRC |
-                 GENET_TX_DESC_STATUS_QTAG |
-                 __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN);
+  DescStatus = GENET_TX_DESC_STATUS_SOP |
+               GENET_TX_DESC_STATUS_EOP |
+               GENET_TX_DESC_STATUS_CRC |
+               GENET_TX_DESC_STATUS_QTAG |
+               __SHIFTIN(NumberOfBytes, GENET_TX_DESC_STATUS_BUFLEN);
 
-    GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO(DescIndex), PhysAddr & 0xFFFFFFFF);
-    GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI(DescIndex), (PhysAddr >> 32) & 0xFFFFFFFF);
-    GenetMmioWrite (Genet, GENET_TX_DESC_STATUS(DescIndex), DescStatus);
+  GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_LO(DescIndex),
+    PhysAddr & 0xFFFFFFFF);
+  GenetMmioWrite (Genet, GENET_TX_DESC_ADDRESS_HI(DescIndex),
+    (PhysAddr >> 32) & 0xFFFFFFFF);
+  GenetMmioWrite (Genet, GENET_TX_DESC_STATUS(DescIndex), DescStatus);
 
-    GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid), (DescIndex + 1) & 0xFFFF);
+  GenetMmioWrite (Genet, GENET_TX_DMA_PROD_INDEX (Qid),
+    (DescIndex + 1) & 0xFFFF);
 }
 
 /**
@@ -708,24 +718,24 @@ GenetDmaTriggerTx (
 **/
 VOID
 GenetTxIntr (
-    IN  GENET_PRIVATE_DATA *Genet,
-    OUT VOID               **TxBuf
-    )
+  IN  GENET_PRIVATE_DATA *Genet,
+  OUT VOID               **TxBuf
+  )
 {
-    UINT32 ConsIndex, Total;
-    UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
+  UINT32 ConsIndex, Total;
+  UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
 
-    ConsIndex = GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0xFFFF;
+  ConsIndex = GenetMmioRead (Genet, GENET_TX_DMA_CONS_INDEX (Qid)) & 0xFFFF;
 
-    Total = (ConsIndex - Genet->TxConsIndex) & 0xFFFF;
-    if (Genet->TxQueued > 0 && Total > 0) {
-        *TxBuf = Genet->TxBuffer[Genet->TxNext];
-        Genet->TxQueued--;
-        Genet->TxNext = (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT;
-        Genet->TxConsIndex++;
-    } else {
-        *TxBuf = NULL;
-    }
+  Total = (ConsIndex - Genet->TxConsIndex) & 0xFFFF;
+  if (Genet->TxQueued > 0 && Total > 0) {
+    *TxBuf = Genet->TxBuffer[Genet->TxNext];
+    Genet->TxQueued--;
+    Genet->TxNext = (Genet->TxNext + 1) % GENET_DMA_DESC_COUNT;
+    Genet->TxConsIndex++;
+  } else {
+    *TxBuf = NULL;
+  }
 }
 
 /**
@@ -742,32 +752,30 @@ GenetTxIntr (
 **/
 EFI_STATUS
 GenetRxIntr (
-    IN  GENET_PRIVATE_DATA *Genet,
-    OUT UINT8              *DescIndex,
-    OUT UINTN              *FrameLength
-    )
+  IN  GENET_PRIVATE_DATA *Genet,
+  OUT UINT8              *DescIndex,
+  OUT UINTN              *FrameLength
+  )
 {
-    EFI_STATUS Status;
-    UINT32 ProdIndex, Total;
-    UINT32 DescStatus;
-    UINT8 Qid = GENET_DMA_DEFAULT_QUEUE;
+  EFI_STATUS    Status;
+  UINT32        ProdIndex, Total;
+  UINT32        DescStatus;
+  UINT8         Qid = GENET_DMA_DEFAULT_QUEUE;
 
-    ProdIndex = GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0xFFFF;
+  ProdIndex = GenetMmioRead (Genet, GENET_RX_DMA_PROD_INDEX (Qid)) & 0xFFFF;
 
-    Total = (ProdIndex - Genet->RxConsIndex) & 0xFFFF;
-    if (Total > 0) {
-        *DescIndex = Genet->RxConsIndex % GENET_DMA_DESC_COUNT;
-        DescStatus = GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIndex));
-        *FrameLength = __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFLEN);
+  Total = (ProdIndex - Genet->RxConsIndex) & 0xFFFF;
+  if (Total > 0) {
+    *DescIndex = Genet->RxConsIndex % GENET_DMA_DESC_COUNT;
+    DescStatus = GenetMmioRead (Genet, GENET_RX_DESC_STATUS (*DescIndex));
+    *FrameLength = __SHIFTOUT (DescStatus, GENET_RX_DESC_STATUS_BUFLEN);
 
-        //DEBUG ((DEBUG_INFO, "GenetRxIntr: DescIndex=0x%X FrameLength=0x%X\n", *DescIndex, *FrameLength));
+    Genet->RxConsIndex = (Genet->RxConsIndex + 1) & 0xFFFF;
+    GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxConsIndex);
+    Status = EFI_SUCCESS;
+  } else {
+    Status = EFI_NOT_READY;
+  }
 
-        Genet->RxConsIndex = (Genet->RxConsIndex + 1) & 0xFFFF;
-        GenetMmioWrite (Genet, GENET_RX_DMA_CONS_INDEX (Qid), Genet->RxConsIndex);
-        Status = EFI_SUCCESS;
-    } else {
-        Status = EFI_NOT_READY;
-    }
-
-    return Status;
+  return Status;
 }
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH edk2-platforms v2 2/4] Silicon/Broadcom/BcmGenetDxe: add support for broadcast filtering
  2020-05-10 10:42 [PATCH edk2-platforms v2 0/4] BCM genet fixes Ard Biesheuvel
  2020-05-10 10:42 ` [PATCH edk2-platforms v2 1/4] Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup Ard Biesheuvel
@ 2020-05-10 10:42 ` Ard Biesheuvel
  2020-05-10 10:42 ` [PATCH edk2-platforms v2 3/4] Silicon/Broadcom/BcmGenetDxe: fix multicast/broadcast handling Ard Biesheuvel
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: Ard Biesheuvel @ 2020-05-10 10:42 UTC (permalink / raw)
  To: devel
  Cc: Ard Biesheuvel, Pete Batard, Jared McNeill, Andrei Warkentin,
	Samer El-Haj-Mahmoud

Add a helper to configure the first MDF filter for filtering the
broadcast Ethernet address.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
---
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h |  7 ++++++
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c | 24 ++++++++++++++++++++
 2 files changed, 31 insertions(+)

diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h
index 2e7b78322bcd..1dc7a51a1ca6 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.h
@@ -107,6 +107,7 @@
 #define GENET_UMAC_MDF_CTRL                     0xe50
 #define GENET_UMAC_MDF_ADDR0(n)                 (0xe54 + (n) * 0x8)
 #define GENET_UMAC_MDF_ADDR1(n)                 (0xe58 + (n) * 0x8)
+#define GENET_MAX_MDF_FILTER                    17
 
 #define GENET_DMA_DESC_COUNT                    256
 #define GENET_DMA_DESC_SIZE                     12
@@ -300,6 +301,12 @@ GenetSetPromisc (
   IN BOOLEAN            Enable
   );
 
+VOID
+GenetEnableBroadcastFilter (
+  IN GENET_PRIVATE_DATA   *Genet,
+  IN BOOLEAN              Enable
+  );
+
 VOID
 GenetDmaInitRings (
   IN GENET_PRIVATE_DATA *Genet
diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
index af7c06656433..2176bb451e7d 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
@@ -492,6 +492,30 @@ GenetSetPromisc (
   GenetMmioWrite (Genet, GENET_UMAC_CMD, Value);
 }
 
+/**
+  Enable the MAC filter for the Ethernet broadcast address
+
+  @param  Genet[in]   Pointer to GENET_PRIVATE_DATA.
+  @param  Enable[in]  Promiscuous mode state.
+
+**/
+VOID
+GenetEnableBroadcastFilter (
+  IN GENET_PRIVATE_DATA   *Genet,
+  IN BOOLEAN              Enable
+  )
+{
+  UINT32 Value;
+
+  Value = (1U << GENET_MAX_MDF_FILTER) - 1;
+  if (Enable) {
+    GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR0 (0), 0xffff);
+    GenetMmioWrite (Genet, GENET_UMAC_MDF_ADDR1 (0), 0xffffffff);
+    Value &= ~BIT0;
+  }
+  GenetMmioWrite (Genet, GENET_UMAC_MDF_CTRL, Value);
+}
+
 /**
   Configure DMA TX and RX queues, enabling them.
 
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH edk2-platforms v2 3/4] Silicon/Broadcom/BcmGenetDxe: fix multicast/broadcast handling
  2020-05-10 10:42 [PATCH edk2-platforms v2 0/4] BCM genet fixes Ard Biesheuvel
  2020-05-10 10:42 ` [PATCH edk2-platforms v2 1/4] Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup Ard Biesheuvel
  2020-05-10 10:42 ` [PATCH edk2-platforms v2 2/4] Silicon/Broadcom/BcmGenetDxe: add support for broadcast filtering Ard Biesheuvel
@ 2020-05-10 10:42 ` Ard Biesheuvel
  2020-05-10 10:42 ` [PATCH edk2-platforms v2 4/4] Silicon/Broadcom/BcmGenetDxe: avoid uncached memory for streaming DMA Ard Biesheuvel
  2020-05-10 21:36 ` [PATCH edk2-platforms v2 0/4] BCM genet fixes Ard Biesheuvel
  4 siblings, 0 replies; 6+ messages in thread
From: Ard Biesheuvel @ 2020-05-10 10:42 UTC (permalink / raw)
  To: devel
  Cc: Ard Biesheuvel, Pete Batard, Jared McNeill, Andrei Warkentin,
	Samer El-Haj-Mahmoud

Move the handling of the promiscuous receive control to the SNP
ReceiveFilters() method where it belongs. Given that we do not
support multicast filtering, only minimal handling is required to
test the promiscuous bit and program the MAC accordingly. Any
multicast handling will be done by the MNP layer above it.

For reception of broadcast frames, wire up the new helper that
programs the MDF filter bank accordingly.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
---
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c |  7 +++----
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c | 20 +++++++++-----------
 2 files changed, 12 insertions(+), 15 deletions(-)

diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c
index e3d015dd0820..a6102421cc26 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/DriverBinding.c
@@ -154,11 +154,10 @@ GenetDriverBindingStart (
   Genet->SnpMode.NvRamSize              = 0;
   Genet->SnpMode.NvRamAccessSize        = 0;
   Genet->SnpMode.ReceiveFilterMask      = EFI_SIMPLE_NETWORK_RECEIVE_UNICAST |
-                                          EFI_SIMPLE_NETWORK_RECEIVE_MULTICAST |
                                           EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST |
-                                          EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS |
-                                          EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS_MULTICAST;
-  Genet->SnpMode.ReceiveFilterSetting   = Genet->SnpMode.ReceiveFilterMask;
+                                          EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS;
+  Genet->SnpMode.ReceiveFilterSetting   = EFI_SIMPLE_NETWORK_RECEIVE_UNICAST |
+                                          EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST;
   Genet->SnpMode.MaxMCastFilterCount    = 0;
   Genet->SnpMode.MCastFilterCount       = 0;
   Genet->SnpMode.IfType                 = NET_IFTYPE_ETHERNET;
diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c
index bf28448445d1..e6de4653cde9 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/SimpleNetwork.c
@@ -148,10 +148,6 @@ GenetSimpleNetworkInitialize (
   }
 
   GenetSetMacAddress (Genet, &Genet->SnpMode.CurrentAddress);
-  /*
-   * TODO: this belongs in GenetSimpleNetworkReceiveFilters, not here.
-   */
-  GenetSetPromisc (Genet, TRUE);
 
   GenetDmaInitRings (Genet);
 
@@ -306,6 +302,10 @@ GenetSimpleNetworkReceiveFilters (
   }
 
   Genet = GENET_PRIVATE_DATA_FROM_SNP_THIS (This);
+  if (((Enable | Disable) & ~Genet->SnpMode.ReceiveFilterMask) != 0 ||
+      (!ResetMCastFilter && MCastFilterCnt > Genet->SnpMode.MaxMCastFilterCount)) {
+    return EFI_INVALID_PARAMETER;
+  }
   if (Genet->SnpMode.State == EfiSimpleNetworkStopped) {
     return EFI_NOT_STARTED;
   }
@@ -313,13 +313,11 @@ GenetSimpleNetworkReceiveFilters (
     return EFI_DEVICE_ERROR;
   }
 
-  //
-  // Can't actually return EFI_UNSUPPORTED, so just ignore the filters
-  // (we set promiscuous mode ON inside GenetSimpleNetworkInitialize).
-  //
-  // TODO: move promisc handling here.
-  // TODO 2: support multicast/broadcast.
-  //
+  GenetEnableBroadcastFilter (Genet,
+    (Enable & ~Disable & EFI_SIMPLE_NETWORK_RECEIVE_BROADCAST) != 0);
+
+  GenetSetPromisc (Genet,
+    (Enable & ~Disable & EFI_SIMPLE_NETWORK_RECEIVE_PROMISCUOUS) != 0);
 
   return EFI_SUCCESS;
 }
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH edk2-platforms v2 4/4] Silicon/Broadcom/BcmGenetDxe: avoid uncached memory for streaming DMA
  2020-05-10 10:42 [PATCH edk2-platforms v2 0/4] BCM genet fixes Ard Biesheuvel
                   ` (2 preceding siblings ...)
  2020-05-10 10:42 ` [PATCH edk2-platforms v2 3/4] Silicon/Broadcom/BcmGenetDxe: fix multicast/broadcast handling Ard Biesheuvel
@ 2020-05-10 10:42 ` Ard Biesheuvel
  2020-05-10 21:36 ` [PATCH edk2-platforms v2 0/4] BCM genet fixes Ard Biesheuvel
  4 siblings, 0 replies; 6+ messages in thread
From: Ard Biesheuvel @ 2020-05-10 10:42 UTC (permalink / raw)
  To: devel
  Cc: Ard Biesheuvel, Pete Batard, Jared McNeill, Andrei Warkentin,
	Samer El-Haj-Mahmoud

The non-coherent version of DmaAllocateBuffer () returns uncached
memory, to ensure that the CPU and the device see the same data,
even we they are accessing the buffer at the same time.

This is not really necessary for our RX ring: the CPU never accesses
the buffer while it is mapped for writing by the device, and so we
can simply use the streaming DMA model, which uses ordinary cached
buffers, but issues a cache invalidate at DMA unmap time.

Signed-off-by: Ard Biesheuvel <ard.biesheuvel@arm.com>
---
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf |  4 ++++
 Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c     | 18 +++++++++++++-----
 2 files changed, 17 insertions(+), 5 deletions(-)

diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf
index e74fa02ad209..3cabc5936562 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/BcmGenetDxe.inf
@@ -49,3 +49,7 @@ [Protocols]
   gBcmGenetPlatformDeviceProtocolGuid         ## TO_START
   gEfiDevicePathProtocolGuid                  ## BY_START
   gEfiSimpleNetworkProtocolGuid               ## BY_START
+
+[FixedPcd]
+  gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset
+  gEmbeddedTokenSpaceGuid.PcdDmaDeviceLimit
diff --git a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
index 2176bb451e7d..4d40a7afd199 100644
--- a/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
+++ b/Silicon/Broadcom/Drivers/Net/BcmGenetDxe/GenetUtil.c
@@ -19,6 +19,10 @@
 
 #define GENET_PHY_RETRY     1000
 
+STATIC CONST
+EFI_PHYSICAL_ADDRESS   mDmaAddressLimit = FixedPcdGet64 (PcdDmaDeviceLimit) -
+                                          FixedPcdGet64 (PcdDmaDeviceOffset);
+
 /**
   Read a memory-mapped device CSR.
 
@@ -596,16 +600,20 @@ GenetDmaAlloc (
   IN GENET_PRIVATE_DATA *Genet
   )
 {
-  EFI_STATUS  Status;
-  UINTN       Idx;
+  EFI_PHYSICAL_ADDRESS    Address;
+  EFI_STATUS              Status;
+  UINTN                   Idx;
 
   for (Idx = 0; Idx < GENET_DMA_DESC_COUNT; Idx++) {
-    Status = DmaAllocateBuffer (EfiBootServicesData, EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), (VOID **)&Genet->RxBuffer[Idx]);
+    Address = mDmaAddressLimit;
+    Status = gBS->AllocatePages (AllocateMaxAddress, EfiBootServicesData,
+                    EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE), &Address);
     if (EFI_ERROR (Status)) {
       DEBUG ((DEBUG_ERROR, "GenetDmaAlloc: Failed to allocate RX buffer: %r\n", Status));
       GenetDmaFree (Genet);
       return Status;
     }
+    Genet->RxBuffer[Idx] = (UINT8 *)(UINTN)Address;
   }
 
   return EFI_SUCCESS;
@@ -690,8 +698,8 @@ GenetDmaFree (
     GenetDmaUnmapRxDescriptor (Genet, Idx);
 
     if (Genet->RxBuffer[Idx] != NULL) {
-      DmaFreeBuffer (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE),
-        Genet->RxBuffer[Idx]);
+      gBS->FreePages (EFI_SIZE_TO_PAGES (GENET_MAX_PACKET_SIZE),
+        (UINTN)Genet->RxBuffer[Idx]);
       Genet->RxBuffer[Idx] = NULL;
     }
   }
-- 
2.17.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH edk2-platforms v2 0/4] BCM genet fixes
  2020-05-10 10:42 [PATCH edk2-platforms v2 0/4] BCM genet fixes Ard Biesheuvel
                   ` (3 preceding siblings ...)
  2020-05-10 10:42 ` [PATCH edk2-platforms v2 4/4] Silicon/Broadcom/BcmGenetDxe: avoid uncached memory for streaming DMA Ard Biesheuvel
@ 2020-05-10 21:36 ` Ard Biesheuvel
  4 siblings, 0 replies; 6+ messages in thread
From: Ard Biesheuvel @ 2020-05-10 21:36 UTC (permalink / raw)
  To: devel; +Cc: Pete Batard, Jared McNeill, Andrei Warkentin,
	Samer El-Haj-Mahmoud

On 5/10/20 12:42 PM, Ard Biesheuvel wrote:
> This fixes the multicast/broadcast/promisc handling, and switches to
> ordinary page allocations for RX buffers. Patch #1 is cosmetic only.
> 
> https://github.com/pftf/edk2-platforms/tree/rpi4_genet_v2_ardb
> 
> Cc: Pete Batard <pete@akeo.ie>
> Cc: Jared McNeill <jmcneill@invisible.ca>
> Cc: Andrei Warkentin <awarkentin@vmware.com>
> Cc: Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>
> 
> NOTE: build tested only.
> 

Samer is reporting that this breaks HTTP boot. I will have a look into 
this tomorrow.


^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2020-05-10 21:36 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-05-10 10:42 [PATCH edk2-platforms v2 0/4] BCM genet fixes Ard Biesheuvel
2020-05-10 10:42 ` [PATCH edk2-platforms v2 1/4] Silicon/Broadcom/BcmGenetDxe: whitespace/cosmetic cleanup Ard Biesheuvel
2020-05-10 10:42 ` [PATCH edk2-platforms v2 2/4] Silicon/Broadcom/BcmGenetDxe: add support for broadcast filtering Ard Biesheuvel
2020-05-10 10:42 ` [PATCH edk2-platforms v2 3/4] Silicon/Broadcom/BcmGenetDxe: fix multicast/broadcast handling Ard Biesheuvel
2020-05-10 10:42 ` [PATCH edk2-platforms v2 4/4] Silicon/Broadcom/BcmGenetDxe: avoid uncached memory for streaming DMA Ard Biesheuvel
2020-05-10 21:36 ` [PATCH edk2-platforms v2 0/4] BCM genet fixes Ard Biesheuvel

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