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charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: quoted-printable On 5/26/20 10:41 AM, Tom Lendacky wrote: > On 5/25/20 10:07 AM, Laszlo Ersek wrote: >> On 05/19/20 23:50, Lendacky, Thomas wrote: >>> BZ:=20 >>> https://nam11.safelinks.protection.outlook.com/?url=3Dhttps%3A%2F%2Fbug= zilla.tianocore.org%2Fshow_bug.cgi%3Fid%3D2198&data=3D02%7C01%7Cthomas.= lendacky%40amd.com%7C39b71c622d2d4bbf9e5b08d800bd69a5%7C3dd8961fe4884e608e1= 1a82d994e183d%7C0%7C0%7C637260160817275268&sdata=3Dhz43pd7UO60%2FWfNALL= yUuUax8KX%2Bpq4SyU9NIN32Pfc%3D&reserved=3D0=20 >>> >>> >>> A GHCB page is needed during the Sec phase, so this new page must be >>> created. Since the #VC exception handler routines assume that a per-CPU >>> variable area is immediately after the GHCB, this per-CPU variable area >>> must also be created. Since the GHCB must be marked as an un-encrypted, >>> or shared, page, an additional pagetable page is required to break down >>> the 2MB region where the GHCB page lives into 4K pagetable entries. >>> >>> Create a new entry in the OVMF memory layout for the new page table >>> page and for the SEC GHCB and per-CPU variable pages. After breaking do= wn >>> the 2MB page, update the GHCB page table entry to remove the encryption >>> mask. >>> >>> The GHCB page will be used by the SEC #VC exception handler. The #VC >>> exception handler will fill in the necessary fields of the GHCB and exi= t >>> to the hypervisor using the VMGEXIT instruction. The hypervisor then >>> accesses the GHCB in order to perform the requested function. >>> >>> Two new fixed PCDs are needed to support the SEC GHCB page: >>> =C2=A0=C2=A0 - PcdOvmfSecGhcbBase=C2=A0 UINT64 value that is the base a= ddress of the >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= GHCB used during the SEC phase. >>> =C2=A0=C2=A0 - PcdOvmfSecGhcbSize=C2=A0 UINT64 value that is the size, = in bytes, of the >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= GHCB area used during the SEC phase. >>> >>> Cc: Jordan Justen >>> Cc: Laszlo Ersek >>> Cc: Ard Biesheuvel >>> Reviewed-by: Laszlo Ersek >>> Signed-off-by: Tom Lendacky >>> --- >>> =C2=A0 OvmfPkg/OvmfPkg.dec=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 |=C2=A0 9 +++ >>> =C2=A0 OvmfPkg/OvmfPkgX64.fdf=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |= =C2=A0 6 ++ >>> =C2=A0 OvmfPkg/ResetVector/ResetVector.inf=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 |=C2=A0 5 ++ >>> =C2=A0 OvmfPkg/ResetVector/Ia32/PageTables64.asm | 70 +++++++++++++++++= ++++++ >>> =C2=A0 OvmfPkg/ResetVector/ResetVector.nasmb=C2=A0=C2=A0=C2=A0=C2=A0 | = 17 ++++++ >>> =C2=A0 5 files changed, 107 insertions(+) >>> >>> diff --git a/OvmfPkg/OvmfPkg.dec b/OvmfPkg/OvmfPkg.dec >>> index 65bb2bb0eb4c..02ad62ed9f43 100644 >>> --- a/OvmfPkg/OvmfPkg.dec >>> +++ b/OvmfPkg/OvmfPkg.dec >>> @@ -281,6 +281,15 @@ [PcdsFixedAtBuild] >>> =C2=A0=C2=A0=C2=A0 ## Number of page frames to use for storing grant ta= ble entries. >>> =C2=A0=C2=A0=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdXenGrantFrames|4|UINT3= 2|0x33 >>> +=C2=A0 ## Specify the extra page table needed to mark the GHCB as unen= crypted. >>> +=C2=A0 #=C2=A0 The value should be a multiple of 4KB for each. >>> +=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|0x0|UINT= 32|0x3a >>> +=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize|0x0|UINT= 32|0x3b >>> + >>> +=C2=A0 ## The base address of the SEC GHCB page used by SEV-ES. >>> +=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|0|UINT32|0x3c >>> +=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize|0|UINT32|0x3d >>> + >>> =C2=A0 [PcdsDynamic, PcdsDynamicEx] >>> =C2=A0=C2=A0=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdEmuVariableEvent|0|UIN= T64|2 >>> =20 >>> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFlashVariablesEnable|FALSE|BOOLEAN|0x= 10 >> >> OK, the token values have been updated, due to: >> >> - commit 7efce2e59c20 ("OvmfPkg/PvScsiDxe: Report the number of targets >> and LUNs", 2020-03-30) >> >> - commit c4c15b870239 ("OvmfPkg/PvScsiDxe: Support sending SCSI request >> and receive response", 2020-03-30) >> >> - commit 093cceaf79b5 ("OvmfPkg/MptScsiDxe: Report targets and one LUN", >> 2020-05-05) >> >> (Independently, when I reviewed what would become 505812ae1d2d >> ("OvmfPkg/MptScsiDxe: Implement the PassThru method", 2020-05-05), I >> missed that 0x39 is followed by 0x3A, not 0x40. Oh well.) >> >> >>> diff --git a/OvmfPkg/OvmfPkgX64.fdf b/OvmfPkg/OvmfPkgX64.fdf >>> index bfca1eff9e83..88b1e880e603 100644 >>> --- a/OvmfPkg/OvmfPkgX64.fdf >>> +++ b/OvmfPkg/OvmfPkgX64.fdf >>> @@ -76,6 +76,12 @@ [FD.MEMFD] >>> =C2=A0 0x007000|0x001000 >>> =20 >>> gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress|gUefiOvmfP= kgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize=20 >>> >>> +0x008000|0x001000 >>> +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase|gUefiOvmfPkgTok= enSpaceGuid.PcdOvmfSecGhcbPageTableSize=20 >>> >>> + >>> +0x009000|0x002000 >>> +gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase|gUefiOvmfPkgTokenSpaceGu= id.PcdOvmfSecGhcbSize=20 >>> >>> + >>> =C2=A0 0x010000|0x010000 >>> =20 >>> gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase|gUefiOvmfPkgTokenSp= aceGuid.PcdOvmfSecPeiTempRamSize=20 >>> >>> diff --git a/OvmfPkg/ResetVector/ResetVector.inf=20 >>> b/OvmfPkg/ResetVector/ResetVector.inf >>> index b0ddfa5832a2..483fd90fe785 100644 >>> --- a/OvmfPkg/ResetVector/ResetVector.inf >>> +++ b/OvmfPkg/ResetVector/ResetVector.inf >>> @@ -26,6 +26,7 @@ [Sources] >>> =C2=A0 [Packages] >>> =C2=A0=C2=A0=C2=A0 OvmfPkg/OvmfPkg.dec >>> =C2=A0=C2=A0=C2=A0 MdePkg/MdePkg.dec >>> +=C2=A0 MdeModulePkg/MdeModulePkg.dec >>> =C2=A0=C2=A0=C2=A0 UefiCpuPkg/UefiCpuPkg.dec >>> =C2=A0 [BuildOptions] >>> @@ -33,5 +34,9 @@ [BuildOptions] >>> =C2=A0=C2=A0=C2=A0=C2=A0 *_*_X64_NASMB_FLAGS =3D -I$(WORKSPACE)/UefiCpu= Pkg/ResetVector/Vtf0/ >>> =C2=A0 [Pcd] >>> +=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbBase >>> +=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbSize >>> +=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableBase >>> +=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecGhcbPageTableSize >>> =C2=A0=C2=A0=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase >>> =C2=A0=C2=A0=C2=A0 gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize >>> diff --git a/OvmfPkg/ResetVector/Ia32/PageTables64.asm=20 >>> b/OvmfPkg/ResetVector/Ia32/PageTables64.asm >>> index abad009f20f5..c3587a1b7814 100644 >>> --- a/OvmfPkg/ResetVector/Ia32/PageTables64.asm >>> +++ b/OvmfPkg/ResetVector/Ia32/PageTables64.asm >>> @@ -21,6 +21,11 @@ BITS=C2=A0=C2=A0=C2=A0 32 >>> =C2=A0 %define PAGE_2M_MBO=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 0x080 >>> =C2=A0 %define PAGE_2M_PAT=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 0x01000 >>> +%define PAGE_4K_PDE_ATTR (PAGE_ACCESSED + \ >>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 PAGE_DIRTY + \ >>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 PAGE_READ_WRITE + \ >>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0 PAGE_PRESENT) >>> + >>> =C2=A0 %define PAGE_2M_PDE_ATTR (PAGE_2M_MBO + \ >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 PAGE_ACCESSED + \ >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0 PAGE_DIRTY + \ >>> @@ -75,6 +80,37 @@ NoSev: >>> =C2=A0 SevExit: >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 OneTimeCallRet CheckSevFeature >>> +; Check if Secure Encrypted Virtualization - Encrypted State (SEV-ES)= =20 >>> feature >>> +; is enabled. >>> +; >>> +; Modified:=C2=A0 EAX, EBX, ECX >>> +; >>> +; If SEV-ES is enabled then EAX will be non-zero. >>> +; If SEV-ES is disabled then EAX will be zero. >>> +; >>> +CheckSevEsFeature: >>> +=C2=A0=C2=A0=C2=A0 xor=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 eax, eax >>> + >>> +=C2=A0=C2=A0=C2=A0 ; SEV-ES can't be enabled if SEV isn't, so first ch= eck the encryption >>> +=C2=A0=C2=A0=C2=A0 ; mask. >>> +=C2=A0=C2=A0=C2=A0 test=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 edx, edx >>> +=C2=A0=C2=A0=C2=A0 jz=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 NoSevE= s >>> + >>> +=C2=A0=C2=A0=C2=A0 ; Save current value of encryption mask >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ebx, edx >>> + >>> +=C2=A0=C2=A0=C2=A0 ; Check if SEV-ES is enabled >>> +=C2=A0=C2=A0=C2=A0 ;=C2=A0 MSR_0xC0010131 - Bit 1 (SEV-ES enabled) >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ecx, 0xc001= 0131 >>> +=C2=A0=C2=A0=C2=A0 rdmsr >>> +=C2=A0=C2=A0=C2=A0 and=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 eax, 2 >>> + >>> +=C2=A0=C2=A0=C2=A0 ; Restore encryption mask >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 edx, ebx >>> + >>> +NoSevEs: >>> +=C2=A0=C2=A0=C2=A0 OneTimeCallRet CheckSevEsFeature >>> + >>> =C2=A0 ; >>> =C2=A0 ; Modified:=C2=A0 EAX, EBX, ECX, EDX >>> =C2=A0 ; >>> @@ -139,6 +175,40 @@ pageTableEntriesLoop: >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 [(ecx * 8 + = PT_ADDR (0x2000 - 8)) + 4], edx >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 loop=C2=A0=C2=A0=C2=A0 pageTableEntriesL= oop >>> +=C2=A0=C2=A0=C2=A0 OneTimeCall=C2=A0=C2=A0 CheckSevEsFeature >>> +=C2=A0=C2=A0=C2=A0 test=C2=A0=C2=A0=C2=A0 eax, eax >>> +=C2=A0=C2=A0=C2=A0 jz=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SetCr3 >>> + >>> +=C2=A0=C2=A0=C2=A0 ; >>> +=C2=A0=C2=A0=C2=A0 ; The initial GHCB will live at GHCB_BASE and needs= to be=20 >>> un-encrypted. >>> +=C2=A0=C2=A0=C2=A0 ; This requires the 2MB page for this range be brok= en down into=20 >>> 512 4KB >>> +=C2=A0=C2=A0=C2=A0 ; pages.=C2=A0 All will be marked encrypted, except= for the GHCB. >>> +=C2=A0=C2=A0=C2=A0 ; >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 ecx, (GHCB_BASE >> 21) >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 eax, GHCB_PT_ADDR + PAG= E_PDP_ATTR >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 [ecx * 8 + PT_ADDR (0x2= 000)], eax >>> + >>> +=C2=A0=C2=A0=C2=A0 ; >>> +=C2=A0=C2=A0=C2=A0 ; Page Table Entries (512 * 4KB entries =3D> 2MB) >>> +=C2=A0=C2=A0=C2=A0 ; >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 ecx, 512 >>> +pageTableEntries4kLoop: >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 eax, ecx >>> +=C2=A0=C2=A0=C2=A0 dec=C2=A0=C2=A0=C2=A0=C2=A0 eax >>> +=C2=A0=C2=A0=C2=A0 shl=C2=A0=C2=A0=C2=A0=C2=A0 eax, 12 >>> +=C2=A0=C2=A0=C2=A0 add=C2=A0=C2=A0=C2=A0=C2=A0 eax, GHCB_BASE & 0xFFE0= _0000 >>> +=C2=A0=C2=A0=C2=A0 add=C2=A0=C2=A0=C2=A0=C2=A0 eax, PAGE_4K_PDE_ATTR >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 [ecx * 8 + GHCB_PT_ADDR= - 8], eax >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 [(ecx * 8 + GHCB_PT_ADD= R - 8) + 4], edx >>> +=C2=A0=C2=A0=C2=A0 loop=C2=A0=C2=A0=C2=A0 pageTableEntries4kLoop >>> + >>> +=C2=A0=C2=A0=C2=A0 ; >>> +=C2=A0=C2=A0=C2=A0 ; Clear the encryption bit from the GHCB entry >>> +=C2=A0=C2=A0=C2=A0 ; >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 ecx, (GHCB_BASE & 0x1F_= FFFF) >> 12 >>> +=C2=A0=C2=A0=C2=A0 mov=C2=A0=C2=A0=C2=A0=C2=A0 [ecx * 8 + GHCB_PT_ADDR= + 4], strict dword 0 >>> + >> >> (1) Why did you remove "clearGhcbMemoryLoop" (in the v6->v7 transition)? >=20 > I removed it because it actually wasn't clearing the GHCB at all. Since=20 > this occurred before the new page tables are loaded, the page is accessed= =20 > encrypted. After loading the new page tables, the GHCB is now referenced= =20 > unencrypted and so the "zeroed" page isn't actually zeroes anymore, it is= =20 > cipher-text. >=20 > Since the GHCB is always cleared on #VC, I dropped it. >=20 >> >> I think that's exactly the clearing loop (minimally for the CPU#0 >> per-CPU page) that I was just looking for in point (8) under >> "OvmfPkg/VmgExitLib: Add support for DR7 Read/Write NAE events" (v8 26/4= 6). >> >> Hm... the v7 blurb says, "Ensure the per-CPU variable page remains >> encrypted". OK, but that still doesn't explain why we don't clear it >> (just for the guest to see). >=20 > I'll add a loop to clear the GHCB page and the per-CPU page after=20 > establishing the new page tables. >=20 >> >> Also, if the patch was non-trivially modified in v7, then arguably my >> R-b (given originally under "RFC PATCH v3 26/43") should have been remov= ed. >> >> Please re-instate "clearGhcbMemoryLoop" (and then keep the R-b). >=20 > I'll actually drop your Reviewed-by: since I'll need to expand and move=20 > the loop to clear the memory area from the original location in order for= =20 > the clearing of the pages to be correct. It's not expanding (not sure why I typed that), just moving to after the=20 setting of CR3. Thanks, Tom >=20 > Thanks, > Tom >=20 >> >> Thanks, >> Laszlo >> >>> +SetCr3: >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ; >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ; Set CR3 now that the paging structures= are available >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ; >>> diff --git a/OvmfPkg/ResetVector/ResetVector.nasmb=20 >>> b/OvmfPkg/ResetVector/ResetVector.nasmb >>> index 75cfe16654b1..bfb77e439105 100644 >>> --- a/OvmfPkg/ResetVector/ResetVector.nasmb >>> +++ b/OvmfPkg/ResetVector/ResetVector.nasmb >>> @@ -53,8 +53,25 @@ >>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 %error "This implementation inherently d= epends on=20 >>> PcdOvmfSecPageTablesSize" >>> =C2=A0=C2=A0=C2=A0 %endif >>> +=C2=A0 %if (FixedPcdGet32 (PcdOvmfSecGhcbPageTableSize) !=3D 0x1000) >>> +=C2=A0=C2=A0=C2=A0 %error "This implementation inherently depends on=20 >>> PcdOvmfSecGhcbPageTableSize" >>> +=C2=A0 %endif >>> + >>> +=C2=A0 %if (FixedPcdGet32 (PcdOvmfSecGhcbSize) !=3D 0x2000) >>> +=C2=A0=C2=A0=C2=A0 %error "This implementation inherently depends on P= cdOvmfSecGhcbSize" >>> +=C2=A0 %endif >>> + >>> +=C2=A0 %if ((FixedPcdGet32 (PcdOvmfSecGhcbBase) >> 21) !=3D \ >>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ((FixedPcdGet32 (PcdOvmfSecGhcbBa= se) + FixedPcdGet32=20 >>> (PcdOvmfSecGhcbSize) - 1) >> 21)) >>> +=C2=A0=C2=A0=C2=A0 %error "This implementation inherently depends on=20 >>> PcdOvmfSecGhcbBase not straddling a 2MB boundary" >>> +=C2=A0 %endif >>> + >>> =C2=A0=C2=A0=C2=A0 %define PT_ADDR(Offset) (FixedPcdGet32 (PcdOvmfSecPa= geTablesBase) +=20 >>> (Offset)) >>> =C2=A0 %include "Ia32/Flat32ToFlat64.asm" >>> + >>> +=C2=A0 %define GHCB_PT_ADDR (FixedPcdGet32 (PcdOvmfSecGhcbPageTableBas= e)) >>> +=C2=A0 %define GHCB_BASE (FixedPcdGet32 (PcdOvmfSecGhcbBase)) >>> +=C2=A0 %define GHCB_SIZE (FixedPcdGet32 (PcdOvmfSecGhcbSize)) >>> =C2=A0 %include "Ia32/PageTables64.asm" >>> =C2=A0 %endif >>> >>