[PATCH] IntelSiliconPkg/VTd: Fix build fail for add iommu 5 level paging support

[PATCH] IntelSiliconPkg/VTd: Fix build fail for add iommu 5 level paging support

[Sheng Wei]

Build fail is found in patch "IntelSiliconPkg/VTd: Add iommu 5 level
 paging support".
Fix build fail in file TranslationTable.c and TranslationTableEx.c.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3067

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
---
 .../Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c   | 3 +--
 .../Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c | 3 +--
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
index ede6e0c5..58ff8550 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTable.c
@@ -133,8 +133,7 @@ CreateContextEntry (
       mVtdUnitInformation[VtdIndex].Is5LevelPaging = TRUE;
       if ((mAcpiDmarTable->HostAddressWidth <= 48) &&
           ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) != 0)) {
-          mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
-        }
+        mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
       }
     } else if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
       DEBUG((DEBUG_ERROR, "!!!! Page-table type is not supported on VTD %d !!!!\n", VtdIndex));
diff --git a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
index a4d66bc7..b8fa62fb 100644
--- a/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
+++ b/Silicon/Intel/IntelSiliconPkg/Feature/VTd/IntelVTdDxe/TranslationTableEx.c
@@ -83,8 +83,7 @@ CreateExtContextEntry (
       mVtdUnitInformation[VtdIndex].Is5LevelPaging = TRUE;
       if ((mAcpiDmarTable->HostAddressWidth <= 48) &&
           ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) != 0)) {
-          mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
-        }
+        mVtdUnitInformation[VtdIndex].Is5LevelPaging = FALSE;
       }
     } else if ((mVtdUnitInformation[VtdIndex].CapReg.Bits.SAGAW & BIT2) == 0) {
       DEBUG((DEBUG_ERROR, "!!!! Page-table type is not supported on VTD %d !!!!\n", VtdIndex));
-- 
2.16.2.windows.1

Re: [edk2-devel] [PATCH] IntelSiliconPkg/VTd: Fix build fail for add iommu 5 level paging support

[Ni, Ray]

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Reviewed-by: Ray Ni <ray.ni@intel.com>

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