public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: "Sami Mujawar" <sami.mujawar@arm.com>
To: devel@edk2.groups.io, Sahil <Sahil@arm.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>,
	Leif Lindholm <leif@nuviainc.com>,
	Samer El-Haj-Mahmoud <Samer.El-Haj-Mahmoud@arm.com>,
	nd <nd@arm.com>
Subject: Re: [edk2-devel] [edk2-platforms][PATCH V3 1/1] Silicon/ARM/NeoverseN1Soc: Update CCIX PNP ID
Date: Tue, 13 Dec 2022 13:11:35 +0000	[thread overview]
Message-ID: <121eee9e-8dee-d8cd-2b2c-4b2d7aa825fb@arm.com> (raw)
In-Reply-To: <172ED26EFF10A09A.9474@groups.io>

Merged as f0385722832d..df870c7beaee

Thanks.

Regards,

Sami Mujawar

On 08/12/2022 12:51 pm, Sami Mujawar via groups.io wrote:
> HI Sahil,
>
> Thank you for the updated patch.
> These changes look good to me.
>
> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
>
> Regards,
>
> Sami Mujawar
>
> On 08/12/2022, 12:07, "sahil" <sahil@arm.com> wrote:
>
>      The PNP ID 0x0A09 used for CCIX host bridge in the current code is
>      not defined in any specification and is therefore incorrect.
>
>      Also, there is no need for a separate ID for CCIX host bridge,
>      for the following reasons:
>
>      1. CCIX doesn't have any host specific requirements/ingredients as such.
>      2. CCIX protocol messages flow over regular PCIe.
>      3. CCIX devices and root ports are natively discovered using the CCIX DVSEC.
>
>      Therefore, reuse PCIe PNP ID for CCIX.
>
>      Signed-off-by: sahil <sahil@arm.com>
>      ---
>
>      Notes:
>          v3:
>          - added more info regarding the change in commit message [Sami Mujawar]
>          v2:
>          - removed licence fix, to be pushed in separate patch [Leif Lindholm]
>
>       Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c | 4 ++--
>       1 file changed, 2 insertions(+), 2 deletions(-)
>
>      diff --git a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
>      index 1f38f654a8ce..6a154d771126 100644
>      --- a/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
>      +++ b/Silicon/ARM/NeoverseN1Soc/Library/PciHostBridgeLib/PciHostBridgeLib.c
>      @@ -65,8 +65,8 @@ STATIC EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[ROOT_COMPLEX_
>                 (UINT8)(sizeof (ACPI_HID_DEVICE_PATH) >> 8)
>
>               }
>
>             },
>
>      -      EISA_PNP_ID(0x0A09), // CCIX
>
>      -      0
>
>      +      EISA_PNP_ID(0x0A08), // CCIX
>
>      +      1
>
>           },
>
>           {
>
>             END_DEVICE_PATH_TYPE,
>
>      --
>      2.25.1
>
>
>
>
> 
>
>

      parent reply	other threads:[~2022-12-13 13:11 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-08 12:07 [edk2-platforms][PATCH V3 1/1] Silicon/ARM/NeoverseN1Soc: Update CCIX PNP ID sahil
2022-12-08 12:51 ` Sami Mujawar
     [not found] ` <172ED26EFF10A09A.9474@groups.io>
2022-12-13 13:11   ` Sami Mujawar [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=121eee9e-8dee-d8cd-2b2c-4b2d7aa825fb@arm.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox