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Received: from DM6PR12MB3163.namprd12.prod.outlook.com (20.179.71.154) by DM6PR12MB3675.namprd12.prod.outlook.com (10.255.76.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.2451.28; Wed, 20 Nov 2019 20:08:17 +0000 Received: from DM6PR12MB3163.namprd12.prod.outlook.com ([fe80::dd0c:8e53:4913:8ef4]) by DM6PR12MB3163.namprd12.prod.outlook.com ([fe80::dd0c:8e53:4913:8ef4%5]) with mapi id 15.20.2451.031; Wed, 20 Nov 2019 20:08:17 +0000 From: "Lendacky, Thomas" To: devel@edk2.groups.io Cc: Jordan Justen , Laszlo Ersek , Ard Biesheuvel , Michael D Kinney , Liming Gao , Eric Dong , Ray Ni , Brijesh Singh Subject: [RFC PATCH v3 31/43] OvmfPkg/Sec: Enable cache early to speed up booting Date: Wed, 20 Nov 2019 14:06:53 -0600 Message-Id: <1239290da9310bd688d9d25fb83737c5ca122882.1574280425.git.thomas.lendacky@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: X-ClientProxiedBy: DM3PR12CA0087.namprd12.prod.outlook.com (2603:10b6:0:57::31) To DM6PR12MB3163.namprd12.prod.outlook.com (2603:10b6:5:15e::26) Return-Path: thomas.lendacky@amd.com MIME-Version: 1.0 X-Mailer: git-send-email 2.17.1 X-Originating-IP: [165.204.77.1] X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-HT: Tenant X-MS-Office365-Filtering-Correlation-Id: ffa2b7b4-a1a1-4e59-20e5-08d76df55053 X-MS-TrafficTypeDiagnostic: DM6PR12MB3675: X-MS-Exchange-PUrlCount: 1 X-MS-Exchange-Transport-Forked: True X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:9508; X-Forefront-PRVS: 02272225C5 X-Forefront-Antispam-Report: SFV:NSPM;SFS:(10009020)(4636009)(136003)(396003)(366004)(39860400002)(346002)(376002)(199004)(189003)(36756003)(6506007)(51416003)(446003)(66946007)(76176011)(52116002)(50466002)(386003)(478600001)(6116002)(3846002)(14454004)(48376002)(5660300002)(966005)(6306002)(6666004)(14444005)(186003)(26005)(6512007)(4326008)(6436002)(2906002)(6486002)(99286004)(50226002)(2361001)(8676002)(81156014)(81166006)(8936002)(118296001)(2351001)(316002)(86362001)(6916009)(66066001)(16586007)(7736002)(305945005)(47776003)(25786009)(66556008)(66476007)(486006)(11346002)(54906003)(476003)(2616005);DIR:OUT;SFP:1101;SCL:1;SRVR:DM6PR12MB3675;H:DM6PR12MB3163.namprd12.prod.outlook.com;FPR:;SPF:None;LANG:en;PTR:InfoNoRecords;A:1;MX:1; Received-SPF: None (protection.outlook.com: amd.com does not designate permitted sender hosts) X-MS-Exchange-SenderADCheck: 1 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: zsXyI9QOyvrVpImwMLl5JV4N7kgFpYuNcyMZjV1Nj8FpRFGJuqSDOspxrFgsBt2EXi9zgoTrF5xW9IZC/LRmJbTCDsTn4Kj9sTCzybVvMVQKZk5gN5p7wLmRyRFShGAzND+wrTeXxQM8zTJEv8dH/lFn7rp7fTedGqDRIs8l+i7g4cVrsEqx4pxUPsJWr8xpJEGA1NSK2NgAdhmwQe5mnP7/seGWVJV5HXUfKKTzZH8fFSAoAM0NrBYTz/KRCUJu2Sn0oRdITsv/FP/kjWB713b4b4i6GBXKPKS0JxTGjvgbMLPfBcIsemk5dmZ4jp/s6Fw7sBBW3SvfBT6FJuOsafaqyej2bL05EUURXKMwL2Hve1EPniNn720/m9BDBoHqvvK0S9Iep8XNcM895XI9xbnkWco1acdz3VzaspHyO4Jci8/ClC00ZlGqWyZ61ngn8/nwvbbO6NfrpVOQeqW7Z2k7KU5/wVCm11xwTGHEyNI= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: ffa2b7b4-a1a1-4e59-20e5-08d76df55053 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 20 Nov 2019 20:07:48.0233 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: kZA1A5Ti6T00EDZjysEnIQ1zvUNFo+syKYbH79m5N7P/8sOcPV56wyg8xGHg7Iyce3Gj/jfILkbF8m1JhHb54Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3675 Content-Type: text/plain BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2198 Currently, the OVMF code relies on the hypervisor to enable the cache support on the processor in order to improve the boot speed. However, with SEV-ES, the hypervisor is not allowed to change the CR0 register to enable caching. Update the OVMF Sec support to enable caching in order to improve the boot speed when running as an SEV-ES guest. Cc: Jordan Justen Cc: Laszlo Ersek Cc: Ard Biesheuvel Signed-off-by: Tom Lendacky --- OvmfPkg/Sec/SecMain.c | 45 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) diff --git a/OvmfPkg/Sec/SecMain.c b/OvmfPkg/Sec/SecMain.c index db319030ee58..53c850134897 100644 --- a/OvmfPkg/Sec/SecMain.c +++ b/OvmfPkg/Sec/SecMain.c @@ -25,6 +25,9 @@ #include #include #include +#include +#include +#include #include @@ -713,6 +716,39 @@ FindAndReportEntryPoints ( return; } +STATIC +BOOLEAN +SevEsIsEnabled ( + VOID + ) +{ + UINT32 RegEax; + CPUID_MEMORY_ENCRYPTION_INFO_EAX Eax; + MSR_SEV_STATUS_REGISTER Msr; + + // + // Check if the memory encryption leaf exist + // + AsmCpuid (CPUID_EXTENDED_FUNCTION, &RegEax, NULL, NULL, NULL); + if (RegEax >= CPUID_MEMORY_ENCRYPTION_INFO) { + // + // CPUID Fn8000_001F[EAX] Bit 1 (Sev supported) + // + AsmCpuid (CPUID_MEMORY_ENCRYPTION_INFO, &Eax.Uint32, NULL, NULL, NULL); + if (Eax.Bits.SevBit && Eax.Bits.SevEsBit) { + // + // Check MSR_0xC0010131 Bit 1 (Sev-Es Enabled) + // + Msr.Uint32 = AsmReadMsr32 (MSR_SEV_STATUS); + if (Msr.Bits.SevEsBit) { + return TRUE; + } + } + } + + return FALSE; +} + VOID EFIAPI SecCoreStartupWithStack ( @@ -755,6 +791,15 @@ SecCoreStartupWithStack ( ProcessLibraryConstructorList (NULL, NULL); + // + // Under SEV-ES, the hypervisor can't modify CR0 and so can't enable + // caching in order to speed up the boot. Enable caching early for + // an SEV-ES guest. + // + if (SevEsIsEnabled()) { + AsmEnableCache (); + } + DEBUG ((EFI_D_INFO, "SecCoreStartupWithStack(0x%x, 0x%x)\n", (UINT32)(UINTN)BootFv, -- 2.17.1