From: "Irene Park" <ipark@nvidia.com>
To: Ard Biesheuvel <ard.biesheuvel@arm.com>,devel@edk2.groups.io
Subject: Re: [edk2-devel] [PATCH] ArmPlatformPkg/PL011UartLib: Add PCD for FIFO depth
Date: Mon, 08 Jun 2020 07:47:06 -0700 [thread overview]
Message-ID: <1266.1591627626574447386@groups.io> (raw)
In-Reply-To: <f2875883-7217-2867-5ab2-84ac2557f963@arm.com>
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Hi Ard,
I feel bad that I confused you. I'll update the commit message later.
SBSA spec doesn't "mandate" that the optional registers such as PID2 are present in a UART compliant to PL011.
Therefore this register access to PID2 will generate a fault onto SOC when its UART doesn't provide such registers.
PID2 is used to determine the FIFO depth in the library so I'd like to propose a new PCD to define a FIFO depth.
Thank you,
Irene
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next prev parent reply other threads:[~2020-06-08 14:47 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-06 3:23 [PATCH] ArmPlatformPkg/PL011UartLib: Add PCD for FIFO depth Irene Park
2020-06-06 3:24 ` Irene Park
2020-06-08 6:06 ` Irene Park
2020-06-08 8:29 ` [edk2-devel] " Ard Biesheuvel
2020-06-08 14:47 ` Irene Park [this message]
2020-06-08 16:44 ` Ard Biesheuvel
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