Hi Ard,
I feel bad that I confused you. I'll update the commit message later.
SBSA spec doesn't "mandate" that the optional registers such as PID2 are present in a UART compliant to PL011.
Therefore this register access to PID2 will generate a fault onto SOC when its UART doesn't provide such registers.
PID2 is used to determine the FIFO depth in the library so I'd like to propose a new PCD to define a FIFO depth.
Thank you,
Irene