From mboxrd@z Thu Jan  1 00:00:00 1970
Subject: Re: [edk2-devel] [PATCH] ArmPlatformPkg/PL011UartLib: Add PCD for FIFO depth
To: Ard Biesheuvel <ard.biesheuvel@arm.com>,devel@edk2.groups.io
From: "Irene Park" <ipark@nvidia.com>
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Date: Mon, 08 Jun 2020 07:47:06 -0700
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Hi Ard,
I feel bad that I confused you. I'll update the commit message later.
SBSA spec doesn't "mandate" that the optional registers such as PID2 are p=
resent in a UART compliant to PL011.
Therefore this register access to PID2 will generate a fault onto SOC when=
 its UART doesn't provide such registers.
PID2 is used to determine the FIFO depth in the library so I'd like to pro=
pose a new PCD to define a FIFO depth.
Thank you,
Irene

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Hi Ard,<br />I feel bad that I confused you. I'll update the commit message=
 later.<br />SBSA spec doesn't "mandate" that the optional registers such a=
s PID2 are present in a UART compliant to PL011.<br />Therefore this regist=
er access to PID2 will generate a fault onto SOC when its UART doesn't prov=
ide such registers.<br />PID2 is used to determine the FIFO depth in the li=
brary so I'd like to propose a new PCD to define a FIFO depth.<br />Thank y=
ou,<br />Irene

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