Hi Isaac,<br/>Thanks for the document. I&#39;ve seen the main MinPlatform document before, which also outlines control flow, but this shows a quick overview of it all. I&#39;ll look for the MinPlatform porting training links too. Thanks.<br/><br/>
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<p class="DefangedMsoNormal" style="margin:0px;">I would also make sure that you have the board information you need.  Whatever datasheets and such that are required.</p>
<p class="DefangedMsoNormal" style="margin:0px;">In addition to the Minimum Platform spec, I like to have the UEFI Spec and the UEFI Platform Initialization arch specs handy for reference.  ACPI too.</p>
<p class="DefangedMsoNormal" style="margin:0px;">That gives you the HW and SW documents.  And you have mentors and the mailing list for a network of experts.  Those plus hardware and tools should set you up.  Minimum tools capabilities should be flash programming and serial debug.</p>
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I have the schematics, boardview and the datasheets that became relevant to porting (some I was unable to find, mainly regarding PCIe devices). While this board may have a working serial pad, it would be difficult to access and likely requires soldering (which I cannot do).<br/><br/>I planned to skip directly to stage 4 (OS), or at least 3 (shell). I should have the required board knowledge from my coreboot port. For debug logs, I think the serial port library which logs Status Codes (which will be stored in memory) could be a good fit. For early problems in PEI, I see there is a serial port library which logs to SPI flash. If these fail here, I&#39;ll have to hope the USB3 debugging feature will work.<br/>
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<p class="DefangedMsoNormal" style="margin:0px;">I will defer to Nate on communication recommendations as all the GSoC projects will be working those out.  And I have to admit I didn’t read the GSoC documentation thoroughly yet.</p>
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Okay, not a problem.<br/><br/>Nice to meet you!<br/><br/>Best regards,<br/>Benjamin Doron