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Subject: Re: [edk2-platforms][PATCH 1/1] RPi4: reserve/map memory above 4GB when present
To: Pete Batard <pete@akeo.ie>, Andrei Warkentin
 <andrey.warkentin@gmail.com>, devel@edk2.groups.io
Cc: leif@nuviainc.com, philmd@redhat.com
References: <20200607072023.127337-1-andrey.warkentin@gmail.com>
 <d4122036-c563-a949-2c40-26162f781095@akeo.ie>
From: "Ard Biesheuvel" <ard.biesheuvel@arm.com>
Message-ID: <1345afd4-2d5a-8890-9638-1c442c61b2d0@arm.com>
Date: Mon, 8 Jun 2020 19:41:03 +0200
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On 6/8/20 6:02 PM, Pete Batard wrote:
> On 2020.06.07 08:20, Andrei Warkentin wrote:
>> This makes all 8GB usable on the Pi 4 8GB variant.
>>
>> Like RAM in the 3-4GB range, this is still gated by the
>> option to limit RAM to 3GB.
>>
>> Tested on 4GB and 8GB boards, with and without 3GB limit.
>>
>> Signed-off-by: Andrei Warkentin <andrey.warkentin@gmail.com>
>> ---
>>
>> =C2=A0 This is the v2 with Pete's feedback.
>=20
> Thanks!
>=20
>>
>> =C2=A0 Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 | 39 +++++---
>> =C2=A0 Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf=C2=A0 =
|=C2=A0 1 -
>> =C2=A0 Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c | 99=20
>> ++++++++++++--------
>> =C2=A0 Platform/RaspberryPi/RPi4/RPi4.dsc=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 1 -
>> =C2=A0 Platform/RaspberryPi/RaspberryPi.dec=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0 |=C2=A0 1 -
>> =C2=A0 5 files changed, 88 insertions(+), 53 deletions(-)
>>
>> diff --git a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c=20
>> b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
>> index 583f07c9..2ce3af89 100644
>> --- a/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
>> +++ b/Platform/RaspberryPi/Drivers/ConfigDxe/ConfigDxe.c
>> @@ -343,7 +343,6 @@ ApplyVariables (
>> =C2=A0=C2=A0=C2=A0 UINT32 CpuClock =3D PcdGet32 (PcdCpuClock);
>> =C2=A0=C2=A0=C2=A0 UINT32 CustomCpuClock =3D PcdGet32 (PcdCustomCpuClo=
ck);
>> =C2=A0=C2=A0=C2=A0 UINT32 Rate =3D 0;
>> -=C2=A0 UINT64 SystemMemorySize;
>> =C2=A0=C2=A0=C2=A0 switch (CpuClock) {
>> =C2=A0=C2=A0=C2=A0 case CHIPSET_CPU_CLOCK_LOW:
>> @@ -386,27 +385,43 @@ ApplyVariables (
>> =C2=A0=C2=A0=C2=A0 if (mModelFamily >=3D 4 && PcdGet32 (PcdRamMoreThan=
3GB) !=3D 0 &&
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 PcdGet32 (PcdRamLimitTo3GB)=
 =3D=3D 0) {
>> +=C2=A0=C2=A0=C2=A0 UINT64 SystemMemorySize;
>> +=C2=A0=C2=A0=C2=A0 UINT64 SystemMemorySizeBelow4GB;
>> +
>> +=C2=A0=C2=A0=C2=A0 ASSERT (BCM2711_SOC_REGISTERS !=3D 0);
>> +=C2=A0=C2=A0=C2=A0 SystemMemorySize =3D (UINT64)mModelInstalledMB * S=
IZE_1MB;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /*
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * Similar to how we compute the >=
 3 GB RAM segment's size in=20
>> PlatformLib/
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 * RaspberryPiMem.c, with some ove=
rlap protection for the=20
>> Bcm2xxx register
>> -=C2=A0=C2=A0=C2=A0=C2=A0 * spaces. This computation should also work =
for models with more=20
>> than 4 GB
>> -=C2=A0=C2=A0=C2=A0=C2=A0 * RAM, if there ever exist ones.
>> +=C2=A0=C2=A0=C2=A0=C2=A0 * spaces. SystemMemorySizeBelow4GB tracks th=
e maximum memory=20
>> below 4GB
>> +=C2=A0=C2=A0=C2=A0=C2=A0 * line, factoring in the limit imposed by th=
e SoC register range.
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 */
>> -=C2=A0=C2=A0=C2=A0 SystemMemorySize =3D (UINT64)mModelInstalledMB * S=
IZE_1MB;
>> -=C2=A0=C2=A0=C2=A0 ASSERT (SystemMemorySize > 3UL * SIZE_1GB);
>> -=C2=A0=C2=A0=C2=A0 SystemMemorySize =3D MIN(SystemMemorySize, BCM2836=
_SOC_REGISTERS);
>> -=C2=A0=C2=A0=C2=A0 if (BCM2711_SOC_REGISTERS > 0) {
>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SystemMemorySize =3D MIN(SystemMemoryS=
ize, BCM2711_SOC_REGISTERS);
>> -=C2=A0=C2=A0=C2=A0 }
>> +=C2=A0=C2=A0=C2=A0 SystemMemorySizeBelow4GB =3D MIN(SystemMemorySize,=
 4UL * SIZE_1GB);
>> +=C2=A0=C2=A0=C2=A0 SystemMemorySizeBelow4GB =3D MIN(SystemMemorySizeB=
elow4GB,=20
>> BCM2836_SOC_REGISTERS);
>> +=C2=A0=C2=A0=C2=A0 SystemMemorySizeBelow4GB =3D MIN(SystemMemorySizeB=
elow4GB,=20
>> BCM2711_SOC_REGISTERS);
>> +
>> +=C2=A0=C2=A0=C2=A0 ASSERT (SystemMemorySizeBelow4GB > 3UL * SIZE_1GB)=
;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Status =3D gDS->AddMemorySpace (EfiGcdM=
emoryTypeSystemMemory, 3UL=20
>> * BASE_1GB,
>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SystemMemorySize - (3UL * S=
IZE_1GB),
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SystemMemorySizeBelow4GB - =
(3UL * SIZE_1GB),
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 EFI_MEMORY_UC | EF=
I_MEMORY_WC | EFI_MEMORY_WT |=20
>> EFI_MEMORY_WB);
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ASSERT_EFI_ERROR (Status);
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Status =3D gDS->SetMemorySpaceAttribute=
s (3UL * BASE_1GB,
>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SystemMemorySize - (3UL * S=
IZE_1GB),
>> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 EFI_MEMORY_WB);
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SystemMemorySizeBelow4GB - =
(3UL * SIZE_1GB),=20
>> EFI_MEMORY_WB);
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ASSERT_EFI_ERROR (Status);
>> +
>> +=C2=A0=C2=A0=C2=A0 if (SystemMemorySize > 4UL * SIZE_1GB) {
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 //
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 // Register any memory above 4GB.
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 //
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Status =3D gDS->AddMemorySpace (EfiGcd=
MemoryTypeSystemMemory, 4UL=20
>> * BASE_1GB,
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SystemMemorySiz=
e - (4UL * SIZE_1GB),
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 EFI_MEMORY_UC |=
 EFI_MEMORY_WC | EFI_MEMORY_WT |=20
>> EFI_MEMORY_WB);
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ASSERT_EFI_ERROR (Status);
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 Status =3D gDS->SetMemorySpaceAttribut=
es (4UL * BASE_1GB,
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 SystemMemorySiz=
e - (4UL * SIZE_1GB),=20
>> EFI_MEMORY_WB);
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ASSERT_EFI_ERROR (Status);
>> +=C2=A0=C2=A0=C2=A0 }
>> =C2=A0=C2=A0=C2=A0 }
>> =C2=A0=C2=A0=C2=A0 if (mModelFamily =3D=3D 3 || mModelFamily =3D=3D 2)=
 {
>> diff --git a/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf=20
>> b/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
>> index f48016cc..54c3f303 100644
>> --- a/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
>> +++ b/Platform/RaspberryPi/Library/PlatformLib/PlatformLib.inf
>> @@ -55,7 +55,6 @@
>> =C2=A0=C2=A0=C2=A0 gEmbeddedTokenSpaceGuid.PcdDmaDeviceOffset
>> =C2=A0=C2=A0=C2=A0 gArmTokenSpaceGuid.PcdSystemMemoryBase
>> =C2=A0=C2=A0=C2=A0 gArmTokenSpaceGuid.PcdSystemMemorySize
>> -=C2=A0 gRaspberryPiTokenSpaceGuid.PcdExtendedMemoryBase
>> =C2=A0=C2=A0=C2=A0 gRaspberryPiTokenSpaceGuid.PcdNvStorageEventLogSize
>> =C2=A0=C2=A0=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVar=
iableSize
>> =C2=A0=C2=A0=C2=A0 gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtw=
WorkingSize
>> diff --git a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c=
=20
>> b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
>> index aae189ec..60a7b43a 100644
>> --- a/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
>> +++ b/Platform/RaspberryPi/Library/PlatformLib/RaspberryPiMem.c
>> @@ -58,18 +58,55 @@ ArmPlatformGetVirtualMemoryMap (
>> =C2=A0 {
>> =C2=A0=C2=A0=C2=A0 UINTN=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 Index =3D 0;
>> =C2=A0=C2=A0=C2=A0 UINTN=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0 GpuIndex;
>> -=C2=A0 INT64=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 OrigMemorySize;
>> -=C2=A0 INT64=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 SystemMemorySize;
>> +=C2=A0 INT64=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 TotalMemorySize;
>> +=C2=A0 INT64=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 MemorySizeBelow3GB;
>> +=C2=A0 INT64=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0 MemorySizeBelow4GB;
>> =C2=A0=C2=A0=C2=A0 ARM_MEMORY_REGION_DESCRIPTOR=C2=A0 *VirtualMemoryTa=
ble;
>> =C2=A0=C2=A0=C2=A0 // Early output of the info we got from VideoCore c=
an prove valuable.
>> =C2=A0=C2=A0=C2=A0 DEBUG ((DEBUG_INFO, "Board Rev: 0x%lX\n", mBoardRev=
ision));
>> -=C2=A0 DEBUG ((DEBUG_INFO, "Base RAM : 0x%ll08X (Size 0x%ll08X)\n",=20
>> mSystemMemoryBase, mSystemMemoryEnd + 1));
>> +=C2=A0 DEBUG ((DEBUG_INFO, "RAM < 1GB: 0x%ll08X (Size 0x%ll08X)\n",=20
>> mSystemMemoryBase, mSystemMemoryEnd + 1));
>> =C2=A0=C2=A0=C2=A0 DEBUG ((DEBUG_INFO, "VideoCore: 0x%ll08X (Size 0x%l=
l08X)\n",=20
>> mVideoCoreBase, mVideoCoreSize));
>> =C2=A0=C2=A0=C2=A0 ASSERT (mSystemMemoryBase =3D=3D 0);
>> =C2=A0=C2=A0=C2=A0 ASSERT (VirtualMemoryMap !=3D NULL);
>> +=C2=A0 // Compute the total RAM size available on this platform
>> +=C2=A0 TotalMemorySize =3D SIZE_256MB;
>> +=C2=A0 TotalMemorySize <<=3D (mBoardRevision >> 20) & 0x07;
>> +=C2=A0 DEBUG ((DEBUG_INFO, "Total RAM: 0x%ll08X\n", TotalMemorySize))=
;
>> +
>> +=C2=A0 //
>> +=C2=A0 // Ensure that what we declare as System Memory doesn't overla=
p=20
>> with the
>> +=C2=A0 // SoC MMIO registers. This can be achieved through a MIN () w=
ith the
>> +=C2=A0 // base address since SystemMemoryBase is 0 (we assert if it i=
sn't).
>> +=C2=A0 //
>> +=C2=A0 ASSERT (BCM2836_SOC_REGISTERS < 4UL * SIZE_1GB);
>> +=C2=A0 MemorySizeBelow4GB =3D MIN(TotalMemorySize, 4UL * SIZE_1GB);
>> +=C2=A0 MemorySizeBelow4GB =3D MIN(MemorySizeBelow4GB, BCM2836_SOC_REG=
ISTERS);
>> +=C2=A0 if (BCM2711_SOC_REGISTERS > 0) {
>> +=C2=A0=C2=A0=C2=A0 ASSERT (BCM2836_SOC_REGISTERS < 4UL * SIZE_1GB);
>> +=C2=A0=C2=A0=C2=A0 MemorySizeBelow4GB =3D MIN(MemorySizeBelow4GB, BCM=
2711_SOC_REGISTERS);
>> +=C2=A0 }
>> +
>> +=C2=A0 //
>> +=C2=A0 // By default we limit the memory to 3 GB to work around OS su=
pport=20
>> for
>> +=C2=A0 // DMA bugs in the SoC, for OSes that don't support _DMA range=
=20
>> descriptors.
>> +=C2=A0 // On boards with more RAM (4GB, 8GB), the extra memory is=C2=A0=
 added=20
>> by ConfigDxe
>> +=C2=A0 // provided the configuration setting for 3GB limit is off.
>> +=C2=A0 //
>> +=C2=A0 MemorySizeBelow3GB =3D MIN(MemorySizeBelow4GB, 3UL * SIZE_1GB)=
;
>> +
>> +=C2=A0 //
>> +=C2=A0 // On Pi 3 we've seen SoC registers may overlap the reported=20
>> VideoCore range,
>> +=C2=A0 // so clamp that down as well.
>> +=C2=A0 //
>> +=C2=A0 if (mVideoCoreBase + mVideoCoreSize > BCM2836_SOC_REGISTERS) {
>> +=C2=A0=C2=A0=C2=A0 mVideoCoreSize =3D BCM2836_SOC_REGISTERS - mVideoC=
oreBase;
>> +=C2=A0=C2=A0=C2=A0 DEBUG ((DEBUG_WARN, "VideoCore range overlapped So=
C MMIO, now=20
>> 0x%ll08X (Size 0x%ll08X)\n",
>> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 mV=
ideoCoreBase, mVideoCoreSize));
>> +=C2=A0 }
>> +
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryTable =3D (ARM_MEMORY_REGION_DESCRIPTO=
R*)AllocatePages
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =
(EFI_SIZE_TO_PAGES (sizeof=20
>> (ARM_MEMORY_REGION_DESCRIPTOR) *
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =
MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));
>> @@ -77,7 +114,6 @@ ArmPlatformGetVirtualMemoryMap (
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return;
>> =C2=A0=C2=A0=C2=A0 }
>> -
>> =C2=A0=C2=A0=C2=A0 // Firmware Volume
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].PhysicalBase=C2=A0=C2=A0=C2=
=A0 =3D FixedPcdGet64=20
>> (PcdFdBaseAddress);
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].VirtualBase=C2=A0=C2=A0=C2=
=A0=C2=A0 =3D=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> @@ -123,7 +159,7 @@ ArmPlatformGetVirtualMemoryMap (
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Length=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D mSystemMemoryEnd + 1 -=20
>> FixedPcdGet64 (PcdSystemMemoryBase);
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Attributes=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0 =3D=20
>> ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index].Type=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D RPI_MEM_BASIC_REGION=
;
>> -=C2=A0 VirtualMemoryInfo[Index++].Name=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D L"Base System RAM";
>> +=C2=A0 VirtualMemoryInfo[Index++].Name=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D L"System RAM < 1GB";
>> =C2=A0=C2=A0=C2=A0 // GPU Reserved
>> =C2=A0=C2=A0=C2=A0 GpuIndex =3D Index;
>> @@ -134,21 +170,9 @@ ArmPlatformGetVirtualMemoryMap (
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index].Type=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D RPI_MEM_UNMAPPED_REG=
ION;
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index++].Name=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D L"GPU Reserved";
>> -=C2=A0 // Compute the total RAM size available on this platform
>> -=C2=A0 SystemMemorySize =3D SIZE_256MB;
>> -=C2=A0 SystemMemorySize <<=3D (mBoardRevision >> 20) & 0x07;
>> -
>> -=C2=A0 //
>> -=C2=A0 // Ensure that what we declare as System Memory doesn't overla=
p=20
>> with the
>> -=C2=A0 // Bcm2836 SoC registers. This can be achieved through a MIN (=
)=20
>> with the
>> -=C2=A0 // base address since SystemMemoryBase is 0 (we assert if it i=
sn't).
>> -=C2=A0 //
>> -=C2=A0 SystemMemorySize =3D MIN(SystemMemorySize, BCM2836_SOC_REGISTE=
RS);
>> =C2=A0=C2=A0=C2=A0 // Extended SoC registers (PCIe, genet, ...)
>> =C2=A0=C2=A0=C2=A0 if (BCM2711_SOC_REGISTERS > 0) {
>> -=C2=A0=C2=A0=C2=A0 // Same overlap protection as above for the Bcm271=
1 SoC registers
>> -=C2=A0=C2=A0=C2=A0 SystemMemorySize=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D MIN(SystemMemorySize,=20
>> BCM2711_SOC_REGISTERS);
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].PhysicalBase=C2=
=A0 =3D BCM2711_SOC_REGISTERS;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].VirtualBase=C2=
=A0=C2=A0 =3D=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Length=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D=20
>> BCM2711_SOC_REGISTER_LENGTH;
>> @@ -159,45 +183,44 @@ ArmPlatformGetVirtualMemoryMap (
>> =C2=A0=C2=A0=C2=A0 // Base SoC registers
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].PhysicalBase=C2=A0=C2=A0=C2=
=A0 =3D BCM2836_SOC_REGISTERS;
>> -=C2=A0 // On the Pi 3 the SoC registers may overlap VideoCore =3D> fi=
x this
>> -=C2=A0 if (VirtualMemoryTable[GpuIndex].PhysicalBase +=20
>> VirtualMemoryTable[GpuIndex].Length >=20
>> VirtualMemoryTable[Index].PhysicalBase) {
>> -=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[GpuIndex].Length =3D=20
>> VirtualMemoryTable[Index].PhysicalBase -=20
>> VirtualMemoryTable[GpuIndex].PhysicalBase;
>> -=C2=A0 }
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].VirtualBase=C2=A0=C2=A0=C2=
=A0=C2=A0 =3D=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Length=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D=20
>> BCM2836_SOC_REGISTER_LENGTH;
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Attributes=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0 =3D=20
>> ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index].Type=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D RPI_MEM_UNMAPPED_REG=
ION;
>> =C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index++].Name=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D L"SoC Reserved (283x)";
>> -=C2=A0 //
>> -=C2=A0 // By default we limit the memory to 3 GB to work around the D=
MA=20
>> bugs in the SoC,
>> -=C2=A0 // for OSes that don't support _DMA range descriptors. On 4GB=20
>> boards, it's runtime
>> -=C2=A0 // setting to boot with 4 GB, and the additional 1 GB is added=
 by=20
>> ConfigDxe.
>> -=C2=A0 //
>> -=C2=A0 OrigMemorySize =3D SystemMemorySize;
>> -=C2=A0 SystemMemorySize =3D MIN(SystemMemorySize, 3UL * SIZE_1GB);
>> -=C2=A0 // If we have RAM above the 1 GB mark, declare it
>> -=C2=A0 if (SystemMemorySize - SIZE_1GB > 0) {
>> -=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].PhysicalBase=C2=A0 =3D F=
ixedPcdGet64=20
>> (PcdExtendedMemoryBase);
>> +=C2=A0 // Memory in the 1GB - 3GB range is always available.
>> +=C2=A0 if (MemorySizeBelow3GB > SIZE_1GB) {
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].PhysicalBase=C2=A0 =3D S=
IZE_1GB;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].VirtualBase=C2=
=A0=C2=A0 =3D=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> -=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Length=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0 =3D SystemMemorySize -=20
>> SIZE_1GB;
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Length=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0 =3D MemorySizeBelow3GB -=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Attributes=C2=
=A0=C2=A0=C2=A0 =3D=20
>> ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index].Type=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D RPI_MEM_BASIC_REGION=
;
>> -=C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index++].Name=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D L"Extended System RAM=20
>> below 3 GB";
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index++].Name=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D L"Extended System RAM <=20
>> 3GB";
>> =C2=A0=C2=A0=C2=A0 }
>> =C2=A0=C2=A0=C2=A0 //
>> -=C2=A0 // If we have RAM above 3 GB mark, declare it so it's mapped, =
but
>> -=C2=A0 // don't add it to the memory map. This is done later by Confi=
gDxe=20
>> if necessary.
>> +=C2=A0 // If we have RAM in the 3GB - 4GB range, declare it as mapped=
, but=20
>> don't
>> +=C2=A0 // add it to the memory map. This is done later by ConfigDxe i=
f=20
>> necessary.
>> =C2=A0=C2=A0=C2=A0 //
>> -=C2=A0 if (OrigMemorySize > (3UL * SIZE_1GB)) {
>> +=C2=A0 if (MemorySizeBelow4GB > 3UL * SIZE_1GB) {
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].PhysicalBase=C2=
=A0 =3D 3UL * SIZE_1GB;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].VirtualBase=C2=
=A0=C2=A0 =3D=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> -=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Length=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0 =3D OrigMemorySize -=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Length=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0 =3D MemorySizeBelow4GB -=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Attributes=C2=A0=C2=A0=C2=
=A0 =3D=20
>> ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index].Type=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D RPI_MEM_UNMAPPED_REGION;
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index++].Name=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D L"Extended System RAM <=20
>> 4GB";
>> +=C2=A0 }
>> +
>> +=C2=A0 // Same treatment for the memory above 4GB.
>> +=C2=A0 if (TotalMemorySize > 4UL * SIZE_1GB) {
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].PhysicalBase=C2=A0 =3D 4=
UL * SIZE_1GB;
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].VirtualBase=C2=A0=C2=A0 =
=3D=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Length=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0 =3D TotalMemorySize -=20
>> VirtualMemoryTable[Index].PhysicalBase;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryTable[Index].Attributes=C2=
=A0=C2=A0=C2=A0 =3D=20
>> ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK;
>> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index].Type=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D RPI_MEM_UNMAPPED_REG=
ION;
>> -=C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index++].Name=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D L"Extended System RAM=20
>> above 3 GB";
>> +=C2=A0=C2=A0=C2=A0 VirtualMemoryInfo[Index++].Name=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 =3D L"Extended System RAM=20
>> >=3D 4GB";
>> =C2=A0=C2=A0=C2=A0 }
>> =C2=A0=C2=A0=C2=A0 // End of Table
>> diff --git a/Platform/RaspberryPi/RPi4/RPi4.dsc=20
>> b/Platform/RaspberryPi/RPi4/RPi4.dsc
>> index cbff9d99..e055f13c 100644
>> --- a/Platform/RaspberryPi/RPi4/RPi4.dsc
>> +++ b/Platform/RaspberryPi/RPi4/RPi4.dsc
>> @@ -403,7 +403,6 @@
>> =C2=A0=C2=A0=C2=A0 #
>> =C2=A0=C2=A0=C2=A0 # Device specific addresses
>> =C2=A0=C2=A0=C2=A0 #
>> -=C2=A0 gRaspberryPiTokenSpaceGuid.PcdExtendedMemoryBase|0x40000000
>> =C2=A0=C2=A0=C2=A0 gBcm27xxTokenSpaceGuid.PcdBcm27xxRegistersAddress|0=
xfc000000
>> =C2=A0=C2=A0=C2=A0 gBcm27xxTokenSpaceGuid.PcdBcmGenetRegistersAddress|=
0xfd580000
>> =C2=A0=C2=A0=C2=A0 gBcm283xTokenSpaceGuid.PcdBcm283xRegistersAddress|0=
xfe000000
>> diff --git a/Platform/RaspberryPi/RaspberryPi.dec=20
>> b/Platform/RaspberryPi/RaspberryPi.dec
>> index 1a3c44e0..5b402123 100644
>> --- a/Platform/RaspberryPi/RaspberryPi.dec
>> +++ b/Platform/RaspberryPi/RaspberryPi.dec
>> @@ -39,7 +39,6 @@
>>    =20
>> gRaspberryPiTokenSpaceGuid.PcdNvStorageVariableBase|0x0|UINT32|0x00000=
005
>>    =20
>> gRaspberryPiTokenSpaceGuid.PcdNvStorageFtwSpareBase|0x0|UINT32|0x00000=
006
>>    =20
>> gRaspberryPiTokenSpaceGuid.PcdNvStorageFtwWorkingBase|0x0|UINT32|0x000=
00007=20
>>
>> -=C2=A0 gRaspberryPiTokenSpaceGuid.PcdExtendedMemoryBase|0x0|UINT32|0x=
00000008
>> =C2=A0=C2=A0=C2=A0 gRaspberryPiTokenSpaceGuid.PcdFdtSize|0x10000|UINT3=
2|0x00000009
>> =C2=A0=C2=A0=C2=A0 gRaspberryPiTokenSpaceGuid.PcdCpuLowSpeedMHz|600|UI=
NT32|0x0000000a
>> =C2=A0=C2=A0=C2=A0 gRaspberryPiTokenSpaceGuid.PcdCpuDefSpeedMHz|800|UI=
NT32|0x0000000b
>>
>=20
> Reviewed-by: Pete Batard <pete@akeo.ie>

Thanks Pete

Pushed as cf2f013b9dee..678f6bff3c46