From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 0C6FB1A1DFB for ; Mon, 5 Sep 2016 05:14:14 -0700 (PDT) Received: from int-mx13.intmail.prod.int.phx2.redhat.com (int-mx13.intmail.prod.int.phx2.redhat.com [10.5.11.26]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 7B0A9C057FA7; Mon, 5 Sep 2016 12:14:13 +0000 (UTC) Received: from lacos-laptop-7.usersys.redhat.com (ovpn-116-76.phx2.redhat.com [10.3.116.76]) by int-mx13.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u85CEBqE013318; Mon, 5 Sep 2016 08:14:12 -0400 To: Ard Biesheuvel , edk2-devel@ml01.01.org, feng.tian@intel.com, star.zeng@intel.com, liming.gao@intel.com References: <1473067049-16252-1-git-send-email-ard.biesheuvel@linaro.org> <1473067049-16252-6-git-send-email-ard.biesheuvel@linaro.org> Cc: leif.lindholm@linaro.org From: Laszlo Ersek Message-ID: <13a48ed9-27c3-d7a7-48d2-4443d19008c5@redhat.com> Date: Mon, 5 Sep 2016 14:14:10 +0200 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.2.0 MIME-Version: 1.0 In-Reply-To: <1473067049-16252-6-git-send-email-ard.biesheuvel@linaro.org> X-Scanned-By: MIMEDefang 2.68 on 10.5.11.26 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Mon, 05 Sep 2016 12:14:13 +0000 (UTC) Subject: Re: [PATCH 5/7] MdeModulePkg/XhciDxe: enable 64-bit PCI DMA X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 05 Sep 2016 12:14:14 -0000 Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit On 09/05/16 11:17, Ard Biesheuvel wrote: > PCI controller drivers must set the EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE > attribute if the controller supports 64-bit DMA addressing. > > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Ard Biesheuvel > --- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c | 22 +++++++++++++++++++- > MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h | 2 ++ > 2 files changed, 23 insertions(+), 1 deletion(-) > > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > index 4798bea86061..cdff1c3b8849 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.c > @@ -125,7 +125,7 @@ XhcGetCapability ( > Xhc = XHC_FROM_THIS (This); > *MaxSpeed = EFI_USB_SPEED_SUPER; > *PortNumber = (UINT8) (Xhc->HcSParams1.Data.MaxPorts); > - *Is64BitCapable = (UINT8) (Xhc->HcCParams.Data.Ac64); > + *Is64BitCapable = (UINT8) Xhc->Support64BitDma; > DEBUG ((EFI_D_INFO, "XhcGetCapability: %d ports, 64 bit %d\n", *PortNumber, *Is64BitCapable)); > > gBS->RestoreTPL (OldTpl); > @@ -2020,6 +2020,26 @@ XhcDriverBindingStart ( > return EFI_OUT_OF_RESOURCES; > } > > + // > + // Enable 64-bit DMA support in the PCI layer if this controller > + // supports it. > + // > + if ((Xhc->HcCParams.Data.Ac64) != 0) { I think the inner parens are superfluous. > + Status = PciIo->Attributes ( > + PciIo, > + EfiPciIoAttributeOperationEnable, > + EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE, > + NULL > + ); > + if (!EFI_ERROR (Status)) { > + Xhc->Support64BitDma = TRUE; > + } else { > + DEBUG ((EFI_D_WARN, > + "XhcDriverBindingStart: failed to enable 64-bit DMA on 64-bit capable controller @ %p (%r)\n", I prefer to use "%a" with __FUNCTION__, rather than open-coding the containing function's name; for brevity and for robustness against code movement. I'll leave it to you if you want to change these things. Reviewed-by: Laszlo Ersek Thanks Laszlo > + Controller, Status)); > + } > + } > + > XhcSetBiosOwnership (Xhc); > > XhcResetHC (Xhc, XHC_RESET_TIMEOUT); > diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > index 7999151b3fde..0f53bb0eff7c 100644 > --- a/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > +++ b/MdeModulePkg/Bus/Pci/XhciDxe/Xhci.h > @@ -256,6 +256,8 @@ struct _USB_XHCI_INSTANCE { > // The array supports up to 255 devices, entry 0 is reserved and should not be used. > // > USB_DEV_CONTEXT UsbDevContext[256]; > + > + BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device > }; > > >