Re: [edk2-devel] [PATCH] XiangshanSeriesPkg:Add Support for Xilinx RC(PCIE) Driver

["WangYang" <wangyang@bosc.ac.cn>]

[-- Attachment #1: Type: text/plain, Size: 1773 bytes --]

Hi,Ray

   Thank you very much for your attention.



-----原始邮件-----
发件人:"Ni, Ray" <ray.ni@intel.com>
发送时间:2024-05-15 16:36:02 (星期三)
收件人: "devel@edk2.groups.io" <devel@edk2.groups.io>, "wangyang@bosc.ac.cn" <wangyang@bosc.ac.cn>
抄送: "sunilvl@ventanamicro.com" <sunilvl@ventanamicro.com>, "git@danielschaefer.me" <git@danielschaefer.me>, "Ran Wang" <wangran@bosc.ac.cn>, "Leif Lindholm" <quic_llindhol@quicinc.com>, "Kinney, Michael D" <michael.d.kinney@intel.com>
主题: Re: [edk2-devel] [PATCH] XiangshanSeriesPkg:Add Support for Xilinx RC(PCIE) Driver



The patch is too big. Can you split it to multiple smaller patches?

        

        As you said, this patch is indeed a bit big.  The main reference is file “./Silicon/Phytium/FT2000-4Pkg/Library/PciSegmentLib/PciSegmentLib.c” .




> +STATIC
> +UINT64
> +PciSegmentLibGetConfigBase (
> +  IN  UINT64      Address
> +  )

> +{







> +  UINT8 Bus;
> +  UINT8 Device;
> +  UINT8 Function;
> +
> +  EXTRACT_PCIE_ADDRESS (Address, Bus, Device, Function);
> +  if ((Bus == 1) || (Bus == 2) || (Bus == 3) || (Bus == 4)) {
> +    return PCI_SEG_CONFIG_BASE;
> +  }

> +




This part of the code is redundant and should be deleted​

> +  return PCI_SEG_CONFIG_BASE;


Both paths return the same PCI_SEG_CONFIG_BASE. Then why do you check the Bus number?
This part of the code is redundant and should be deleted.​


-=-=-=-=-=-=-=-=-=-=-=-
Groups.io Links: You receive all messages sent to this group.
View/Reply Online (#118946): https://edk2.groups.io/g/devel/message/118946
Mute This Topic: https://groups.io/mt/105572700/7686176
Group Owner: devel+owner@edk2.groups.io
Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io]
-=-=-=-=-=-=-=-=-=-=-=-



[-- Attachment #2: Type: text/html, Size: 8521 bytes --]