public inbox for devel@edk2.groups.io
 help / color / mirror / Atom feed
From: Brijesh Singh <brijesh.singh@amd.com>
To: Jordan Justen <jordan.l.justen@intel.com>,
	Laszlo Ersek <lersek@redhat.com>, <edk2-devel@lists.01.org>
Cc: <Thomas.Lendacky@amd.com>, <leo.duran@amd.com>,
	Jeff Fan <jeff.fan@intel.com>, Liming Gao <liming.gao@intel.com>,
	Jiewen Yao <jiewen.yao@intel.com>
Subject: Re: [PATCH v6 00/17] x86: Secure Encrypted Virtualization (AMD)
Date: Mon, 29 May 2017 16:59:46 -0500	[thread overview]
Message-ID: <14301d64-9fa3-8231-42c1-52c2dcd9f96f@amd.com> (raw)
In-Reply-To: <149609029319.5770.13917390389219314003@jljusten-skl>



On 5/29/17 3:38 PM, Jordan Justen wrote:
> On 2017-05-29 04:16:15, Laszlo Ersek wrote:
>> (looks like I was the one to comment as second reviewer after all :) )
>>
>> On 05/26/17 23:05, Jordan Justen wrote:
>>> On 2017-05-26 07:43:48, Brijesh Singh wrote:
>>>> Changes since v4:
>>>>  - decouple IoMmu protocol implementation from AmdSevDxe into a seperate
>>>>    IoMmuDxe driver. And introduce a placeholder protocol to provide the
>>>>    dependency support for the dependent modules.
>>> I think you split IoMmuDxe out from AmdSevDxe based on my feedback
>>> regarding APRIORI, but I don't think this helped.
>>>
>>> Ideally I would like to see one driver named IoMmuDxe that is *not* in
>>> APRIORI.
>> There are two separate goals here:
>>
>> (1) Make sure that any driver that adds MMIO ranges will automatically
>> add those ranges with the C bit cleared in the PTEs, without actually
>> knowing about SEV.
> Ok, this sounds reasonable.
>
> The APRIORI method looks like a hack. Why is this not being handled at
> the time the page tables are being built, in DxeIpl? Couldn't we
> define a platform Page Tables library to allow a platform to somehow
> modify the page tables as they are built? Or, maybe just after? This
> would also make sure it happens before DXE runs.

Before introducing  AmdSevDxe driver, we did proposed patches to clear
the C-bit during the page table creation time. In the first patch [1],
Leo tried to  teach gcd.c to clear the C-bit from MMIO. IIRC, the main
concern was -- typically Dxecore does not do any CPU specific thing
hence we should try to find some alternative approach. In second patch
[2], Leo tried to introduce a new notify protocol to get MMIO add/remove
events. During discussion Jiewen suggested to look into adding a new
platform driver into APRIORI to avoid the need for any modifications
inside the Gcdcore - this seems workable solution which did not require
adding any CPU specific code inside the Gcd.

[1] https://lists.01.org/pipermail/edk2-devel/2017-March/008974.html
[2] https://lists.01.org/pipermail/edk2-devel/2017-April/009852.html



  reply	other threads:[~2017-05-29 21:58 UTC|newest]

Thread overview: 65+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-26 14:43 [PATCH v6 00/17] x86: Secure Encrypted Virtualization (AMD) Brijesh Singh
2017-05-26 14:43 ` [PATCH v6 01/17] UefiCpuPkg: Define AMD Memory Encryption specific CPUID and MSR Brijesh Singh
2017-05-26 14:43 ` [PATCH v6 02/17] OvmfPkg/ResetVector: Set C-bit when building initial page table Brijesh Singh
2017-06-01  8:09   ` Jordan Justen
2017-06-01 13:43     ` Brijesh Singh
2017-05-26 14:43 ` [PATCH v6 03/17] OvmfPkg: Update dsc to use IoLib from BaseIoLibIntrinsicSev.inf Brijesh Singh
2017-05-26 14:43 ` [PATCH v6 04/17] OvmfPkg/BaseMemcryptSevLib: Add SEV helper library Brijesh Singh
2017-05-26 20:54   ` Jordan Justen
2017-05-26 21:06     ` Brijesh Singh
2017-05-27  1:26       ` Yao, Jiewen
2017-05-26 14:43 ` [PATCH v6 05/17] OvmfPkg/PlatformPei: Set memory encryption PCD when SEV is enabled Brijesh Singh
2017-05-26 14:43 ` [PATCH v6 06/17] OvmfPkg: Add AmdSevDxe driver Brijesh Singh
2017-05-26 14:43 ` [PATCH v6 07/17] OvmfPkg: Introduce IoMmuAbsent Protocol GUID Brijesh Singh
2017-05-29  9:07   ` Laszlo Ersek
2017-05-26 14:43 ` [PATCH v6 08/17] OvmfPkg: Add PlatformHasIoMmuLib Brijesh Singh
2017-05-29  9:19   ` Laszlo Ersek
2017-05-26 14:43 ` [PATCH v6 09/17] OvmfPkg: Add IoMmuDxe driver Brijesh Singh
2017-05-29  9:28   ` Laszlo Ersek
2017-05-26 14:43 ` [PATCH v6 10/17] OvmfPkg/QemuFwCfgLib: Provide Pei and Dxe specific library Brijesh Singh
2017-05-26 21:49   ` Jordan Justen
2017-05-26 14:43 ` [PATCH v6 11/17] OvmfPkg/QemuFwCfgLib: Prepare for SEV support Brijesh Singh
2017-05-26 14:44 ` [PATCH v6 12/17] OvmfPkg/QemuFwCfgLib: Implement SEV internal function for SEC phase Brijesh Singh
2017-05-26 14:44 ` [PATCH v6 13/17] OvmfPkg/QemuFwCfgLib: Implement SEV internal functions for PEI phase Brijesh Singh
2017-05-26 14:44 ` [PATCH v6 14/17] OvmfPkg/QemuFwCfgLib: Implement SEV internal function for Dxe phase Brijesh Singh
2017-05-29  9:40   ` Laszlo Ersek
2017-05-26 14:44 ` [PATCH v6 15/17] OvmfPkg/QemuFwCfgLib: Add option to dynamic alloc FW_CFG_DMA Access Brijesh Singh
2017-05-26 14:44 ` [PATCH v6 16/17] OvmfPkg/QemuFwCfgLib: Add SEV support Brijesh Singh
2017-05-26 14:44 ` [PATCH v6 17/17] OvmfPkg: update PciHostBridgeDxe to use PlatformHasIoMmuLib Brijesh Singh
2017-05-29  9:47   ` Laszlo Ersek
2017-05-29 12:13     ` Laszlo Ersek
2017-05-26 21:05 ` [PATCH v6 00/17] x86: Secure Encrypted Virtualization (AMD) Jordan Justen
2017-05-29 11:16   ` Laszlo Ersek
2017-05-29 20:38     ` Jordan Justen
2017-05-29 21:59       ` Brijesh Singh [this message]
2017-06-01  7:40         ` Jordan Justen
2017-06-01  9:10           ` Laszlo Ersek
2017-06-01 13:48             ` Andrew Fish
2017-06-01 14:56               ` Laszlo Ersek
2017-06-01 15:01               ` Brijesh Singh
2017-06-01 15:37                 ` Andrew Fish
2017-06-05 21:56             ` Brijesh Singh
2017-06-06  1:12               ` Jordan Justen
2017-06-06  2:08                 ` Zeng, Star
2017-06-06  3:50                   ` Brijesh Singh
2017-06-06 14:54                     ` Yao, Jiewen
2017-06-06 15:24                       ` Andrew Fish
2017-06-06 15:43                         ` Yao, Jiewen
2017-06-06 15:54                           ` Duran, Leo
2017-06-06 18:39                             ` Laszlo Ersek
2017-06-06 18:38                           ` Laszlo Ersek
2017-06-06 18:29                       ` Laszlo Ersek
2017-06-06 18:57                         ` Duran, Leo
2017-07-05 22:31 ` Brijesh Singh
2017-07-05 23:38   ` Laszlo Ersek
2017-07-06 13:37     ` Brijesh Singh
2017-07-06 16:45   ` Jordan Justen
2017-07-06 20:11     ` Brijesh Singh
2017-07-06 20:40       ` Laszlo Ersek
2017-07-06 21:42       ` Jordan Justen
2017-07-06 21:44         ` Duran, Leo
2017-07-06 21:46         ` Andrew Fish
2017-07-06 21:49           ` Duran, Leo
2017-07-07  5:28             ` Jordan Justen
2017-07-07 18:29               ` Brijesh Singh
2017-07-07 23:10                 ` Jordan Justen

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-list from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=14301d64-9fa3-8231-42c1-52c2dcd9f96f@amd.com \
    --to=devel@edk2.groups.io \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox