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Mon, 29 May 2017 21:59:50 +0000 To: Jordan Justen <jordan.l.justen@intel.com>, Laszlo Ersek <lersek@redhat.com>, <edk2-devel@lists.01.org> CC: <Thomas.Lendacky@amd.com>, <leo.duran@amd.com>, Jeff Fan <jeff.fan@intel.com>, Liming Gao <liming.gao@intel.com>, Jiewen Yao <jiewen.yao@intel.com> References: <1495809845-32472-1-git-send-email-brijesh.singh@amd.com> <149583274037.25973.13062338567511386932@jljusten-skl> <6ecd0138-454e-6a6e-d034-beaf63466120@redhat.com> <149609029319.5770.13917390389219314003@jljusten-skl> From: Brijesh Singh <brijesh.singh@amd.com> Message-ID: <14301d64-9fa3-8231-42c1-52c2dcd9f96f@amd.com> Date: Mon, 29 May 2017 16:59:46 -0500 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.12; rv:52.0) Gecko/20100101 Thunderbird/52.1.0 MIME-Version: 1.0 In-Reply-To: <149609029319.5770.13917390389219314003@jljusten-skl> X-Originating-IP: [165.204.77.1] X-ClientProxiedBy: MWHPR14CA0017.namprd14.prod.outlook.com (10.173.227.27) To SN1PR12MB0158.namprd12.prod.outlook.com (10.162.3.145) X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PR12MB0158: X-MS-Office365-Filtering-Correlation-Id: fd4d07e5-fed5-4247-7050-08d4a6de082b X-MS-Office365-Filtering-HT: Tenant X-Microsoft-Antispam: UriScan:; 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charset="utf-8" Content-Transfer-Encoding: 7bit Content-Language: en-US On 5/29/17 3:38 PM, Jordan Justen wrote: > On 2017-05-29 04:16:15, Laszlo Ersek wrote: >> (looks like I was the one to comment as second reviewer after all :) ) >> >> On 05/26/17 23:05, Jordan Justen wrote: >>> On 2017-05-26 07:43:48, Brijesh Singh wrote: >>>> Changes since v4: >>>> - decouple IoMmu protocol implementation from AmdSevDxe into a seperate >>>> IoMmuDxe driver. And introduce a placeholder protocol to provide the >>>> dependency support for the dependent modules. >>> I think you split IoMmuDxe out from AmdSevDxe based on my feedback >>> regarding APRIORI, but I don't think this helped. >>> >>> Ideally I would like to see one driver named IoMmuDxe that is *not* in >>> APRIORI. >> There are two separate goals here: >> >> (1) Make sure that any driver that adds MMIO ranges will automatically >> add those ranges with the C bit cleared in the PTEs, without actually >> knowing about SEV. > Ok, this sounds reasonable. > > The APRIORI method looks like a hack. Why is this not being handled at > the time the page tables are being built, in DxeIpl? Couldn't we > define a platform Page Tables library to allow a platform to somehow > modify the page tables as they are built? Or, maybe just after? This > would also make sure it happens before DXE runs. Before introducing AmdSevDxe driver, we did proposed patches to clear the C-bit during the page table creation time. In the first patch [1], Leo tried to teach gcd.c to clear the C-bit from MMIO. IIRC, the main concern was -- typically Dxecore does not do any CPU specific thing hence we should try to find some alternative approach. In second patch [2], Leo tried to introduce a new notify protocol to get MMIO add/remove events. During discussion Jiewen suggested to look into adding a new platform driver into APRIORI to avoid the need for any modifications inside the Gcdcore - this seems workable solution which did not require adding any CPU specific code inside the Gcd. [1] https://lists.01.org/pipermail/edk2-devel/2017-March/008974.html [2] https://lists.01.org/pipermail/edk2-devel/2017-April/009852.html