From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by ml01.01.org (Postfix) with ESMTP id 013781A1DFF for ; Fri, 29 Jul 2016 11:15:27 -0700 (PDT) Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga103.jf.intel.com with ESMTP; 29 Jul 2016 11:15:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,440,1464678000"; d="scan'208";a="1016338993" Received: from jfan12-desk.ccr.corp.intel.com ([10.239.9.5]) by fmsmga001.fm.intel.com with ESMTP; 29 Jul 2016 11:15:26 -0700 From: Jeff Fan To: edk2-devel@ml01.01.org Cc: Michael Kinney , Feng Tian , Giri P Mudusuru , Laszlo Ersek Date: Sat, 30 Jul 2016 02:14:34 +0800 Message-Id: <1469816112-8200-9-git-send-email-jeff.fan@intel.com> X-Mailer: git-send-email 2.7.4.windows.1 In-Reply-To: <1469816112-8200-1-git-send-email-jeff.fan@intel.com> References: <1469816112-8200-1-git-send-email-jeff.fan@intel.com> Subject: [Patch v4 08/46] UefiCpuPkg/MpInitLib: Add EnableExecuteDisable in MP_CPU_EXCHANGE_INFO X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Jul 2016 18:15:28 -0000 EnableExecuteDisable in MP_CPU_EXCHANGE_INFO is used to tell AP reset vector if enable execute disable feature on APs. This feature should be enabled before CR3 is written. Cc: Michael Kinney Cc: Feng Tian Cc: Giri P Mudusuru Cc: Laszlo Ersek Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan --- UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc | 2 ++ UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm | 30 ++++++++++++++++++++++++++ UefiCpuPkg/Library/MpInitLib/MpLib.h | 1 + UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc | 4 +++- UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm | 13 +++++++++++ 5 files changed, 49 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc index 015396a..60add86 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpEqu.inc @@ -36,4 +36,6 @@ ModeOffsetLocation equ LockLocation + 20h NumApsExecutingLocation equ LockLocation + 24h CodeSegmentLocation equ LockLocation + 28h DataSegmentLocation equ LockLocation + 2Ch +EnableExecuteDisableLocation equ LockLocation + 30h +Cr3Location equ LockLocation + 3Ch diff --git a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm index 7050413..8bacb42 100644 --- a/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/Ia32/MpFuncs.nasm @@ -85,6 +85,36 @@ Flat32Start: ; protected mode entry point mov ss, dx mov esi, ebx + + mov edi, esi + add edi, EnableExecuteDisableLocation + cmp byte [edi], 0 + jz SkipEnableExecuteDisable + + ; + ; Enable IA32 PAE execute disable + ; + + mov ecx, 0xc0000080 + rdmsr + bts eax, 11 + wrmsr + + mov edi, esi + add edi, Cr3Location + mov eax, dword [edi] + mov cr3, eax + + mov eax, cr4 + bts eax, 5 + mov cr4, eax + + mov eax, cr0 + bts eax, 31 + mov cr0, eax + +SkipEnableExecuteDisable: + mov edi, esi add edi, LockLocation mov eax, NotVacantFlag diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h index 92d1dd9..28a3cd4 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -55,6 +55,7 @@ typedef struct { UINTN NumApsExecuting; UINTN CodeSegment; UINTN DataSegment; + UINTN EnableExecuteDisable; UINTN Cr3; } MP_CPU_EXCHANGE_INFO; diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc index 5aac212..d533741 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc @@ -36,6 +36,8 @@ ModeOffsetLocation equ LockLocation + 3Ch NumApsExecutingLocation equ LockLocation + 44h CodeSegmentLocation equ LockLocation + 4Ch DataSegmentLocation equ LockLocation + 54h -Cr3Location equ LockLocation + 5Ch +EnableExecuteDisableLocation equ LockLocation + 5Ch +Cr3Location equ LockLocation + 64h + ;------------------------------------------------------------------------------- diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm index 848992c..3c55ffa 100644 --- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm +++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm @@ -69,6 +69,19 @@ o32 lgdt [cs:si] mov si, IdtrLocation o32 lidt [cs:si] + mov si, EnableExecuteDisableLocation + cmp byte [si], 0 + jz SkipEnableExecuteDisableBit + + ; + ; Enable execute disable bit + ; + mov ecx, 0c0000080h ; EFER MSR number + rdmsr ; Read EFER + bts eax, 11 ; Enable Execute Disable Bit + wrmsr ; Write EFER + +SkipEnableExecuteDisableBit: mov di, DataSegmentLocation mov edi, [di] ; Save long mode DS in edi -- 2.7.4.windows.1