From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-x230.google.com (mail-wm0-x230.google.com [IPv6:2a00:1450:400c:c09::230]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id EAFA51A1DFC for ; Fri, 5 Aug 2016 07:36:02 -0700 (PDT) Received: by mail-wm0-x230.google.com with SMTP id q128so33890320wma.1 for ; Fri, 05 Aug 2016 07:36:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Q1tSepYTlax1D3Kg+rMwjk1hSuQ+SQiO2P9N8bQyh3Y=; b=emssmbARu995NoJFIKVojVkGlSkWvyZM0j3AHYvPb2AVJTWEvl37ViklLMNjHSECoG MP1Bme8sc183IWBXi/Y9/i2aCE7D2u2z87VMIjOe7mQC0CgWGBFbPuctmszYTpIbbMNM LmTGRRAWwpcubX51FyAk8vIBq7PfNRynBJbo8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Q1tSepYTlax1D3Kg+rMwjk1hSuQ+SQiO2P9N8bQyh3Y=; b=ZP3vEMJNTpqtZ1Lh9AwSCQXvxIZcEgfdw62Tcm2X2Nac9UYL2hIzJ8HiqvwQ+8uFJb P5FSHnaPEnqqjgwjpOCjGjNjs9l9y+wwTC7E2cMQcSIu3acpOGMhr+mHj2BlFrvQkY1e /S26Zx/nZivTHlQoBLpCiS/TnA6JpMKZ9wjXOVY6H4Y2CF8Ra4gxA0S9qxX0kdmeotks h+2TOHnXosr8qjLqXGvkczkUE/OJEtkN4FFSKBH7mieHpWW22wh3Wp9fnoBMeEPAsAwc Sp/vnIB7efxiLMchBYsL+wxxABUZ+mYdRBSyV6OULDyR94vurLjmL2pwahYvlYtLU7UN FiDw== X-Gm-Message-State: AEkoousXKAuP5aYaawZnMwp5Nuu5jEUexv29FfZguOc0d/RUNFE7H7letXgADNQTWp68zP22 X-Received: by 10.194.175.106 with SMTP id bz10mr71341666wjc.42.1470407760967; Fri, 05 Aug 2016 07:36:00 -0700 (PDT) Received: from localhost.localdomain (3.red-81-34-118.dynamicip.rima-tde.net. [81.34.118.3]) by smtp.gmail.com with ESMTPSA id d80sm8938479wmd.14.2016.08.05.07.35.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 05 Aug 2016 07:36:00 -0700 (PDT) From: Ard Biesheuvel To: steven.shi@intel.com, yonghong.zhu@intel.com, liming.gao@intel.com, jordan.l.justen@intel.com, edk2-devel@lists.01.org Cc: mischief@offblast.org, Ard Biesheuvel Date: Fri, 5 Aug 2016 16:35:50 +0200 Message-Id: <1470407750-28589-1-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 Subject: [PATCH v2] BaseTools X64: fold PLT relocations into simple relative references X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Aug 2016 14:36:03 -0000 For X64/GCC, we use position independent code with hidden visibility to inform the compiler that symbols references are never resolved at runtime, which removes the need for PLTs and GOTs. However, in some cases GCC has been reported to still emit PLT based relocations, which we need to handle in the ELF to PE/COFF perform by GenFw. Unlike GOT based relocations, which are non-trivial to handle since the indirections in the code can not be fixed up easily (although relocation types exist for X64 that annotate relocation targets as suitable for relaxation), PLT relocations simply point to jump targets, and we can relax such relocations by resolving them using the symbol directly rather than via a PLT entry that does nothing more than tail call the function we already know it is going to call (since all symbol references are resolved in the same module). So handle R_X86_64_PLT32 as a R_X86_64_PC32 relocation. Suggested-by: Steven Shi Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- BaseTools/Source/C/GenFw/Elf64Convert.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c index 944c94b8f8b4..708c1a1d91a7 100644 --- a/BaseTools/Source/C/GenFw/Elf64Convert.c +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c @@ -785,6 +785,17 @@ WriteSections64 ( *(INT32 *)Targ = (INT32)((INT64)(*(INT32 *)Targ) - SymShdr->sh_addr + mCoffSectionsOffset[Sym->st_shndx]); VerboseMsg ("Relocation: 0x%08X", *(UINT32*)Targ); break; + + case R_X86_64_PLT32: + // + // Treat R_X86_64_PLT32 relocations as R_X86_64_PC32: this is + // possible since we know all code symbol references resolve to + // definitions in the same module (UEFI has no shared libraries), + // and so there is never a reason to jump via a PLT entry, + // allowing us to resolve the reference using the symbol directly. + // + VerboseMsg ("Treating R_X86_64_PLT32 as R_X86_64_PC32 ..."); + /* fall through */ case R_X86_64_PC32: // // Relative relocation: Symbol - Ip + Addend @@ -935,6 +946,7 @@ WriteRelocations64 ( switch (ELF_R_TYPE(Rel->r_info)) { case R_X86_64_NONE: case R_X86_64_PC32: + case R_X86_64_PLT32: break; case R_X86_64_64: VerboseMsg ("EFI_IMAGE_REL_BASED_DIR64 Offset: 0x%08X", -- 2.7.4