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From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
To: steven.shi@intel.com, yonghong.zhu@intel.com,
	liming.gao@intel.com, edk2-devel@lists.01.org
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Subject: [PATCH] BaseTools/GccBase.lds: don't copy RELA section to PE/COFF
Date: Wed, 10 Aug 2016 10:55:30 +0200	[thread overview]
Message-ID: <1470819330-7363-1-git-send-email-ard.biesheuvel@linaro.org> (raw)

The CLANG38 toolchain creates a PIE binary at link time. This is
necessary since the LTO code generation may otherwise result in
code that cannot execute correctly when loaded above 2 GB.

PIE executables contain a RELA section consisting of dynamic
relocation entries that are intended for consumption by the loader
at runtime. For this reason, it has the SHF_ALLOC attribute set by
default, and will be identified by GenFw as a section that needs to
be copied into the PE/COFF binary, resulting in waste of space since
the PE/COFF loader does not use this data at all.

So mark the RELA section as informational: this will prevent the
linker from setting the SHF_ALLOC attribute, causing GenFw to
ignore it.

DxeCore.efi before:

    Detected 'X64' type PE/COFF image consisting of 3 sections
    Section alignment:      0x40
    File alignment:         0x40
    Section '.text' @ 0x00000240
    File offset:            0x240
    Virtual size:           0x21000
    Raw size:               0x21000
    Section '.data' @ 0x00021240
    File offset:            0x21240
    Virtual size:           0x3640
    Raw size:               0x3640
    Section '.reloc' @ 0x00024880
    File offset:            0x24880
    Virtual size:           0x280
    Raw size:               0x280

DxeCore.efi after:

    Detected 'X64' type PE/COFF image consisting of 3 sections
    Section alignment:      0x40
    File alignment:         0x40
    Section '.text' @ 0x00000240
    File offset:            0x240
    Virtual size:           0x1f440
    Raw size:               0x1f440
    Section '.data' @ 0x0001f680
    File offset:            0x1f680
    Virtual size:           0x3640
    Raw size:               0x3640
    Section '.reloc' @ 0x00022cc0
    File offset:            0x22cc0
    Virtual size:           0x280
    Raw size:               0x280

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
 BaseTools/Scripts/GccBase.lds | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/BaseTools/Scripts/GccBase.lds b/BaseTools/Scripts/GccBase.lds
index 281af8a9bd33..900848747144 100644
--- a/BaseTools/Scripts/GccBase.lds
+++ b/BaseTools/Scripts/GccBase.lds
@@ -54,7 +54,7 @@ SECTIONS {
     KEEP (*(.eh_frame))
   }
 
-  .rela ALIGN(CONSTANT(COMMONPAGESIZE)) : {
+  .rela (INFO) : {
     *(.rela .rela.*)
   }
 
-- 
2.7.4



             reply	other threads:[~2016-08-10  8:56 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-08-10  8:55 Ard Biesheuvel [this message]
2016-08-22  7:10 ` [PATCH] BaseTools/GccBase.lds: don't copy RELA section to PE/COFF Ard Biesheuvel
2016-08-22  7:22   ` Gao, Liming
2016-08-22  7:25     ` Ard Biesheuvel
2016-08-22  8:47       ` Gao, Liming
2016-08-22  8:56         ` Shi, Steven

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