* [PATCH 01/26] ArmLib: remove ArmReplaceLiveTranslationEntry() implementation
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 16:56 ` Leif Lindholm
2016-08-10 15:17 ` [PATCH 02/26] ArmPkg: add missing ArmMmuLib resolution to ArmPkg.dsc Ard Biesheuvel
` (25 subsequent siblings)
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
The function ArmReplaceLiveTranslationEntry() has been moved to
ArmMmuLib, so remove the old implementation from ArmLib.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 60 --------------------
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 4 ++
2 files changed, 4 insertions(+), 60 deletions(-)
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
index 9441f47e30ba..5cef98fd42a0 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
@@ -488,64 +488,4 @@ ASM_PFX(ArmReadCurrentEL):
mrs x0, CurrentEL
ret
-
- .macro __replace_entry, el
-
- // disable the MMU
- mrs x8, sctlr_el\el
- bic x9, x8, #CTRL_M_BIT
- msr sctlr_el\el, x9
- isb
-
- // write updated entry
- str x1, [x0]
-
- // invalidate again to get rid of stale clean cachelines that may
- // have been filled speculatively since the last invalidate
- dmb sy
- dc ivac, x0
-
- // flush the TLBs
- .if \el == 1
- tlbi vmalle1
- .else
- tlbi alle\el
- .endif
- dsb sy
-
- // re-enable the MMU
- msr sctlr_el\el, x8
- isb
- .endm
-
-//VOID
-//ArmReplaceLiveTranslationEntry (
-// IN UINT64 *Entry,
-// IN UINT64 Value
-// )
-ASM_PFX(ArmReplaceLiveTranslationEntry):
-
- // disable interrupts
- mrs x2, daif
- msr daifset, #0xf
- isb
-
- // clean and invalidate first so that we don't clobber
- // adjacent entries that are dirty in the caches
- dc civac, x0
- dsb ish
-
- EL1_OR_EL2_OR_EL3(x3)
-1:__replace_entry 1
- b 4f
-2:__replace_entry 2
- b 4f
-3:__replace_entry 3
-
-4:msr daif, x2
- ret
-
-ASM_PFX(ArmReplaceLiveTranslationEntrySize):
- .long . - ArmReplaceLiveTranslationEntry
-
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
index 7c5d205d940b..3834da7bfedd 100644
--- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
+++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
@@ -14,6 +14,8 @@
#include <AsmMacroIoLibV8.h>
+GCC_ASM_EXPORT(ArmReplaceLiveTranslationEntry)
+
.set CTRL_M_BIT, (1 << 0)
.macro __replace_entry, el
@@ -72,5 +74,7 @@ ASM_PFX(ArmReplaceLiveTranslationEntry):
4:msr daif, x2
ret
+ASM_GLOBAL ASM_PFX(ArmReplaceLiveTranslationEntrySize)
+
ASM_PFX(ArmReplaceLiveTranslationEntrySize):
.long . - ArmReplaceLiveTranslationEntry
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 01/26] ArmLib: remove ArmReplaceLiveTranslationEntry() implementation
2016-08-10 15:17 ` [PATCH 01/26] ArmLib: remove ArmReplaceLiveTranslationEntry() implementation Ard Biesheuvel
@ 2016-08-10 16:56 ` Leif Lindholm
2016-08-10 17:31 ` Ard Biesheuvel
0 siblings, 1 reply; 56+ messages in thread
From: Leif Lindholm @ 2016-08-10 16:56 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
On Wed, Aug 10, 2016 at 05:17:37PM +0200, Ard Biesheuvel wrote:
> The function ArmReplaceLiveTranslationEntry() has been moved to
> ArmMmuLib, so remove the old implementation from ArmLib.
Could you add a statement to this commit message that you're also
fixing up the export attributes for the ArmMmuLib version to prepare
for the new macros?
If you do:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 60 --------------------
> ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 4 ++
> 2 files changed, 4 insertions(+), 60 deletions(-)
>
> diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> index 9441f47e30ba..5cef98fd42a0 100644
> --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> @@ -488,64 +488,4 @@ ASM_PFX(ArmReadCurrentEL):
> mrs x0, CurrentEL
> ret
>
> -
> - .macro __replace_entry, el
> -
> - // disable the MMU
> - mrs x8, sctlr_el\el
> - bic x9, x8, #CTRL_M_BIT
> - msr sctlr_el\el, x9
> - isb
> -
> - // write updated entry
> - str x1, [x0]
> -
> - // invalidate again to get rid of stale clean cachelines that may
> - // have been filled speculatively since the last invalidate
> - dmb sy
> - dc ivac, x0
> -
> - // flush the TLBs
> - .if \el == 1
> - tlbi vmalle1
> - .else
> - tlbi alle\el
> - .endif
> - dsb sy
> -
> - // re-enable the MMU
> - msr sctlr_el\el, x8
> - isb
> - .endm
> -
> -//VOID
> -//ArmReplaceLiveTranslationEntry (
> -// IN UINT64 *Entry,
> -// IN UINT64 Value
> -// )
> -ASM_PFX(ArmReplaceLiveTranslationEntry):
> -
> - // disable interrupts
> - mrs x2, daif
> - msr daifset, #0xf
> - isb
> -
> - // clean and invalidate first so that we don't clobber
> - // adjacent entries that are dirty in the caches
> - dc civac, x0
> - dsb ish
> -
> - EL1_OR_EL2_OR_EL3(x3)
> -1:__replace_entry 1
> - b 4f
> -2:__replace_entry 2
> - b 4f
> -3:__replace_entry 3
> -
> -4:msr daif, x2
> - ret
> -
> -ASM_PFX(ArmReplaceLiveTranslationEntrySize):
> - .long . - ArmReplaceLiveTranslationEntry
> -
> ASM_FUNCTION_REMOVE_IF_UNREFERENCED
> diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
> index 7c5d205d940b..3834da7bfedd 100644
> --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
> +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
> @@ -14,6 +14,8 @@
>
> #include <AsmMacroIoLibV8.h>
>
> +GCC_ASM_EXPORT(ArmReplaceLiveTranslationEntry)
> +
> .set CTRL_M_BIT, (1 << 0)
>
> .macro __replace_entry, el
> @@ -72,5 +74,7 @@ ASM_PFX(ArmReplaceLiveTranslationEntry):
> 4:msr daif, x2
> ret
>
> +ASM_GLOBAL ASM_PFX(ArmReplaceLiveTranslationEntrySize)
> +
> ASM_PFX(ArmReplaceLiveTranslationEntrySize):
> .long . - ArmReplaceLiveTranslationEntry
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 01/26] ArmLib: remove ArmReplaceLiveTranslationEntry() implementation
2016-08-10 16:56 ` Leif Lindholm
@ 2016-08-10 17:31 ` Ard Biesheuvel
0 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 17:31 UTC (permalink / raw)
To: Leif Lindholm; +Cc: edk2-devel-01, Cohen, Eugene, Laszlo Ersek
On 10 August 2016 at 18:56, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Wed, Aug 10, 2016 at 05:17:37PM +0200, Ard Biesheuvel wrote:
>> The function ArmReplaceLiveTranslationEntry() has been moved to
>> ArmMmuLib, so remove the old implementation from ArmLib.
>
> Could you add a statement to this commit message that you're also
> fixing up the export attributes for the ArmMmuLib version to prepare
> for the new macros?
>
Actually, it is not quite that. The ArmMmuLib implementation was never
actually accessible, so the ArmLib version was still being used. That
is why it needs to be fixed in the same patch, or we'll end up with
either two or no implementations, causing breakage. I will add some
more explanation to the commit log
> If you do:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>> ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 60 --------------------
>> ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 4 ++
>> 2 files changed, 4 insertions(+), 60 deletions(-)
>>
>> diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
>> index 9441f47e30ba..5cef98fd42a0 100644
>> --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
>> +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
>> @@ -488,64 +488,4 @@ ASM_PFX(ArmReadCurrentEL):
>> mrs x0, CurrentEL
>> ret
>>
>> -
>> - .macro __replace_entry, el
>> -
>> - // disable the MMU
>> - mrs x8, sctlr_el\el
>> - bic x9, x8, #CTRL_M_BIT
>> - msr sctlr_el\el, x9
>> - isb
>> -
>> - // write updated entry
>> - str x1, [x0]
>> -
>> - // invalidate again to get rid of stale clean cachelines that may
>> - // have been filled speculatively since the last invalidate
>> - dmb sy
>> - dc ivac, x0
>> -
>> - // flush the TLBs
>> - .if \el == 1
>> - tlbi vmalle1
>> - .else
>> - tlbi alle\el
>> - .endif
>> - dsb sy
>> -
>> - // re-enable the MMU
>> - msr sctlr_el\el, x8
>> - isb
>> - .endm
>> -
>> -//VOID
>> -//ArmReplaceLiveTranslationEntry (
>> -// IN UINT64 *Entry,
>> -// IN UINT64 Value
>> -// )
>> -ASM_PFX(ArmReplaceLiveTranslationEntry):
>> -
>> - // disable interrupts
>> - mrs x2, daif
>> - msr daifset, #0xf
>> - isb
>> -
>> - // clean and invalidate first so that we don't clobber
>> - // adjacent entries that are dirty in the caches
>> - dc civac, x0
>> - dsb ish
>> -
>> - EL1_OR_EL2_OR_EL3(x3)
>> -1:__replace_entry 1
>> - b 4f
>> -2:__replace_entry 2
>> - b 4f
>> -3:__replace_entry 3
>> -
>> -4:msr daif, x2
>> - ret
>> -
>> -ASM_PFX(ArmReplaceLiveTranslationEntrySize):
>> - .long . - ArmReplaceLiveTranslationEntry
>> -
>> ASM_FUNCTION_REMOVE_IF_UNREFERENCED
>> diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
>> index 7c5d205d940b..3834da7bfedd 100644
>> --- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
>> +++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
>> @@ -14,6 +14,8 @@
>>
>> #include <AsmMacroIoLibV8.h>
>>
>> +GCC_ASM_EXPORT(ArmReplaceLiveTranslationEntry)
>> +
>> .set CTRL_M_BIT, (1 << 0)
>>
>> .macro __replace_entry, el
>> @@ -72,5 +74,7 @@ ASM_PFX(ArmReplaceLiveTranslationEntry):
>> 4:msr daif, x2
>> ret
>>
>> +ASM_GLOBAL ASM_PFX(ArmReplaceLiveTranslationEntrySize)
>> +
>> ASM_PFX(ArmReplaceLiveTranslationEntrySize):
>> .long . - ArmReplaceLiveTranslationEntry
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 02/26] ArmPkg: add missing ArmMmuLib resolution to ArmPkg.dsc
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 01/26] ArmLib: remove ArmReplaceLiveTranslationEntry() implementation Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 03/26] ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and other asm macros Ard Biesheuvel
` (24 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/ArmPkg.dsc | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc
index df5be6e21f33..7b278cdd4124 100644
--- a/ArmPkg/ArmPkg.dsc
+++ b/ArmPkg/ArmPkg.dsc
@@ -86,6 +86,8 @@ [LibraryClasses.common]
IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+ ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+
[LibraryClasses.ARM]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
@@ -145,6 +147,8 @@ [Components.common]
ArmPkg/Application/LinuxLoader/LinuxLoader.inf
+ ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
+
[Components.ARM]
ArmPkg/Library/BaseMemoryLibVstm/BaseMemoryLibVstm.inf
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 03/26] ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and other asm macros
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 01/26] ArmLib: remove ArmReplaceLiveTranslationEntry() implementation Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 02/26] ArmPkg: add missing ArmMmuLib resolution to ArmPkg.dsc Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 17:04 ` Leif Lindholm
2016-08-10 15:17 ` [PATCH 04/26] ArmPlatformPkg RVCT: drop dependency on GCC macro library Ard Biesheuvel
` (23 subsequent siblings)
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
This removes the various Mmio ASM macros that are not used anywhere in
the code, and removes some variants of LoadConstant... () that are not
used anywhere either.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Include/AsmMacroIoLib.h | 213 --------------------
ArmPkg/Include/AsmMacroIoLib.inc | 54 -----
2 files changed, 267 deletions(-)
diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h
index f94dcc619f7a..551b87803d19 100644
--- a/ArmPkg/Include/AsmMacroIoLib.h
+++ b/ArmPkg/Include/AsmMacroIoLib.h
@@ -24,88 +24,6 @@
// ldr reg, =expr does not work with current Apple tool chain. So do the work our selves
//
-// returns _Data in R0 and _Address in R1
-#define MmioWrite32(_Address, _Data) \
- ldr r1, [pc, #8] ; \
- ldr r0, [pc, #8] ; \
- str r0, [r1] ; \
- b 1f ; \
- .long (_Address) ; \
- .long (_Data) ; \
-1:
-
-// returns _Data in R0 and _Address in R1, and _OrData in r2
-#define MmioOr32(_Address, _OrData) \
- ldr r1, [pc, #16] ; \
- ldr r2, [pc, #16] ; \
- ldr r0, [r1] ; \
- orr r0, r0, r2 ; \
- str r0, [r1] ; \
- b 1f ; \
- .long (_Address) ; \
- .long (_OrData) ; \
-1:
-
-// returns _Data in R0 and _Address in R1, and _OrData in r2
-#define MmioAnd32(_Address, _AndData) \
- ldr r1, [pc, #16] ; \
- ldr r2, [pc, #16] ; \
- ldr r0, [r1] ; \
- and r0, r0, r2 ; \
- str r0, [r1] ; \
- b 1f ; \
- .long (_Address) ; \
- .long (_AndData) ; \
-1:
-
-// returns result in R0, _Address in R1, and _OrData in r2
-#define MmioAndThenOr32(_Address, _AndData, _OrData) \
- ldr r1, [pc, #24] ; \
- ldr r0, [r1] ; \
- ldr r2, [pc, #20] ; \
- and r0, r0, r2 ; \
- ldr r2, [pc, #16] ; \
- orr r0, r0, r2 ; \
- str r0, [r1] ; \
- b 1f ; \
- .long (_Address) ; \
- .long (_AndData) ; \
- .long (_OrData) ; \
-1:
-
-// returns _Data in _Reg and _Address in R1
-#define MmioWriteFromReg32(_Address, _Reg) \
- ldr r1, [pc, #4] ; \
- str _Reg, [r1] ; \
- b 1f ; \
- .long (_Address) ; \
-1:
-
-
-// returns _Data in R0 and _Address in R1
-#define MmioRead32(_Address) \
- ldr r1, [pc, #4] ; \
- ldr r0, [r1] ; \
- b 1f ; \
- .long (_Address) ; \
-1:
-
-// returns _Data in Reg and _Address in R1
-#define MmioReadToReg32(_Address, _Reg) \
- ldr r1, [pc, #4] ; \
- ldr _Reg, [r1] ; \
- b 1f ; \
- .long (_Address) ; \
-1:
-
-
-// load R0 with _Data
-#define LoadConstant(_Data) \
- ldr r0, [pc, #0] ; \
- b 1f ; \
- .long (_Data) ; \
-1:
-
// load _Reg with _Data
#define LoadConstantToReg(_Data, _Reg) \
ldr _Reg, [pc, #0] ; \
@@ -113,91 +31,8 @@
.long (_Data) ; \
1:
-// load _Reg with _Data if eq
-#define LoadConstantToRegIfEq(_Data, _Reg) \
- ldreq _Reg, [pc, #0] ; \
- b 1f ; \
- .long (_Data) ; \
-1:
-
-// Reserve a region at the top of the Primary Core stack
-// for Global variables for the XIP phase
-#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
- and Tmp, GlobalSize, #7 ; \
- rsbne Tmp, Tmp, #8 ; \
- add GlobalSize, GlobalSize, Tmp ; \
- sub sp, StackTop, GlobalSize ; \
- ; \
- mov Tmp, sp ; \
- mov GlobalSize, #0x0 ; \
-_SetPrimaryStackInitGlobals: ; \
- cmp Tmp, StackTop ; \
- beq _SetPrimaryStackEnd ; \
- str GlobalSize, [Tmp], #4 ; \
- b _SetPrimaryStackInitGlobals ; \
-_SetPrimaryStackEnd:
-
-// Initialize the Global Variable with '0'
-#define InitializePrimaryStack(GlobalSize, Tmp1) \
- and Tmp1, GlobalSize, #7 ; \
- rsbne Tmp1, Tmp1, #8 ; \
- add GlobalSize, GlobalSize, Tmp1 ; \
- ; \
- mov Tmp1, sp ; \
- sub sp, GlobalSize ; \
- mov GlobalSize, #0x0 ; \
-_InitializePrimaryStackLoop: ; \
- cmp Tmp1, sp ; \
- bls _InitializePrimaryStackEnd ; \
- str GlobalSize, [Tmp1, #-4]! ; \
- b _InitializePrimaryStackLoop ; \
-_InitializePrimaryStackEnd:
-
#elif defined (__GNUC__)
-#define MmioWrite32(Address, Data) \
- ldr r1, =Address ; \
- ldr r0, =Data ; \
- str r0, [r1]
-
-#define MmioOr32(Address, OrData) \
- ldr r1, =Address ; \
- ldr r2, =OrData ; \
- ldr r0, [r1] ; \
- orr r0, r0, r2 ; \
- str r0, [r1]
-
-#define MmioAnd32(Address, AndData) \
- ldr r1, =Address ; \
- ldr r2, =AndData ; \
- ldr r0, [r1] ; \
- and r0, r0, r2 ; \
- str r0, [r1]
-
-#define MmioAndThenOr32(Address, AndData, OrData) \
- ldr r1, =Address ; \
- ldr r0, [r1] ; \
- ldr r2, =AndData ; \
- and r0, r0, r2 ; \
- ldr r2, =OrData ; \
- orr r0, r0, r2 ; \
- str r0, [r1]
-
-#define MmioWriteFromReg32(Address, Reg) \
- ldr r1, =Address ; \
- str Reg, [r1]
-
-#define MmioRead32(Address) \
- ldr r1, =Address ; \
- ldr r0, [r1]
-
-#define MmioReadToReg32(Address, Reg) \
- ldr r1, =Address ; \
- ldr Reg, [r1]
-
-#define LoadConstant(Data) \
- ldr r0, =Data
-
#define LoadConstantToReg(Data, Reg) \
ldr Reg, =Data
@@ -209,59 +44,11 @@ _InitializePrimaryStackEnd:
// Less magic in the macros if ldr reg, =expr works
//
-// returns _Data in R0 and _Address in R1
-
-
-
-#define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data
-
-
-
-
-// returns Data in R0 and Address in R1, and OrData in r2
-#define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData
-
-
-// returns _Data in R0 and _Address in R1, and _OrData in r2
-
-
-#define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData
-
-// returns result in R0, _Address in R1, and _OrData in r2
-
-
-#define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData
-
-
-// returns _Data in _Reg and _Address in R1
-
-
-#define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg
-
-// returns _Data in R0 and _Address in R1
-
-
-#define MmioRead32(Address) MmioRead32Macro Address
-
-// returns _Data in Reg and _Address in R1
-
-
-#define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg
-
-
-// load R0 with _Data
-
-
-#define LoadConstant(Data) LoadConstantMacro Data
-
// load _Reg with _Data
#define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg
-// conditional load testing eq flag
-#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
-
#endif
#endif
diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc
index 95dc640d6fc3..c9cad5230c94 100644
--- a/ArmPkg/Include/AsmMacroIoLib.inc
+++ b/ArmPkg/Include/AsmMacroIoLib.inc
@@ -17,60 +17,6 @@
MACRO
- MmioWrite32Macro $Address, $Data
- ldr r1, = ($Address)
- ldr r0, = ($Data)
- str r0, [r1]
- MEND
-
- MACRO
- MmioOr32Macro $Address, $OrData
- ldr r1, =($Address)
- ldr r2, =($OrData)
- ldr r0, [r1]
- orr r0, r0, r2
- str r0, [r1]
- MEND
-
- MACRO
- MmioAnd32Macro $Address, $AndData
- ldr r1, =($Address)
- ldr r2, =($AndData)
- ldr r0, [r1]
- and r0, r0, r2
- str r0, [r1]
- MEND
-
- MACRO
- MmioAndThenOr32Macro $Address, $AndData, $OrData
- ldr r1, =($Address)
- ldr r0, [r1]
- ldr r2, =($AndData)
- and r0, r0, r2
- ldr r2, =($OrData)
- orr r0, r0, r2
- str r0, [r1]
- MEND
-
- MACRO
- MmioWriteFromReg32Macro $Address, $Reg
- ldr r1, =($Address)
- str $Reg, [r1]
- MEND
-
- MACRO
- MmioRead32Macro $Address
- ldr r1, =($Address)
- ldr r0, [r1]
- MEND
-
- MACRO
- MmioReadToReg32Macro $Address, $Reg
- ldr r1, =($Address)
- ldr $Reg, [r1]
- MEND
-
- MACRO
LoadConstantMacro $Data
ldr r0, =($Data)
MEND
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 03/26] ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and other asm macros
2016-08-10 15:17 ` [PATCH 03/26] ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and other asm macros Ard Biesheuvel
@ 2016-08-10 17:04 ` Leif Lindholm
2016-08-10 17:26 ` Ard Biesheuvel
0 siblings, 1 reply; 56+ messages in thread
From: Leif Lindholm @ 2016-08-10 17:04 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
On Wed, Aug 10, 2016 at 05:17:39PM +0200, Ard Biesheuvel wrote:
> This removes the various Mmio ASM macros that are not used anywhere in
> the code, and removes some variants of LoadConstant... () that are not
> used anywhere either.
If you say something about how the Mmio* functions are redundant due
to the MdePkg implementations:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> ArmPkg/Include/AsmMacroIoLib.h | 213 --------------------
> ArmPkg/Include/AsmMacroIoLib.inc | 54 -----
> 2 files changed, 267 deletions(-)
>
> diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h
> index f94dcc619f7a..551b87803d19 100644
> --- a/ArmPkg/Include/AsmMacroIoLib.h
> +++ b/ArmPkg/Include/AsmMacroIoLib.h
> @@ -24,88 +24,6 @@
> // ldr reg, =expr does not work with current Apple tool chain. So do the work our selves
> //
>
> -// returns _Data in R0 and _Address in R1
> -#define MmioWrite32(_Address, _Data) \
> - ldr r1, [pc, #8] ; \
> - ldr r0, [pc, #8] ; \
> - str r0, [r1] ; \
> - b 1f ; \
> - .long (_Address) ; \
> - .long (_Data) ; \
> -1:
> -
> -// returns _Data in R0 and _Address in R1, and _OrData in r2
> -#define MmioOr32(_Address, _OrData) \
> - ldr r1, [pc, #16] ; \
> - ldr r2, [pc, #16] ; \
> - ldr r0, [r1] ; \
> - orr r0, r0, r2 ; \
> - str r0, [r1] ; \
> - b 1f ; \
> - .long (_Address) ; \
> - .long (_OrData) ; \
> -1:
> -
> -// returns _Data in R0 and _Address in R1, and _OrData in r2
> -#define MmioAnd32(_Address, _AndData) \
> - ldr r1, [pc, #16] ; \
> - ldr r2, [pc, #16] ; \
> - ldr r0, [r1] ; \
> - and r0, r0, r2 ; \
> - str r0, [r1] ; \
> - b 1f ; \
> - .long (_Address) ; \
> - .long (_AndData) ; \
> -1:
> -
> -// returns result in R0, _Address in R1, and _OrData in r2
> -#define MmioAndThenOr32(_Address, _AndData, _OrData) \
> - ldr r1, [pc, #24] ; \
> - ldr r0, [r1] ; \
> - ldr r2, [pc, #20] ; \
> - and r0, r0, r2 ; \
> - ldr r2, [pc, #16] ; \
> - orr r0, r0, r2 ; \
> - str r0, [r1] ; \
> - b 1f ; \
> - .long (_Address) ; \
> - .long (_AndData) ; \
> - .long (_OrData) ; \
> -1:
> -
> -// returns _Data in _Reg and _Address in R1
> -#define MmioWriteFromReg32(_Address, _Reg) \
> - ldr r1, [pc, #4] ; \
> - str _Reg, [r1] ; \
> - b 1f ; \
> - .long (_Address) ; \
> -1:
> -
> -
> -// returns _Data in R0 and _Address in R1
> -#define MmioRead32(_Address) \
> - ldr r1, [pc, #4] ; \
> - ldr r0, [r1] ; \
> - b 1f ; \
> - .long (_Address) ; \
> -1:
> -
> -// returns _Data in Reg and _Address in R1
> -#define MmioReadToReg32(_Address, _Reg) \
> - ldr r1, [pc, #4] ; \
> - ldr _Reg, [r1] ; \
> - b 1f ; \
> - .long (_Address) ; \
> -1:
> -
> -
> -// load R0 with _Data
> -#define LoadConstant(_Data) \
> - ldr r0, [pc, #0] ; \
> - b 1f ; \
> - .long (_Data) ; \
> -1:
> -
> // load _Reg with _Data
> #define LoadConstantToReg(_Data, _Reg) \
> ldr _Reg, [pc, #0] ; \
> @@ -113,91 +31,8 @@
> .long (_Data) ; \
> 1:
>
> -// load _Reg with _Data if eq
> -#define LoadConstantToRegIfEq(_Data, _Reg) \
> - ldreq _Reg, [pc, #0] ; \
> - b 1f ; \
> - .long (_Data) ; \
> -1:
> -
> -// Reserve a region at the top of the Primary Core stack
> -// for Global variables for the XIP phase
> -#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
> - and Tmp, GlobalSize, #7 ; \
> - rsbne Tmp, Tmp, #8 ; \
> - add GlobalSize, GlobalSize, Tmp ; \
> - sub sp, StackTop, GlobalSize ; \
> - ; \
> - mov Tmp, sp ; \
> - mov GlobalSize, #0x0 ; \
> -_SetPrimaryStackInitGlobals: ; \
> - cmp Tmp, StackTop ; \
> - beq _SetPrimaryStackEnd ; \
> - str GlobalSize, [Tmp], #4 ; \
> - b _SetPrimaryStackInitGlobals ; \
> -_SetPrimaryStackEnd:
> -
> -// Initialize the Global Variable with '0'
> -#define InitializePrimaryStack(GlobalSize, Tmp1) \
> - and Tmp1, GlobalSize, #7 ; \
> - rsbne Tmp1, Tmp1, #8 ; \
> - add GlobalSize, GlobalSize, Tmp1 ; \
> - ; \
> - mov Tmp1, sp ; \
> - sub sp, GlobalSize ; \
> - mov GlobalSize, #0x0 ; \
> -_InitializePrimaryStackLoop: ; \
> - cmp Tmp1, sp ; \
> - bls _InitializePrimaryStackEnd ; \
> - str GlobalSize, [Tmp1, #-4]! ; \
> - b _InitializePrimaryStackLoop ; \
> -_InitializePrimaryStackEnd:
> -
> #elif defined (__GNUC__)
>
> -#define MmioWrite32(Address, Data) \
> - ldr r1, =Address ; \
> - ldr r0, =Data ; \
> - str r0, [r1]
> -
> -#define MmioOr32(Address, OrData) \
> - ldr r1, =Address ; \
> - ldr r2, =OrData ; \
> - ldr r0, [r1] ; \
> - orr r0, r0, r2 ; \
> - str r0, [r1]
> -
> -#define MmioAnd32(Address, AndData) \
> - ldr r1, =Address ; \
> - ldr r2, =AndData ; \
> - ldr r0, [r1] ; \
> - and r0, r0, r2 ; \
> - str r0, [r1]
> -
> -#define MmioAndThenOr32(Address, AndData, OrData) \
> - ldr r1, =Address ; \
> - ldr r0, [r1] ; \
> - ldr r2, =AndData ; \
> - and r0, r0, r2 ; \
> - ldr r2, =OrData ; \
> - orr r0, r0, r2 ; \
> - str r0, [r1]
> -
> -#define MmioWriteFromReg32(Address, Reg) \
> - ldr r1, =Address ; \
> - str Reg, [r1]
> -
> -#define MmioRead32(Address) \
> - ldr r1, =Address ; \
> - ldr r0, [r1]
> -
> -#define MmioReadToReg32(Address, Reg) \
> - ldr r1, =Address ; \
> - ldr Reg, [r1]
> -
> -#define LoadConstant(Data) \
> - ldr r0, =Data
> -
> #define LoadConstantToReg(Data, Reg) \
> ldr Reg, =Data
>
> @@ -209,59 +44,11 @@ _InitializePrimaryStackEnd:
> // Less magic in the macros if ldr reg, =expr works
> //
>
> -// returns _Data in R0 and _Address in R1
> -
> -
> -
> -#define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data
> -
> -
> -
> -
> -// returns Data in R0 and Address in R1, and OrData in r2
> -#define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData
> -
> -
> -// returns _Data in R0 and _Address in R1, and _OrData in r2
> -
> -
> -#define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData
> -
> -// returns result in R0, _Address in R1, and _OrData in r2
> -
> -
> -#define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData
> -
> -
> -// returns _Data in _Reg and _Address in R1
> -
> -
> -#define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg
> -
> -// returns _Data in R0 and _Address in R1
> -
> -
> -#define MmioRead32(Address) MmioRead32Macro Address
> -
> -// returns _Data in Reg and _Address in R1
> -
> -
> -#define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg
> -
> -
> -// load R0 with _Data
> -
> -
> -#define LoadConstant(Data) LoadConstantMacro Data
> -
> // load _Reg with _Data
>
>
> #define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg
>
> -// conditional load testing eq flag
> -#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
> -
> #endif
>
> #endif
> diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc
> index 95dc640d6fc3..c9cad5230c94 100644
> --- a/ArmPkg/Include/AsmMacroIoLib.inc
> +++ b/ArmPkg/Include/AsmMacroIoLib.inc
> @@ -17,60 +17,6 @@
>
>
> MACRO
> - MmioWrite32Macro $Address, $Data
> - ldr r1, = ($Address)
> - ldr r0, = ($Data)
> - str r0, [r1]
> - MEND
> -
> - MACRO
> - MmioOr32Macro $Address, $OrData
> - ldr r1, =($Address)
> - ldr r2, =($OrData)
> - ldr r0, [r1]
> - orr r0, r0, r2
> - str r0, [r1]
> - MEND
> -
> - MACRO
> - MmioAnd32Macro $Address, $AndData
> - ldr r1, =($Address)
> - ldr r2, =($AndData)
> - ldr r0, [r1]
> - and r0, r0, r2
> - str r0, [r1]
> - MEND
> -
> - MACRO
> - MmioAndThenOr32Macro $Address, $AndData, $OrData
> - ldr r1, =($Address)
> - ldr r0, [r1]
> - ldr r2, =($AndData)
> - and r0, r0, r2
> - ldr r2, =($OrData)
> - orr r0, r0, r2
> - str r0, [r1]
> - MEND
> -
> - MACRO
> - MmioWriteFromReg32Macro $Address, $Reg
> - ldr r1, =($Address)
> - str $Reg, [r1]
> - MEND
> -
> - MACRO
> - MmioRead32Macro $Address
> - ldr r1, =($Address)
> - ldr r0, [r1]
> - MEND
> -
> - MACRO
> - MmioReadToReg32Macro $Address, $Reg
> - ldr r1, =($Address)
> - ldr $Reg, [r1]
> - MEND
> -
> - MACRO
> LoadConstantMacro $Data
> ldr r0, =($Data)
> MEND
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 03/26] ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and other asm macros
2016-08-10 17:04 ` Leif Lindholm
@ 2016-08-10 17:26 ` Ard Biesheuvel
2016-08-11 8:23 ` Leif Lindholm
0 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 17:26 UTC (permalink / raw)
To: Leif Lindholm; +Cc: edk2-devel-01, Cohen, Eugene, Laszlo Ersek
On 10 August 2016 at 19:04, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> On Wed, Aug 10, 2016 at 05:17:39PM +0200, Ard Biesheuvel wrote:
>> This removes the various Mmio ASM macros that are not used anywhere in
>> the code, and removes some variants of LoadConstant... () that are not
>> used anywhere either.
>
> If you say something about how the Mmio* functions are redundant due
> to the MdePkg implementations:
No, they are not. These are asm implementations, and completely unused.
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
>> Contributed-under: TianoCore Contribution Agreement 1.0
>> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> ---
>> ArmPkg/Include/AsmMacroIoLib.h | 213 --------------------
>> ArmPkg/Include/AsmMacroIoLib.inc | 54 -----
>> 2 files changed, 267 deletions(-)
>>
>> diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h
>> index f94dcc619f7a..551b87803d19 100644
>> --- a/ArmPkg/Include/AsmMacroIoLib.h
>> +++ b/ArmPkg/Include/AsmMacroIoLib.h
>> @@ -24,88 +24,6 @@
>> // ldr reg, =expr does not work with current Apple tool chain. So do the work our selves
>> //
>>
>> -// returns _Data in R0 and _Address in R1
>> -#define MmioWrite32(_Address, _Data) \
>> - ldr r1, [pc, #8] ; \
>> - ldr r0, [pc, #8] ; \
>> - str r0, [r1] ; \
>> - b 1f ; \
>> - .long (_Address) ; \
>> - .long (_Data) ; \
>> -1:
>> -
>> -// returns _Data in R0 and _Address in R1, and _OrData in r2
>> -#define MmioOr32(_Address, _OrData) \
>> - ldr r1, [pc, #16] ; \
>> - ldr r2, [pc, #16] ; \
>> - ldr r0, [r1] ; \
>> - orr r0, r0, r2 ; \
>> - str r0, [r1] ; \
>> - b 1f ; \
>> - .long (_Address) ; \
>> - .long (_OrData) ; \
>> -1:
>> -
>> -// returns _Data in R0 and _Address in R1, and _OrData in r2
>> -#define MmioAnd32(_Address, _AndData) \
>> - ldr r1, [pc, #16] ; \
>> - ldr r2, [pc, #16] ; \
>> - ldr r0, [r1] ; \
>> - and r0, r0, r2 ; \
>> - str r0, [r1] ; \
>> - b 1f ; \
>> - .long (_Address) ; \
>> - .long (_AndData) ; \
>> -1:
>> -
>> -// returns result in R0, _Address in R1, and _OrData in r2
>> -#define MmioAndThenOr32(_Address, _AndData, _OrData) \
>> - ldr r1, [pc, #24] ; \
>> - ldr r0, [r1] ; \
>> - ldr r2, [pc, #20] ; \
>> - and r0, r0, r2 ; \
>> - ldr r2, [pc, #16] ; \
>> - orr r0, r0, r2 ; \
>> - str r0, [r1] ; \
>> - b 1f ; \
>> - .long (_Address) ; \
>> - .long (_AndData) ; \
>> - .long (_OrData) ; \
>> -1:
>> -
>> -// returns _Data in _Reg and _Address in R1
>> -#define MmioWriteFromReg32(_Address, _Reg) \
>> - ldr r1, [pc, #4] ; \
>> - str _Reg, [r1] ; \
>> - b 1f ; \
>> - .long (_Address) ; \
>> -1:
>> -
>> -
>> -// returns _Data in R0 and _Address in R1
>> -#define MmioRead32(_Address) \
>> - ldr r1, [pc, #4] ; \
>> - ldr r0, [r1] ; \
>> - b 1f ; \
>> - .long (_Address) ; \
>> -1:
>> -
>> -// returns _Data in Reg and _Address in R1
>> -#define MmioReadToReg32(_Address, _Reg) \
>> - ldr r1, [pc, #4] ; \
>> - ldr _Reg, [r1] ; \
>> - b 1f ; \
>> - .long (_Address) ; \
>> -1:
>> -
>> -
>> -// load R0 with _Data
>> -#define LoadConstant(_Data) \
>> - ldr r0, [pc, #0] ; \
>> - b 1f ; \
>> - .long (_Data) ; \
>> -1:
>> -
>> // load _Reg with _Data
>> #define LoadConstantToReg(_Data, _Reg) \
>> ldr _Reg, [pc, #0] ; \
>> @@ -113,91 +31,8 @@
>> .long (_Data) ; \
>> 1:
>>
>> -// load _Reg with _Data if eq
>> -#define LoadConstantToRegIfEq(_Data, _Reg) \
>> - ldreq _Reg, [pc, #0] ; \
>> - b 1f ; \
>> - .long (_Data) ; \
>> -1:
>> -
>> -// Reserve a region at the top of the Primary Core stack
>> -// for Global variables for the XIP phase
>> -#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
>> - and Tmp, GlobalSize, #7 ; \
>> - rsbne Tmp, Tmp, #8 ; \
>> - add GlobalSize, GlobalSize, Tmp ; \
>> - sub sp, StackTop, GlobalSize ; \
>> - ; \
>> - mov Tmp, sp ; \
>> - mov GlobalSize, #0x0 ; \
>> -_SetPrimaryStackInitGlobals: ; \
>> - cmp Tmp, StackTop ; \
>> - beq _SetPrimaryStackEnd ; \
>> - str GlobalSize, [Tmp], #4 ; \
>> - b _SetPrimaryStackInitGlobals ; \
>> -_SetPrimaryStackEnd:
>> -
>> -// Initialize the Global Variable with '0'
>> -#define InitializePrimaryStack(GlobalSize, Tmp1) \
>> - and Tmp1, GlobalSize, #7 ; \
>> - rsbne Tmp1, Tmp1, #8 ; \
>> - add GlobalSize, GlobalSize, Tmp1 ; \
>> - ; \
>> - mov Tmp1, sp ; \
>> - sub sp, GlobalSize ; \
>> - mov GlobalSize, #0x0 ; \
>> -_InitializePrimaryStackLoop: ; \
>> - cmp Tmp1, sp ; \
>> - bls _InitializePrimaryStackEnd ; \
>> - str GlobalSize, [Tmp1, #-4]! ; \
>> - b _InitializePrimaryStackLoop ; \
>> -_InitializePrimaryStackEnd:
>> -
>> #elif defined (__GNUC__)
>>
>> -#define MmioWrite32(Address, Data) \
>> - ldr r1, =Address ; \
>> - ldr r0, =Data ; \
>> - str r0, [r1]
>> -
>> -#define MmioOr32(Address, OrData) \
>> - ldr r1, =Address ; \
>> - ldr r2, =OrData ; \
>> - ldr r0, [r1] ; \
>> - orr r0, r0, r2 ; \
>> - str r0, [r1]
>> -
>> -#define MmioAnd32(Address, AndData) \
>> - ldr r1, =Address ; \
>> - ldr r2, =AndData ; \
>> - ldr r0, [r1] ; \
>> - and r0, r0, r2 ; \
>> - str r0, [r1]
>> -
>> -#define MmioAndThenOr32(Address, AndData, OrData) \
>> - ldr r1, =Address ; \
>> - ldr r0, [r1] ; \
>> - ldr r2, =AndData ; \
>> - and r0, r0, r2 ; \
>> - ldr r2, =OrData ; \
>> - orr r0, r0, r2 ; \
>> - str r0, [r1]
>> -
>> -#define MmioWriteFromReg32(Address, Reg) \
>> - ldr r1, =Address ; \
>> - str Reg, [r1]
>> -
>> -#define MmioRead32(Address) \
>> - ldr r1, =Address ; \
>> - ldr r0, [r1]
>> -
>> -#define MmioReadToReg32(Address, Reg) \
>> - ldr r1, =Address ; \
>> - ldr Reg, [r1]
>> -
>> -#define LoadConstant(Data) \
>> - ldr r0, =Data
>> -
>> #define LoadConstantToReg(Data, Reg) \
>> ldr Reg, =Data
>>
>> @@ -209,59 +44,11 @@ _InitializePrimaryStackEnd:
>> // Less magic in the macros if ldr reg, =expr works
>> //
>>
>> -// returns _Data in R0 and _Address in R1
>> -
>> -
>> -
>> -#define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data
>> -
>> -
>> -
>> -
>> -// returns Data in R0 and Address in R1, and OrData in r2
>> -#define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData
>> -
>> -
>> -// returns _Data in R0 and _Address in R1, and _OrData in r2
>> -
>> -
>> -#define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData
>> -
>> -// returns result in R0, _Address in R1, and _OrData in r2
>> -
>> -
>> -#define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData
>> -
>> -
>> -// returns _Data in _Reg and _Address in R1
>> -
>> -
>> -#define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg
>> -
>> -// returns _Data in R0 and _Address in R1
>> -
>> -
>> -#define MmioRead32(Address) MmioRead32Macro Address
>> -
>> -// returns _Data in Reg and _Address in R1
>> -
>> -
>> -#define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg
>> -
>> -
>> -// load R0 with _Data
>> -
>> -
>> -#define LoadConstant(Data) LoadConstantMacro Data
>> -
>> // load _Reg with _Data
>>
>>
>> #define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg
>>
>> -// conditional load testing eq flag
>> -#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
>> -
>> #endif
>>
>> #endif
>> diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc
>> index 95dc640d6fc3..c9cad5230c94 100644
>> --- a/ArmPkg/Include/AsmMacroIoLib.inc
>> +++ b/ArmPkg/Include/AsmMacroIoLib.inc
>> @@ -17,60 +17,6 @@
>>
>>
>> MACRO
>> - MmioWrite32Macro $Address, $Data
>> - ldr r1, = ($Address)
>> - ldr r0, = ($Data)
>> - str r0, [r1]
>> - MEND
>> -
>> - MACRO
>> - MmioOr32Macro $Address, $OrData
>> - ldr r1, =($Address)
>> - ldr r2, =($OrData)
>> - ldr r0, [r1]
>> - orr r0, r0, r2
>> - str r0, [r1]
>> - MEND
>> -
>> - MACRO
>> - MmioAnd32Macro $Address, $AndData
>> - ldr r1, =($Address)
>> - ldr r2, =($AndData)
>> - ldr r0, [r1]
>> - and r0, r0, r2
>> - str r0, [r1]
>> - MEND
>> -
>> - MACRO
>> - MmioAndThenOr32Macro $Address, $AndData, $OrData
>> - ldr r1, =($Address)
>> - ldr r0, [r1]
>> - ldr r2, =($AndData)
>> - and r0, r0, r2
>> - ldr r2, =($OrData)
>> - orr r0, r0, r2
>> - str r0, [r1]
>> - MEND
>> -
>> - MACRO
>> - MmioWriteFromReg32Macro $Address, $Reg
>> - ldr r1, =($Address)
>> - str $Reg, [r1]
>> - MEND
>> -
>> - MACRO
>> - MmioRead32Macro $Address
>> - ldr r1, =($Address)
>> - ldr r0, [r1]
>> - MEND
>> -
>> - MACRO
>> - MmioReadToReg32Macro $Address, $Reg
>> - ldr r1, =($Address)
>> - ldr $Reg, [r1]
>> - MEND
>> -
>> - MACRO
>> LoadConstantMacro $Data
>> ldr r0, =($Data)
>> MEND
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 03/26] ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and other asm macros
2016-08-10 17:26 ` Ard Biesheuvel
@ 2016-08-11 8:23 ` Leif Lindholm
0 siblings, 0 replies; 56+ messages in thread
From: Leif Lindholm @ 2016-08-11 8:23 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel-01, Cohen, Eugene, Laszlo Ersek
On Wed, Aug 10, 2016 at 07:26:46PM +0200, Ard Biesheuvel wrote:
> On 10 August 2016 at 19:04, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> > On Wed, Aug 10, 2016 at 05:17:39PM +0200, Ard Biesheuvel wrote:
> >> This removes the various Mmio ASM macros that are not used anywhere in
> >> the code, and removes some variants of LoadConstant... () that are not
> >> used anywhere either.
> >
> > If you say something about how the Mmio* functions are redundant due
> > to the MdePkg implementations:
>
> No, they are not. These are asm implementations, and completely unused.
Yes, but due to the unfortunate naming of these macros conflicting
with real functions existing in IoLib, this patch looks potentially
horrifying at first glance. Hence I would prefer that to be mentioned
in the commit message.
/
Leif
> > Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> >
> >> Contributed-under: TianoCore Contribution Agreement 1.0
> >> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> >> ---
> >> ArmPkg/Include/AsmMacroIoLib.h | 213 --------------------
> >> ArmPkg/Include/AsmMacroIoLib.inc | 54 -----
> >> 2 files changed, 267 deletions(-)
> >>
> >> diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h
> >> index f94dcc619f7a..551b87803d19 100644
> >> --- a/ArmPkg/Include/AsmMacroIoLib.h
> >> +++ b/ArmPkg/Include/AsmMacroIoLib.h
> >> @@ -24,88 +24,6 @@
> >> // ldr reg, =expr does not work with current Apple tool chain. So do the work our selves
> >> //
> >>
> >> -// returns _Data in R0 and _Address in R1
> >> -#define MmioWrite32(_Address, _Data) \
> >> - ldr r1, [pc, #8] ; \
> >> - ldr r0, [pc, #8] ; \
> >> - str r0, [r1] ; \
> >> - b 1f ; \
> >> - .long (_Address) ; \
> >> - .long (_Data) ; \
> >> -1:
> >> -
> >> -// returns _Data in R0 and _Address in R1, and _OrData in r2
> >> -#define MmioOr32(_Address, _OrData) \
> >> - ldr r1, [pc, #16] ; \
> >> - ldr r2, [pc, #16] ; \
> >> - ldr r0, [r1] ; \
> >> - orr r0, r0, r2 ; \
> >> - str r0, [r1] ; \
> >> - b 1f ; \
> >> - .long (_Address) ; \
> >> - .long (_OrData) ; \
> >> -1:
> >> -
> >> -// returns _Data in R0 and _Address in R1, and _OrData in r2
> >> -#define MmioAnd32(_Address, _AndData) \
> >> - ldr r1, [pc, #16] ; \
> >> - ldr r2, [pc, #16] ; \
> >> - ldr r0, [r1] ; \
> >> - and r0, r0, r2 ; \
> >> - str r0, [r1] ; \
> >> - b 1f ; \
> >> - .long (_Address) ; \
> >> - .long (_AndData) ; \
> >> -1:
> >> -
> >> -// returns result in R0, _Address in R1, and _OrData in r2
> >> -#define MmioAndThenOr32(_Address, _AndData, _OrData) \
> >> - ldr r1, [pc, #24] ; \
> >> - ldr r0, [r1] ; \
> >> - ldr r2, [pc, #20] ; \
> >> - and r0, r0, r2 ; \
> >> - ldr r2, [pc, #16] ; \
> >> - orr r0, r0, r2 ; \
> >> - str r0, [r1] ; \
> >> - b 1f ; \
> >> - .long (_Address) ; \
> >> - .long (_AndData) ; \
> >> - .long (_OrData) ; \
> >> -1:
> >> -
> >> -// returns _Data in _Reg and _Address in R1
> >> -#define MmioWriteFromReg32(_Address, _Reg) \
> >> - ldr r1, [pc, #4] ; \
> >> - str _Reg, [r1] ; \
> >> - b 1f ; \
> >> - .long (_Address) ; \
> >> -1:
> >> -
> >> -
> >> -// returns _Data in R0 and _Address in R1
> >> -#define MmioRead32(_Address) \
> >> - ldr r1, [pc, #4] ; \
> >> - ldr r0, [r1] ; \
> >> - b 1f ; \
> >> - .long (_Address) ; \
> >> -1:
> >> -
> >> -// returns _Data in Reg and _Address in R1
> >> -#define MmioReadToReg32(_Address, _Reg) \
> >> - ldr r1, [pc, #4] ; \
> >> - ldr _Reg, [r1] ; \
> >> - b 1f ; \
> >> - .long (_Address) ; \
> >> -1:
> >> -
> >> -
> >> -// load R0 with _Data
> >> -#define LoadConstant(_Data) \
> >> - ldr r0, [pc, #0] ; \
> >> - b 1f ; \
> >> - .long (_Data) ; \
> >> -1:
> >> -
> >> // load _Reg with _Data
> >> #define LoadConstantToReg(_Data, _Reg) \
> >> ldr _Reg, [pc, #0] ; \
> >> @@ -113,91 +31,8 @@
> >> .long (_Data) ; \
> >> 1:
> >>
> >> -// load _Reg with _Data if eq
> >> -#define LoadConstantToRegIfEq(_Data, _Reg) \
> >> - ldreq _Reg, [pc, #0] ; \
> >> - b 1f ; \
> >> - .long (_Data) ; \
> >> -1:
> >> -
> >> -// Reserve a region at the top of the Primary Core stack
> >> -// for Global variables for the XIP phase
> >> -#define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
> >> - and Tmp, GlobalSize, #7 ; \
> >> - rsbne Tmp, Tmp, #8 ; \
> >> - add GlobalSize, GlobalSize, Tmp ; \
> >> - sub sp, StackTop, GlobalSize ; \
> >> - ; \
> >> - mov Tmp, sp ; \
> >> - mov GlobalSize, #0x0 ; \
> >> -_SetPrimaryStackInitGlobals: ; \
> >> - cmp Tmp, StackTop ; \
> >> - beq _SetPrimaryStackEnd ; \
> >> - str GlobalSize, [Tmp], #4 ; \
> >> - b _SetPrimaryStackInitGlobals ; \
> >> -_SetPrimaryStackEnd:
> >> -
> >> -// Initialize the Global Variable with '0'
> >> -#define InitializePrimaryStack(GlobalSize, Tmp1) \
> >> - and Tmp1, GlobalSize, #7 ; \
> >> - rsbne Tmp1, Tmp1, #8 ; \
> >> - add GlobalSize, GlobalSize, Tmp1 ; \
> >> - ; \
> >> - mov Tmp1, sp ; \
> >> - sub sp, GlobalSize ; \
> >> - mov GlobalSize, #0x0 ; \
> >> -_InitializePrimaryStackLoop: ; \
> >> - cmp Tmp1, sp ; \
> >> - bls _InitializePrimaryStackEnd ; \
> >> - str GlobalSize, [Tmp1, #-4]! ; \
> >> - b _InitializePrimaryStackLoop ; \
> >> -_InitializePrimaryStackEnd:
> >> -
> >> #elif defined (__GNUC__)
> >>
> >> -#define MmioWrite32(Address, Data) \
> >> - ldr r1, =Address ; \
> >> - ldr r0, =Data ; \
> >> - str r0, [r1]
> >> -
> >> -#define MmioOr32(Address, OrData) \
> >> - ldr r1, =Address ; \
> >> - ldr r2, =OrData ; \
> >> - ldr r0, [r1] ; \
> >> - orr r0, r0, r2 ; \
> >> - str r0, [r1]
> >> -
> >> -#define MmioAnd32(Address, AndData) \
> >> - ldr r1, =Address ; \
> >> - ldr r2, =AndData ; \
> >> - ldr r0, [r1] ; \
> >> - and r0, r0, r2 ; \
> >> - str r0, [r1]
> >> -
> >> -#define MmioAndThenOr32(Address, AndData, OrData) \
> >> - ldr r1, =Address ; \
> >> - ldr r0, [r1] ; \
> >> - ldr r2, =AndData ; \
> >> - and r0, r0, r2 ; \
> >> - ldr r2, =OrData ; \
> >> - orr r0, r0, r2 ; \
> >> - str r0, [r1]
> >> -
> >> -#define MmioWriteFromReg32(Address, Reg) \
> >> - ldr r1, =Address ; \
> >> - str Reg, [r1]
> >> -
> >> -#define MmioRead32(Address) \
> >> - ldr r1, =Address ; \
> >> - ldr r0, [r1]
> >> -
> >> -#define MmioReadToReg32(Address, Reg) \
> >> - ldr r1, =Address ; \
> >> - ldr Reg, [r1]
> >> -
> >> -#define LoadConstant(Data) \
> >> - ldr r0, =Data
> >> -
> >> #define LoadConstantToReg(Data, Reg) \
> >> ldr Reg, =Data
> >>
> >> @@ -209,59 +44,11 @@ _InitializePrimaryStackEnd:
> >> // Less magic in the macros if ldr reg, =expr works
> >> //
> >>
> >> -// returns _Data in R0 and _Address in R1
> >> -
> >> -
> >> -
> >> -#define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data
> >> -
> >> -
> >> -
> >> -
> >> -// returns Data in R0 and Address in R1, and OrData in r2
> >> -#define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData
> >> -
> >> -
> >> -// returns _Data in R0 and _Address in R1, and _OrData in r2
> >> -
> >> -
> >> -#define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData
> >> -
> >> -// returns result in R0, _Address in R1, and _OrData in r2
> >> -
> >> -
> >> -#define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData
> >> -
> >> -
> >> -// returns _Data in _Reg and _Address in R1
> >> -
> >> -
> >> -#define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg
> >> -
> >> -// returns _Data in R0 and _Address in R1
> >> -
> >> -
> >> -#define MmioRead32(Address) MmioRead32Macro Address
> >> -
> >> -// returns _Data in Reg and _Address in R1
> >> -
> >> -
> >> -#define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg
> >> -
> >> -
> >> -// load R0 with _Data
> >> -
> >> -
> >> -#define LoadConstant(Data) LoadConstantMacro Data
> >> -
> >> // load _Reg with _Data
> >>
> >>
> >> #define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg
> >>
> >> -// conditional load testing eq flag
> >> -#define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
> >> -
> >> #endif
> >>
> >> #endif
> >> diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc
> >> index 95dc640d6fc3..c9cad5230c94 100644
> >> --- a/ArmPkg/Include/AsmMacroIoLib.inc
> >> +++ b/ArmPkg/Include/AsmMacroIoLib.inc
> >> @@ -17,60 +17,6 @@
> >>
> >>
> >> MACRO
> >> - MmioWrite32Macro $Address, $Data
> >> - ldr r1, = ($Address)
> >> - ldr r0, = ($Data)
> >> - str r0, [r1]
> >> - MEND
> >> -
> >> - MACRO
> >> - MmioOr32Macro $Address, $OrData
> >> - ldr r1, =($Address)
> >> - ldr r2, =($OrData)
> >> - ldr r0, [r1]
> >> - orr r0, r0, r2
> >> - str r0, [r1]
> >> - MEND
> >> -
> >> - MACRO
> >> - MmioAnd32Macro $Address, $AndData
> >> - ldr r1, =($Address)
> >> - ldr r2, =($AndData)
> >> - ldr r0, [r1]
> >> - and r0, r0, r2
> >> - str r0, [r1]
> >> - MEND
> >> -
> >> - MACRO
> >> - MmioAndThenOr32Macro $Address, $AndData, $OrData
> >> - ldr r1, =($Address)
> >> - ldr r0, [r1]
> >> - ldr r2, =($AndData)
> >> - and r0, r0, r2
> >> - ldr r2, =($OrData)
> >> - orr r0, r0, r2
> >> - str r0, [r1]
> >> - MEND
> >> -
> >> - MACRO
> >> - MmioWriteFromReg32Macro $Address, $Reg
> >> - ldr r1, =($Address)
> >> - str $Reg, [r1]
> >> - MEND
> >> -
> >> - MACRO
> >> - MmioRead32Macro $Address
> >> - ldr r1, =($Address)
> >> - ldr r0, [r1]
> >> - MEND
> >> -
> >> - MACRO
> >> - MmioReadToReg32Macro $Address, $Reg
> >> - ldr r1, =($Address)
> >> - ldr $Reg, [r1]
> >> - MEND
> >> -
> >> - MACRO
> >> LoadConstantMacro $Data
> >> ldr r0, =($Data)
> >> MEND
> >> --
> >> 2.7.4
> >>
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 04/26] ArmPlatformPkg RVCT: drop dependency on GCC macro library
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (2 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 03/26] ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and other asm macros Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 05/26] ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros Ard Biesheuvel
` (22 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
The RVCT .asm files include AsmMacroIoLib.h only for the definition of
LoadConstantToReg (), which makes it tedious to make change to that file
without the risk of making the RVCT assembler unhappy. So simply replace
LoadConstantToReg() with mov32, which does the right thing in all cases.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm | 7 +++--
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm | 8 +++---
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm | 12 +++------
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm | 5 ++--
ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm | 10 +++-----
ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm | 4 +--
ArmPlatformPkg/PrePeiCore/Arm/Exception.asm | 2 --
ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm | 14 +++-------
ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm | 27 ++++++++------------
9 files changed, 29 insertions(+), 60 deletions(-)
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm
index f377cf2e72c6..c035843da078 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm
@@ -11,7 +11,6 @@
//
//
-#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
#include <ArmPlatform.h>
@@ -48,7 +47,7 @@ ArmPlatformGetCorePosition FUNCTION
ArmPlatformIsPrimaryCore FUNCTION
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
+ mov32 r1, ARM_CTA15A7_SCC_CFGREG48
ldr r1, [r1]
lsr r1, #24
@@ -62,7 +61,7 @@ ArmPlatformIsPrimaryCore FUNCTION
orr r1, r1, r2
// Keep the Cluster ID and Core ID from the MPID
- LoadConstantToReg (ARM_CLUSTER_MASK :OR: ARM_CORE_MASK, r2)
+ mov32 r2, ARM_CLUSTER_MASK :OR: ARM_CORE_MASK
and r0, r0, r2
// Compare mpid and boot cpu from ARM_SCC_CFGREG48
@@ -79,7 +78,7 @@ ArmPlatformIsPrimaryCore FUNCTION
ArmPlatformGetPrimaryCoreMpId FUNCTION
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
+ mov32 r0, ARM_CTA15A7_SCC_CFGREG48
ldr r0, [r0]
lsr r0, #24
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm
index aa48ed730e16..d5afd9211357 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm
@@ -11,7 +11,6 @@
//
//
-#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
#include <AutoGen.h>
@@ -33,7 +32,7 @@
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
+ mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
ldr r0, [r0]
bx lr
ENDFUNC
@@ -43,10 +42,9 @@ ArmPlatformGetPrimaryCoreMpId FUNCTION
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
ldr r1, [r1]
cmp r0, r1
moveq r0, #1
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm
index f4ad51d36e06..66068e6595db 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm
@@ -11,7 +11,6 @@
//
//
-#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/ArmLib.h>
#include <Library/PcdLib.h>
@@ -28,9 +27,6 @@
EXPORT ArmPlatformGetPrimaryCoreMpId
EXPORT ArmPlatformGetCorePosition
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
-
AREA RTSMHelper, CODE, READONLY
ArmPlatformPeiBootAction FUNCTION
@@ -52,8 +48,7 @@ ArmGetScuBaseAddress FUNCTION
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
+ mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
bx lr
ENDFUNC
@@ -99,10 +94,9 @@ _Return
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
ldr r1, [r1]
cmp r0, r1
moveq r0, #1
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm
index 16fab1605ba1..06ce3776fce9 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm
@@ -11,7 +11,6 @@
//
//
-#include <AsmMacroIoLib.h>
#include <Base.h>
#include <Library/ArmPlatformLib.h>
#include <Drivers/PL35xSmc.h>
@@ -90,7 +89,7 @@ ArmPlatformSecBootMemoryInit
//
// Initialize PL354 SMC
//
- LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
+ mov32 r1, ARM_VE_SMC_CTRL_BASE
ldr r2, =VersatileExpressSmcConfiguration
ldr r3, =VersatileExpressSmcConfigurationEnd
blx PL35xSmcInitialize
@@ -98,7 +97,7 @@ ArmPlatformSecBootMemoryInit
//
// Page mode setup for VRAM
//
- LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
+ mov32 r2, VRAM_MOTHERBOARD_BASE
// Read current state
ldr r0, [r2, #0]
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm
index 95704c100a7a..c0f9a60dc836 100644
--- a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm
+++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm
@@ -11,7 +11,6 @@
//
//
-#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
INCLUDE AsmMacroIoLib.inc
@@ -47,8 +46,7 @@ ArmPlatformGetCorePosition FUNCTION
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
+ mov32 r0, FixedPcdGet32(PcdArmPrimaryCore)
bx lr
ENDFUNC
@@ -57,11 +55,9 @@ ArmPlatformGetPrimaryCoreMpId FUNCTION
// IN UINTN MpId
// );
ArmPlatformIsPrimaryCore FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCoreMask)
and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
- ldr r1, [r1]
+ mov32 r1, FixedPcdGet32(PcdArmPrimaryCore)
cmp r0, r1
moveq r0, #1
movne r0, #0
diff --git a/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm b/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm
index 99218cd10ade..d8ed39cf23c6 100644
--- a/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm
+++ b/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm
@@ -11,8 +11,6 @@
//
//
-#include <AsmMacroIoLib.h>
-#include <Base.h>
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
@@ -79,7 +77,7 @@ ArmPlatformStackSetPrimary FUNCTION
add r0, r0, r2
// Compute SecondaryCoresCount * SecondaryCoreStackSize
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)
+ mov32 r1, FixedPcdGet32 (PcdCoreCount)
ldr r1, [r1]
sub r1, #1
mul r3, r3, r1
diff --git a/ArmPlatformPkg/PrePeiCore/Arm/Exception.asm b/ArmPlatformPkg/PrePeiCore/Arm/Exception.asm
index de438f913ae1..4ffe2589976c 100644
--- a/ArmPlatformPkg/PrePeiCore/Arm/Exception.asm
+++ b/ArmPlatformPkg/PrePeiCore/Arm/Exception.asm
@@ -11,8 +11,6 @@
//
//
-#include <AsmMacroIoLib.h>
-#include <Base.h>
#include <AutoGen.h>
IMPORT PeiCommonExceptionEntry
diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm
index 9a8ca0b1748e..abea675828df 100644
--- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm
+++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm
@@ -11,9 +11,6 @@
//
//
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
@@ -43,9 +40,7 @@ _ModuleEntryPoint
bl ArmPlatformIsPrimaryCore
// Get the top of the primary stacks (and the base of the secondary stacks)
- LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
- add r1, r1, r2
+ mov32 r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize)
// r0 is equal to 1 if I am the primary core
cmp r0, #1
@@ -62,16 +57,15 @@ _SetupSecondaryCoreStack
add r0, r0, #1
// StackOffset = CorePos * StackSize
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
+ mov32 r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
mul r0, r0, r2
// SP = StackBase + StackOffset
add sp, r6, r0
_PrepareArguments
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
- LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
- add r2, r2, #4
- ldr r1, [r2]
+ mov32 r2, FixedPcdGet32(PcdFvBaseAddress)
+ ldr r1, [r2, #4]
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm
index a20e3fde0bda..023339841f75 100644
--- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm
+++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm
@@ -11,11 +11,7 @@
//
//
-#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
#include <AutoGen.h>
-
#include <Chipset/ArmV7.h>
INCLUDE AsmMacroIoLib.inc
@@ -59,8 +55,8 @@ _SystemMemoryEndInit
cmp r1, #0
bne _SetupStackPosition
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
+ mov32 r1, FixedPcdGet32(PcdSystemMemoryBase)
+ mov32 r2, FixedPcdGet32(PcdSystemMemorySize)
sub r2, r2, #1
add r1, r1, r2
// Update the global variable
@@ -71,13 +67,13 @@ _SetupStackPosition
// r1 = SystemMemoryTop
// Calculate Top of the Firmware Device
- LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
- LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
+ mov32 r2, FixedPcdGet32(PcdFdBaseAddress)
+ mov32 r3, FixedPcdGet32(PcdFdSize)
sub r3, r3, #1
add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
// UEFI Memory Size (stacks are allocated in this region)
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
+ mov32 r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize)
//
// Reserve the memory for the UEFI region (contain stacks on its top)
@@ -108,7 +104,7 @@ _SetupAlignedStack
_SetupOverflowStack
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
// aligned (4KB)
- LoadConstantToReg (EFI_PAGE_MASK, r9)
+ mov32 r9, EFI_PAGE_MASK
and r9, r9, r1
sub r1, r1, r9
@@ -119,22 +115,19 @@ _GetBaseUefiMemory
_GetStackBase
// r1 = The top of the Mpcore Stacks
// Stack for the primary core = PrimaryCoreStack
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
+ mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
sub r10, r1, r2
// Stack for the secondary core = Number of Cores - 1
- LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
- sub r0, r0, #1
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
- mul r1, r1, r0
+ mov32 r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
sub r10, r10, r1
// r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
mov r0, r10
mov r1, r8
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
+ mov32 r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize)
+ mov32 r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize)
bl ArmPlatformStackSet
// Is it the Primary Core ?
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 05/26] ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (3 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 04/26] ArmPlatformPkg RVCT: drop dependency on GCC macro library Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 18:26 ` Cohen, Eugene
2016-08-10 15:17 ` [PATCH 06/26] ArmVirt/PrePi: make jump to CEntryPoint relative Ard Biesheuvel
` (21 subsequent siblings)
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
This introduces the ASM_FUNC() macro to annotate function entry points
in assembler files. This allows us to add additional metadata that
marks a function entry point as a function, and allows us to emit
a .section directive for each function, which makes it possible for
the linker to drop unreferenced code.
In addition, introduce a couple of utility macros that we can use to
clean up the code.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Include/AsmMacroIoLib.h | 23 ++++++++++++++++++++
ArmPkg/Include/AsmMacroIoLibV8.h | 20 ++++++++++++++++-
2 files changed, 42 insertions(+), 1 deletion(-)
diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h
index 551b87803d19..fb73ea9a4694 100644
--- a/ArmPkg/Include/AsmMacroIoLib.h
+++ b/ArmPkg/Include/AsmMacroIoLib.h
@@ -3,6 +3,7 @@
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -51,4 +52,26 @@
#endif
+#define _ASM_FUNC(Name, Section) \
+ .global Name ; \
+ .section #Section, "ax" ; \
+ .type Name, %function ; \
+ Name:
+
+#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
+
+#define MOV32(Reg, Val) \
+ movw Reg, #(Val) & 0xffff ; \
+ movt Reg, #(Val) >> 16
+
+#define ADRL(Reg, Sym) \
+ movw Reg, #:lower16:(Sym) - (. + 16) ; \
+ movt Reg, #:upper16:(Sym) - (. + 12) ; \
+ add Reg, Reg, pc
+
+#define LDRL(Reg, Sym) \
+ movw Reg, #:lower16:(Sym) - (. + 16) ; \
+ movt Reg, #:upper16:(Sym) - (. + 12) ; \
+ ldr Reg, [pc, Reg]
+
#endif
diff --git a/ArmPkg/Include/AsmMacroIoLibV8.h b/ArmPkg/Include/AsmMacroIoLibV8.h
index 37fa255f842e..e9285f78e7d6 100644
--- a/ArmPkg/Include/AsmMacroIoLibV8.h
+++ b/ArmPkg/Include/AsmMacroIoLibV8.h
@@ -3,6 +3,7 @@
Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
+ Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
This program and the accompanying materials
are licensed and made available under the terms and conditions of the BSD License
@@ -71,5 +72,22 @@
#endif // __GNUC__
-#endif // __MACRO_IO_LIBV8_H__
+#define _ASM_FUNC(Name, Section) \
+ .global Name ; \
+ .section #Section, "ax" ; \
+ .type Name, %function ; \
+ Name:
+
+#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name)
+
+#define MOV32(Reg, Val) \
+ movz Reg, (Val) >> 16, lsl #16 ; \
+ movk Reg, (Val) & 0xffff
+#define MOV64(Reg, Val) \
+ movz Reg, (Val) >> 48, lsl #48 ; \
+ movk Reg, ((Val) >> 32) & 0xffff, lsl #32 ; \
+ movk Reg, ((Val) >> 16) & 0xffff, lsl #16 ; \
+ movk Reg, (Val) & 0xffff
+
+#endif // __MACRO_IO_LIBV8_H__
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 05/26] ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros
2016-08-10 15:17 ` [PATCH 05/26] ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros Ard Biesheuvel
@ 2016-08-10 18:26 ` Cohen, Eugene
2016-08-10 18:29 ` Ard Biesheuvel
0 siblings, 1 reply; 56+ messages in thread
From: Cohen, Eugene @ 2016-08-10 18:26 UTC (permalink / raw)
To: Ard Biesheuvel, edk2-devel@lists.01.org, leif.lindholm@linaro.org
Cc: lersek@redhat.com
Ard,
> +#define _ASM_FUNC(Name, Section) \
> + .global Name ; \
> + .section #Section, "ax" ; \
> + .type Name, %function ; \
> + Name:
> +
> +#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name),
> .text. ## Name)
Why does this work? In my experimentation the C preprocessor would collapse the stuff onto a single line (the backslash being a continuation on the preprocessor input, but preprocessor output revealed the newlines being removed), thereby violating the assembly requirement that labels appear in column 1.
Thanks for all your work on this, now I'm just trying to understand what I'm looking at!
Eugene
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 05/26] ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros
2016-08-10 18:26 ` Cohen, Eugene
@ 2016-08-10 18:29 ` Ard Biesheuvel
2016-08-10 18:48 ` Cohen, Eugene
0 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 18:29 UTC (permalink / raw)
To: Cohen, Eugene
Cc: edk2-devel@lists.01.org, leif.lindholm@linaro.org,
lersek@redhat.com
On 10 August 2016 at 20:26, Cohen, Eugene <eugene@hp.com> wrote:
> Ard,
>
>> +#define _ASM_FUNC(Name, Section) \
>> + .global Name ; \
>> + .section #Section, "ax" ; \
>> + .type Name, %function ; \
>> + Name:
>> +
>> +#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name),
>> .text. ## Name)
>
> Why does this work? In my experimentation the C preprocessor would collapse the stuff onto a single line (the backslash being a continuation on the preprocessor input, but preprocessor output revealed the newlines being removed), thereby violating the assembly requirement that labels appear in column 1.
>
I have tested this with both GNU as and Clang, and neither complains.
Is this requirement documented anywhere?
> Thanks for all your work on this, now I'm just trying to understand what I'm looking at!
>
Sure, my pleasure :-)
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 05/26] ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros
2016-08-10 18:29 ` Ard Biesheuvel
@ 2016-08-10 18:48 ` Cohen, Eugene
0 siblings, 0 replies; 56+ messages in thread
From: Cohen, Eugene @ 2016-08-10 18:48 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: edk2-devel@lists.01.org, leif.lindholm@linaro.org,
lersek@redhat.com
> > Why does this work? In my experimentation the C preprocessor
> would collapse the stuff onto a single line (the backslash being a
> continuation on the preprocessor input, but preprocessor output
> revealed the newlines being removed), thereby violating the assembly
> requirement that labels appear in column 1.
> >
>
> I have tested this with both GNU as and Clang, and neither complains.
> Is this requirement documented anywhere?
Not sure - just the dusty recesses of my mind. That and the fact that I thought I tried this already. :)
Reviewed-by: Eugene Cohen <eugene@hp.com>
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 06/26] ArmVirt/PrePi: make jump to CEntryPoint relative
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (4 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 05/26] ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 07/26] ArmVirtPkg: clean up assembly source files Ard Biesheuvel
` (20 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
The ArmVirtPkg platforms that use PrePi have no notion of boot remapped
aliases, so we can simply jump to CEntryPoint() directly rather than
via an absolute reference.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S | 7 +------
ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S | 7 +------
2 files changed, 2 insertions(+), 12 deletions(-)
diff --git a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
index d6be34541834..1fed84ed0ac3 100644
--- a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
+++ b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
@@ -27,7 +27,6 @@ GCC_ASM_IMPORT(ArmPlatformStackSet)
GCC_ASM_EXPORT(_ModuleEntryPoint)
ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
-StartupAddr: .8byte ASM_PFX(CEntryPoint)
ASM_PFX(mSystemMemoryEnd): .8byte 0
ASM_PFX(_ModuleEntryPoint):
@@ -163,15 +162,11 @@ _PrepareArguments:
mov x1, x21
mov x2, x22
- // Move sec startup address into a data register
- // Ensure we're jumping to FV version of the code (not boot remapped alias)
- ldr x4, StartupAddr
-
// Jump to PrePiCore C code
// x0 = MpId
// x1 = UefiMemoryBase
// x2 = StacksBase
- blr x4
+ bl ASM_PFX(CEntryPoint)
_NeverReturn:
b _NeverReturn
diff --git a/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S b/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S
index 3215c7d55876..a0176af91c8f 100644
--- a/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S
+++ b/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S
@@ -27,7 +27,6 @@ GCC_ASM_IMPORT(ArmPlatformStackSet)
GCC_ASM_EXPORT(_ModuleEntryPoint)
ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
-StartupAddr: .long ASM_PFX(CEntryPoint)
ASM_PFX(mSystemMemoryEnd): .quad 0
__relocs:
@@ -182,15 +181,11 @@ _PrepareArguments:
mov r1, r11
mov r2, r9
- // Move sec startup address into a data register
- // Ensure we're jumping to FV version of the code (not boot remapped alias)
- ldr r4, StartupAddr
-
// Jump to PrePiCore C code
// r0 = MpId
// r1 = UefiMemoryBase
// r2 = StacksBase
- blx r4
+ bl ASM_PFX(CEntryPoint)
_NeverReturn:
b _NeverReturn
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 07/26] ArmVirtPkg: clean up assembly source files
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (5 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 06/26] ArmVirt/PrePi: make jump to CEntryPoint relative Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 08/26] ArmPkg/ArmSmcLibNull: move to generic C implementation Ard Biesheuvel
` (19 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
This updates all assembly source files under ArmVirtPkg to mark
exported functions as ASM_FUNC(), which puts them in a separate
section, allowing the linker to prune code that is left unused.
At the same time, clean up the code to get rid of LoadConstantToReg()
instances involving symbol references, each of which emits an absolute
literal, and hence and entry in the PE/COFF .reloc table.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S | 36 +++--------
ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/ARM/RelocatableVirtHelper.S | 50 +++++----------
ArmVirtPkg/Library/ArmVirtPlatformLib/AARCH64/VirtHelper.S | 30 +++------
ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.S | 31 +++------
ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.asm | 10 +--
ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S | 36 +++--------
ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ARM/RelocatableVirtHelper.S | 47 +++++---------
ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S | 41 ++++--------
ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S | 66 ++++++--------------
9 files changed, 97 insertions(+), 250 deletions(-)
diff --git a/ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S b/ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S
index 27ad07a1a197..ec6955cf0af8 100644
--- a/ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S
+++ b/ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S
@@ -1,5 +1,6 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -12,33 +13,14 @@
#
#include <AsmMacroIoLibV8.h>
-#include <Base.h>
#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmGetPhysAddrTop)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
-
-.LArm64LinuxMagic:
- .byte 0x41, 0x52, 0x4d, 0x64
// VOID
// ArmPlatformPeiBootAction (
// VOID *DeviceTreeBaseAddress, // passed by loader in x0
// VOID *ImageBase // passed by FDF trampoline in x1
// );
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
//
// If we are booting from RAM using the Linux kernel boot protocol, x0 will
// point to the DTB image in memory. Otherwise, use the default value defined
@@ -104,20 +86,22 @@ ASM_PFX(ArmPlatformPeiBootAction):
.Lout:
ret x29
+.LArm64LinuxMagic:
+ .byte 0x41, 0x52, 0x4d, 0x64
+
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
- ldrh w0, [x0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
+ASM_FUNC(ArmPlatformIsPrimaryCore)
mov x0, #1
ret
@@ -126,7 +110,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #6
@@ -136,7 +120,7 @@ ASM_PFX(ArmPlatformGetCorePosition):
//GetPhysAddrTop (
// VOID
// );
-ASM_PFX(ArmGetPhysAddrTop):
+ASM_FUNC(ArmGetPhysAddrTop)
mrs x0, id_aa64mmfr0_el1
adr x1, .LPARanges
and x0, x0, #7
diff --git a/ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/ARM/RelocatableVirtHelper.S b/ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/ARM/RelocatableVirtHelper.S
index 097038806ecd..27af98970c16 100644
--- a/ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/ARM/RelocatableVirtHelper.S
+++ b/ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/ARM/RelocatableVirtHelper.S
@@ -1,6 +1,6 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-# Copyright (c) 2014, Linaro Limited. All rights reserved.
+# Copyright (c) 2014-2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -13,28 +13,9 @@
#
#include <AsmMacroIoLib.h>
-#include <Base.h>
#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmGetPhysAddrTop)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
-
-.LArm32LinuxMagic:
- .byte 0x18, 0x28, 0x6f, 0x01
-
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
//
// If we are booting from RAM using the Linux kernel boot protocol, r0 will
// point to the DTB image in memory. Otherwise, use the default value defined
@@ -42,7 +23,7 @@ ASM_PFX(ArmPlatformPeiBootAction):
//
teq r0, #0
bne 0f
- ldr r0, =PcdGet64 (PcdDeviceTreeInitialBaseAddress)
+ LDRL (r0, PcdGet64 (PcdDeviceTreeInitialBaseAddress))
0:mov r11, r14 // preserve LR
mov r10, r0 // preserve DTB pointer
@@ -64,8 +45,8 @@ ASM_PFX(ArmPlatformPeiBootAction):
// to the actual relocated value, and add the shift of PcdFdBaseAddress to
// PcdFvBaseAddress as well
//
- ldr r8, =PcdGet64 (PcdFdBaseAddress)
- ldr r7, =PcdGet64 (PcdFvBaseAddress)
+ ADRL (r8, PcdGet64 (PcdFdBaseAddress))
+ ADRL (r7, PcdGet64 (PcdFvBaseAddress))
ldr r6, [r8]
ldr r5, [r7]
sub r5, r5, r6
@@ -79,8 +60,8 @@ ASM_PFX(ArmPlatformPeiBootAction):
// encountered. Since we are calling a C function, use the window at the
// beginning of the FD image as a temp stack.
//
- ldr r1, =PcdGet64 (PcdSystemMemoryBase)
- ldr r2, =PcdGet64 (PcdSystemMemorySize)
+ ADRL (r1, PcdGet64 (PcdSystemMemoryBase))
+ ADRL (r2, PcdGet64 (PcdSystemMemorySize))
mov sp, r5
bl FindMemnode
teq r0, #0
@@ -91,7 +72,7 @@ ASM_PFX(ArmPlatformPeiBootAction):
// image header at the base of this image (defined in the FDF), and record the
// pointer in PcdDeviceTreeInitialBaseAddress.
//
- ldr r8, =PcdGet64 (PcdDeviceTreeInitialBaseAddress)
+ ADRL (r8, PcdGet64 (PcdDeviceTreeInitialBaseAddress))
add r9, r9, #0x40
str r9, [r8]
@@ -102,20 +83,22 @@ ASM_PFX(ArmPlatformPeiBootAction):
.Lout:
bx r11
+.LArm32LinuxMagic:
+ .byte 0x18, 0x28, 0x6f, 0x01
+
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
+ASM_FUNC(ArmPlatformIsPrimaryCore)
mov r0, #1
bx lr
@@ -124,7 +107,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #6
@@ -134,8 +117,7 @@ ASM_PFX(ArmPlatformGetCorePosition):
//GetPhysAddrTop (
// VOID
// );
-ASM_PFX(ArmGetPhysAddrTop):
+ASM_FUNC(ArmGetPhysAddrTop)
mov r0, #0x00000000
mov r1, #0x10000
bx lr
-
diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/AARCH64/VirtHelper.S b/ArmVirtPkg/Library/ArmVirtPlatformLib/AARCH64/VirtHelper.S
index 14200fc17b3e..1d8fe25928d8 100644
--- a/ArmVirtPkg/Library/ArmVirtPlatformLib/AARCH64/VirtHelper.S
+++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/AARCH64/VirtHelper.S
@@ -1,5 +1,6 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -12,41 +13,24 @@
#
#include <AsmMacroIoLibV8.h>
-#include <Base.h>
#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmGetPhysAddrTop)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
-
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
ret
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
- ldrh w0, [x0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
+ASM_FUNC(ArmPlatformIsPrimaryCore)
mov x0, #1
ret
@@ -55,7 +39,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #6
@@ -65,7 +49,7 @@ ASM_PFX(ArmPlatformGetCorePosition):
//GetPhysAddrTop (
// VOID
// );
-ASM_PFX(ArmGetPhysAddrTop):
+ASM_FUNC(ArmGetPhysAddrTop)
mrs x0, id_aa64mmfr0_el1
adr x1, .LPARanges
and x0, x0, #7
diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.S b/ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.S
index 255f99598740..4a4db3721072 100644
--- a/ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.S
+++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.S
@@ -1,6 +1,6 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-# Copyright (c) 2014, Linaro Limited. All rights reserved.
+# Copyright (c) 2014-2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -13,41 +13,24 @@
#
#include <AsmMacroIoLib.h>
-#include <Base.h>
#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmGetPhysAddrTop)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
-
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
bx lr
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
+ASM_FUNC(ArmPlatformIsPrimaryCore)
mov r0, #1
bx lr
@@ -56,7 +39,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #6
@@ -66,7 +49,7 @@ ASM_PFX(ArmPlatformGetCorePosition):
//GetPhysAddrTop (
// VOID
// );
-ASM_PFX(ArmGetPhysAddrTop):
+ASM_FUNC(ArmGetPhysAddrTop)
mov r0, #0x00000000
mov r1, #0x10000
bx lr
diff --git a/ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.asm b/ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.asm
index 7882e63217fc..b476516f2115 100644
--- a/ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.asm
+++ b/ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.asm
@@ -11,10 +11,7 @@
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
//
-#include <AsmMacroIoLib.h>
-#include <Base.h>
#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
#include <AutoGen.h>
INCLUDE AsmMacroIoLib.inc
@@ -25,10 +22,6 @@
EXPORT ArmPlatformGetCorePosition
EXPORT ArmGetPhysAddrTop
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCore
- IMPORT _gPcd_FixedAtBuild_PcdArmPrimaryCoreMask
- IMPORT _gPcd_FixedAtBuild_PcdCoreCount
-
AREA VirtHelper, CODE, READONLY
ArmPlatformPeiBootAction FUNCTION
@@ -40,8 +33,7 @@ ArmPlatformPeiBootAction FUNCTION
// VOID
// );
ArmPlatformGetPrimaryCoreMpId FUNCTION
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
+ MOV32 r0, FixedPcdGet32 (PcdArmPrimaryCore)
bx lr
ENDFUNC
diff --git a/ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S b/ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S
index 940bcb2d257a..ce886378eae6 100644
--- a/ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S
+++ b/ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S
@@ -1,5 +1,6 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -12,33 +13,14 @@
#
#include <AsmMacroIoLibV8.h>
-#include <Base.h>
#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmGetPhysAddrTop)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
-
-.LArm64LinuxMagic:
- .byte 0x41, 0x52, 0x4d, 0x64
// VOID
// ArmPlatformPeiBootAction (
// VOID *DeviceTreeBaseAddress, // passed by loader in x0
// VOID *ImageBase // passed by FDF trampoline in x1
// );
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
mov x29, x30 // preserve LR
mov x28, x0 // preserve DTB pointer
mov x27, x1 // preserve base of image pointer
@@ -103,20 +85,22 @@ ASM_PFX(ArmPlatformPeiBootAction):
.Lout:
ret x29
+.LArm64LinuxMagic:
+ .byte 0x41, 0x52, 0x4d, 0x64
+
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
- ldrh w0, [x0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
+ASM_FUNC(ArmPlatformIsPrimaryCore)
mov x0, #1
ret
@@ -125,7 +109,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #6
@@ -135,7 +119,7 @@ ASM_PFX(ArmPlatformGetCorePosition):
//GetPhysAddrTop (
// VOID
// );
-ASM_PFX(ArmGetPhysAddrTop):
+ASM_FUNC(ArmGetPhysAddrTop)
mrs x0, id_aa64mmfr0_el1
adr x1, .LPARanges
and x0, x0, #7
diff --git a/ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ARM/RelocatableVirtHelper.S b/ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ARM/RelocatableVirtHelper.S
index 539426f36f50..f264fa1cf731 100644
--- a/ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ARM/RelocatableVirtHelper.S
+++ b/ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ARM/RelocatableVirtHelper.S
@@ -1,6 +1,6 @@
#
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-# Copyright (c) 2014, Linaro Limited. All rights reserved.
+# Copyright (c) 2014-2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -13,28 +13,9 @@
#
#include <AsmMacroIoLib.h>
-#include <Base.h>
#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmGetPhysAddrTop)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
-
-.LArm32LinuxMagic:
- .byte 0x18, 0x28, 0x6f, 0x01
-
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
mov r11, r14 // preserve LR
mov r10, r0 // preserve DTB pointer
mov r9, r1 // preserve base of image pointer
@@ -63,8 +44,8 @@ ASM_PFX(ArmPlatformPeiBootAction):
// to the actual relocated value, and add the shift of PcdFdBaseAddress to
// PcdFvBaseAddress as well
//
- ldr r8, =PcdGet64 (PcdFdBaseAddress)
- ldr r7, =PcdGet64 (PcdFvBaseAddress)
+ ADRL (r8, PcdGet64 (PcdFdBaseAddress))
+ ADRL (r7, PcdGet64 (PcdFvBaseAddress))
ldr r6, [r8]
ldr r5, [r7]
sub r5, r5, r6
@@ -78,8 +59,8 @@ ASM_PFX(ArmPlatformPeiBootAction):
// encountered. Since we are calling a C function, use the window at the
// beginning of the FD image as a temp stack.
//
- ldr r1, =PcdGet64 (PcdSystemMemoryBase)
- ldr r2, =PcdGet64 (PcdSystemMemorySize)
+ ADRL (r1, PcdGet64 (PcdSystemMemoryBase))
+ ADRL (r2, PcdGet64 (PcdSystemMemorySize))
mov sp, r5
bl FindMemnode
teq r0, #0
@@ -90,7 +71,7 @@ ASM_PFX(ArmPlatformPeiBootAction):
// image header at the base of this image (defined in the FDF), and record the
// pointer in PcdDeviceTreeInitialBaseAddress.
//
- ldr r8, =PcdGet64 (PcdDeviceTreeInitialBaseAddress)
+ ADRL (r8, PcdGet64 (PcdDeviceTreeInitialBaseAddress))
add r9, r9, #0x40
str r9, [r8]
@@ -101,20 +82,22 @@ ASM_PFX(ArmPlatformPeiBootAction):
.Lout:
bx r11
+.LArm32LinuxMagic:
+ .byte 0x18, 0x28, 0x6f, 0x01
+
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
+ASM_FUNC(ArmPlatformIsPrimaryCore)
mov r0, #1
bx lr
@@ -123,7 +106,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #6
@@ -133,7 +116,7 @@ ASM_PFX(ArmPlatformGetCorePosition):
//GetPhysAddrTop (
// VOID
// );
-ASM_PFX(ArmGetPhysAddrTop):
+ASM_FUNC(ArmGetPhysAddrTop)
mov r0, #0x00000000
mov r1, #0x10000
bx lr
diff --git a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
index 1fed84ed0ac3..9c040b17f253 100644
--- a/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
+++ b/ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S
@@ -1,6 +1,6 @@
//
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-// Copyright (c) 2015, Linaro Limited. All rights reserved.
+// Copyright (c) 2015-2016, Linaro Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -13,23 +13,10 @@
//
#include <AsmMacroIoLibV8.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-
-.text
-.align 3
-
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_IMPORT(ArmReadMpidr)
-GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
-GCC_ASM_IMPORT(ArmPlatformStackSet)
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
-ASM_PFX(mSystemMemoryEnd): .8byte 0
+ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
-ASM_PFX(_ModuleEntryPoint):
+ASM_FUNC(_ModuleEntryPoint)
//
// We are built as a ET_DYN PIE executable, so we need to process all
// relative relocations regardless of whether or not we are executing from
@@ -86,12 +73,11 @@ _SetupStackPosition:
// Calculate Top of the Firmware Device
ldr x2, PcdGet64 (PcdFdBaseAddress)
- ldr w3, PcdGet32 (PcdFdSize)
- sub x3, x3, #1
+ MOV32 (w3, FixedPcdGet32 (PcdFdSize) - 1)
add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
// UEFI Memory Size (stacks are allocated in this region)
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), x4)
+ MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
//
// Reserve the memory for the UEFI region (contain stacks on its top)
@@ -122,9 +108,7 @@ _SetupAlignedStack:
_SetupOverflowStack:
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
// aligned (4KB)
- LoadConstantToReg (EFI_PAGE_MASK, x21)
- and x21, x21, x1
- sub x1, x1, x21
+ and x1, x1, ~EFI_PAGE_MASK
_GetBaseUefiMemory:
// Calculate the Base of the UEFI Memory
@@ -133,22 +117,19 @@ _GetBaseUefiMemory:
_GetStackBase:
// r1 = The top of the Mpcore Stacks
// Stack for the primary core = PrimaryCoreStack
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
+ MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
sub x22, x1, x2
// Stack for the secondary core = Number of Cores - 1
- LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
- sub x0, x0, #1
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
- mul x1, x1, x0
+ MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
sub x22, x22, x1
// x22 = The base of the MpCore Stacks (primary stack & secondary stacks)
mov x0, x22
mov x1, x20
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
+ MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
+ MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
bl ASM_PFX(ArmPlatformStackSet)
// Is it the Primary Core ?
@@ -170,3 +151,5 @@ _PrepareArguments:
_NeverReturn:
b _NeverReturn
+
+ASM_PFX(mSystemMemoryEnd): .8byte 0
diff --git a/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S b/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S
index a0176af91c8f..e03aeefbb003 100644
--- a/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S
+++ b/ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S
@@ -1,6 +1,6 @@
//
// Copyright (c) 2011-2013, ARM Limited. All rights reserved.
-// Copyright (c) 2015, Linaro Limited. All rights reserved.
+// Copyright (c) 2015-2016, Linaro Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -13,41 +13,18 @@
//
#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-
-.text
-.align 3
-
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_IMPORT(ArmReadMpidr)
-GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
-GCC_ASM_IMPORT(ArmPlatformStackSet)
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
-
-ASM_PFX(mSystemMemoryEnd): .quad 0
-__relocs:
- .long __reloc_base - __relocs
- .long __reloc_start - __relocs
- .long __reloc_end - __relocs
+ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
-ASM_PFX(_ModuleEntryPoint):
+ASM_FUNC(_ModuleEntryPoint)
//
// We are built as a ET_DYN PIE executable, so we need to process all
// relative relocations if we are executing from a different offset than we
// were linked at. This is only possible if we are running from RAM.
//
-
- adr r12, __relocs
- ldrd r4, r5, [r12]
- ldr r6, [r12, #8]
-
- add r4, r4, r12
- add r5, r5, r12
- add r6, r6, r12
+ ADRL (r4, __reloc_base)
+ ADRL (r5, __reloc_start)
+ ADRL (r6, __reloc_end)
.Lreloc_loop:
cmp r5, r6
@@ -85,9 +62,8 @@ ASM_PFX(_ModuleEntryPoint):
// at the top of the DRAM)
_SetupStackPosition:
// Compute Top of System Memory
- ldr r12, =PcdGet64 (PcdSystemMemoryBase)
- ldr r1, [r12]
- ldr r12, =PcdGet64 (PcdSystemMemorySize)
+ LDRL (r1, PcdGet64 (PcdSystemMemoryBase))
+ ADRL (r12, PcdGet64 (PcdSystemMemorySize))
ldrd r2, r3, [r12]
// calculate the top of memory, and record it in mSystemMemoryEnd
@@ -103,14 +79,12 @@ _SetupStackPosition:
moveq r1, r2
// Calculate Top of the Firmware Device
- ldr r12, =PcdGet64 (PcdFdBaseAddress)
- ldr r2, [r12]
- ldr r3, =FixedPcdGet32 (PcdFdSize)
- sub r3, r3, #1
+ LDRL (r2, PcdGet64 (PcdFdBaseAddress))
+ MOV32 (r3, FixedPcdGet32 (PcdFdSize) - 1)
add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
// UEFI Memory Size (stacks are allocated in this region)
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
+ MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
//
// Reserve the memory for the UEFI region (contain stacks on its top)
@@ -141,9 +115,8 @@ _SetupAlignedStack:
_SetupOverflowStack:
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
// aligned (4KB)
- LoadConstantToReg (EFI_PAGE_MASK, r11)
- and r11, r11, r1
- sub r1, r1, r11
+ MOV32 (r11, (~EFI_PAGE_MASK) & 0xffffffff)
+ and r1, r1, r11
_GetBaseUefiMemory:
// Calculate the Base of the UEFI Memory
@@ -152,22 +125,19 @@ _GetBaseUefiMemory:
_GetStackBase:
// r1 = The top of the Mpcore Stacks
// Stack for the primary core = PrimaryCoreStack
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
+ MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
sub r9, r1, r2
// Stack for the secondary core = Number of Cores - 1
- LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
- sub r0, r0, #1
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
- mul r1, r1, r0
+ MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
sub r9, r9, r1
// r9 = The base of the MpCore Stacks (primary stack & secondary stacks)
mov r0, r9
mov r1, r10
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
+ MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
+ MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
bl ASM_PFX(ArmPlatformStackSet)
// Is it the Primary Core ?
@@ -189,3 +159,5 @@ _PrepareArguments:
_NeverReturn:
b _NeverReturn
+
+ASM_PFX(mSystemMemoryEnd): .quad 0
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 08/26] ArmPkg/ArmSmcLibNull: move to generic C implementation
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (6 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 07/26] ArmVirtPkg: clean up assembly source files Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 09/26] ArmPkg/ArmCpuLib: switch to ASM_FUNC() asm macro Ard Biesheuvel
` (18 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
The C language is powerful enough to implement a function that does
absolutely nothing, so there is no need to resort to implementations
in assembler for various toolchains/architectures.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.S | 20 ----------
ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.asm | 20 ----------
ArmPkg/Library/ArmSmcLibNull/{AArch64/ArmSmcNull.S => ArmSmcLibNull.c} | 42 ++++++++++----------
ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf | 8 +---
4 files changed, 24 insertions(+), 66 deletions(-)
diff --git a/ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.S b/ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.S
deleted file mode 100644
index 9eaefd30cff4..000000000000
--- a/ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.S
+++ /dev/null
@@ -1,20 +0,0 @@
-//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmCallSmc)
-
-ASM_PFX(ArmCallSmc):
- bx lr
diff --git a/ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.asm b/ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.asm
deleted file mode 100644
index 3dcb25fa22f6..000000000000
--- a/ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.asm
+++ /dev/null
@@ -1,20 +0,0 @@
-//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-
- INCLUDE AsmMacroExport.inc
-
- RVCT_ASM_EXPORT ArmCallSmc
- bx lr
-
- END
diff --git a/ArmPkg/Library/ArmSmcLibNull/AArch64/ArmSmcNull.S b/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c
similarity index 73%
rename from ArmPkg/Library/ArmSmcLibNull/AArch64/ArmSmcNull.S
rename to ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c
index a6ef0e04da82..e5d4e511330c 100644
--- a/ArmPkg/Library/ArmSmcLibNull/AArch64/ArmSmcNull.S
+++ b/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c
@@ -1,20 +1,22 @@
-//
-// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmCallSmc)
-
-ASM_PFX(ArmCallSmc):
- ret
+//
+// Copyright (c) 2016, Linaro Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+#include <Base.h>
+#include <Library/ArmSmcLib.h>
+
+VOID
+ArmCallSmc (
+ IN OUT ARM_SMC_ARGS *Args
+ )
+{
+}
diff --git a/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf b/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf
index 6d75c28afbdd..db15a5f8bbb3 100644
--- a/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf
+++ b/ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf
@@ -22,12 +22,8 @@ [Defines]
VERSION_STRING = 1.0
LIBRARY_CLASS = ArmSmcLib
-[Sources.ARM]
- Arm/ArmSmcNull.asm | RVCT
- Arm/ArmSmcNull.S | GCC
-
-[Sources.AARCH64]
- AArch64/ArmSmcNull.S
+[Sources]
+ ArmSmcLibNull.c
[Packages]
MdePkg/MdePkg.dec
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 09/26] ArmPkg/ArmCpuLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (7 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 08/26] ArmPkg/ArmSmcLibNull: move to generic C implementation Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 10/26] ArmPkg/ArmGicV3: " Ard Biesheuvel
` (17 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S | 9 ++-------
ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | 9 +--------
2 files changed, 3 insertions(+), 15 deletions(-)
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S
index e5fbc86bc1c4..ba3d48f11f6d 100644
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S
@@ -14,16 +14,11 @@
#include <AsmMacroIoLibV8.h>
-.text
-.align 3
-GCC_ASM_EXPORT (ArmReadCpuExCr)
-GCC_ASM_EXPORT (ArmWriteCpuExCr)
-
-ASM_PFX(ArmReadCpuExCr):
+ASM_FUNC(ArmReadCpuExCr)
mrs x0, S3_1_c15_c2_1
ret
-ASM_PFX(ArmWriteCpuExCr):
+ASM_FUNC(ArmWriteCpuExCr)
msr S3_1_c15_c2_1, x0
dsb sy
isb
diff --git a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S
index 5db586192206..365d57d7e8bd 100644
--- a/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S
+++ b/ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S
@@ -12,17 +12,10 @@
//
#include <AsmMacroIoLib.h>
-#include <Library/ArmCpuLib.h>
-#include <Chipset/ArmCortexA9.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmGetScuBaseAddress)
// IN None
// OUT r0 = SCU Base Address
-ASM_PFX(ArmGetScuBaseAddress):
+ASM_FUNC(ArmGetScuBaseAddress)
// Read Configuration Base Address Register. ArmCBar cannot be called to get
// the Configuration BAR as a stack is not necessary setup. The SCU is at the
// offset 0x0000 from the Private Memory Region.
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 10/26] ArmPkg/ArmGicV3: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (8 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 09/26] ArmPkg/ArmCpuLib: switch to ASM_FUNC() asm macro Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 11/26] ArmPkg/ArmHvcLib: " Ard Biesheuvel
` (16 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S | 28 ++++++--------------
ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S | 28 ++++++--------------
2 files changed, 16 insertions(+), 40 deletions(-)
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S b/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S
index f1c227f2c421..a4e0a4170a03 100644
--- a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S
+++ b/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S
@@ -32,24 +32,12 @@
#endif
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmGicV3GetControlSystemRegisterEnable)
-GCC_ASM_EXPORT(ArmGicV3SetControlSystemRegisterEnable)
-GCC_ASM_EXPORT(ArmGicV3EnableInterruptInterface)
-GCC_ASM_EXPORT(ArmGicV3DisableInterruptInterface)
-GCC_ASM_EXPORT(ArmGicV3EndOfInterrupt)
-GCC_ASM_EXPORT(ArmGicV3AcknowledgeInterrupt)
-GCC_ASM_EXPORT(ArmGicV3SetPriorityMask)
-GCC_ASM_EXPORT(ArmGicV3SetBinaryPointer)
-
//UINT32
//EFIAPI
//ArmGicV3GetControlSystemRegisterEnable (
// VOID
// );
-ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
+ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, ICC_SRE_EL1
b 4f
@@ -63,7 +51,7 @@ ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
//ArmGicV3SetControlSystemRegisterEnable (
// IN UINT32 ControlSystemRegisterEnable
// );
-ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
+ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
EL1_OR_EL2_OR_EL3(x1)
1: msr ICC_SRE_EL1, x0
b 4f
@@ -77,7 +65,7 @@ ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
//ArmGicV3EnableInterruptInterface (
// VOID
// );
-ASM_PFX(ArmGicV3EnableInterruptInterface):
+ASM_FUNC(ArmGicV3EnableInterruptInterface)
mov x0, #1
msr ICC_IGRPEN1_EL1, x0
ret
@@ -86,7 +74,7 @@ ASM_PFX(ArmGicV3EnableInterruptInterface):
//ArmGicV3DisableInterruptInterface (
// VOID
// );
-ASM_PFX(ArmGicV3DisableInterruptInterface):
+ASM_FUNC(ArmGicV3DisableInterruptInterface)
mov x0, #0
msr ICC_IGRPEN1_EL1, x0
ret
@@ -95,7 +83,7 @@ ASM_PFX(ArmGicV3DisableInterruptInterface):
//ArmGicV3EndOfInterrupt (
// IN UINTN InterruptId
// );
-ASM_PFX(ArmGicV3EndOfInterrupt):
+ASM_FUNC(ArmGicV3EndOfInterrupt)
msr ICC_EOIR1_EL1, x0
ret
@@ -103,7 +91,7 @@ ASM_PFX(ArmGicV3EndOfInterrupt):
//ArmGicV3AcknowledgeInterrupt (
// VOID
// );
-ASM_PFX(ArmGicV3AcknowledgeInterrupt):
+ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
mrs x0, ICC_IAR1_EL1
ret
@@ -111,7 +99,7 @@ ASM_PFX(ArmGicV3AcknowledgeInterrupt):
//ArmGicV3SetPriorityMask (
// IN UINTN Priority
// );
-ASM_PFX(ArmGicV3SetPriorityMask):
+ASM_FUNC(ArmGicV3SetPriorityMask)
msr ICC_PMR_EL1, x0
ret
@@ -119,6 +107,6 @@ ASM_PFX(ArmGicV3SetPriorityMask):
//ArmGicV3SetBinaryPointer (
// IN UINTN BinaryPoint
// );
-ASM_PFX(ArmGicV3SetBinaryPointer):
+ASM_FUNC(ArmGicV3SetBinaryPointer)
msr ICC_BPR1_EL1, x0
ret
diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S
index af14b91b9cfb..a72f3c865163 100644
--- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S
+++ b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S
@@ -16,24 +16,12 @@
// For the moment we assume this will run in SVC mode on ARMv7
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmGicV3GetControlSystemRegisterEnable)
-GCC_ASM_EXPORT(ArmGicV3SetControlSystemRegisterEnable)
-GCC_ASM_EXPORT(ArmGicV3EnableInterruptInterface)
-GCC_ASM_EXPORT(ArmGicV3DisableInterruptInterface)
-GCC_ASM_EXPORT(ArmGicV3EndOfInterrupt)
-GCC_ASM_EXPORT(ArmGicV3AcknowledgeInterrupt)
-GCC_ASM_EXPORT(ArmGicV3SetPriorityMask)
-GCC_ASM_EXPORT(ArmGicV3SetBinaryPointer)
-
//UINT32
//EFIAPI
//ArmGicGetControlSystemRegisterEnable (
// VOID
// );
-ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
+ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
mrc p15, 0, r0, c12, c12, 5 // ICC_SRE
bx lr
@@ -42,7 +30,7 @@ ASM_PFX(ArmGicV3GetControlSystemRegisterEnable):
//ArmGicSetControlSystemRegisterEnable (
// IN UINT32 ControlSystemRegisterEnable
// );
-ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
+ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
mcr p15, 0, r0, c12, c12, 5 // ICC_SRE
isb
bx lr
@@ -51,7 +39,7 @@ ASM_PFX(ArmGicV3SetControlSystemRegisterEnable):
//ArmGicV3EnableInterruptInterface (
// VOID
// );
-ASM_PFX(ArmGicV3EnableInterruptInterface):
+ASM_FUNC(ArmGicV3EnableInterruptInterface)
mov r0, #1
mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
bx lr
@@ -60,7 +48,7 @@ ASM_PFX(ArmGicV3EnableInterruptInterface):
//ArmGicV3DisableInterruptInterface (
// VOID
// );
-ASM_PFX(ArmGicV3DisableInterruptInterface):
+ASM_FUNC(ArmGicV3DisableInterruptInterface)
mov r0, #0
mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1
bx lr
@@ -69,7 +57,7 @@ ASM_PFX(ArmGicV3DisableInterruptInterface):
//ArmGicV3EndOfInterrupt (
// IN UINTN InterruptId
// );
-ASM_PFX(ArmGicV3EndOfInterrupt):
+ASM_FUNC(ArmGicV3EndOfInterrupt)
mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1
bx lr
@@ -77,7 +65,7 @@ ASM_PFX(ArmGicV3EndOfInterrupt):
//ArmGicV3AcknowledgeInterrupt (
// VOID
// );
-ASM_PFX(ArmGicV3AcknowledgeInterrupt):
+ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1
bx lr
@@ -85,7 +73,7 @@ ASM_PFX(ArmGicV3AcknowledgeInterrupt):
//ArmGicV3SetPriorityMask (
// IN UINTN Priority
// );
-ASM_PFX(ArmGicV3SetPriorityMask):
+ASM_FUNC(ArmGicV3SetPriorityMask)
mcr p15, 0, r0, c4, c6, 0 //ICC_PMR
bx lr
@@ -93,6 +81,6 @@ ASM_PFX(ArmGicV3SetPriorityMask):
//ArmGicV3SetBinaryPointer (
// IN UINTN BinaryPoint
// );
-ASM_PFX(ArmGicV3SetBinaryPointer):
+ASM_FUNC(ArmGicV3SetBinaryPointer)
mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1
bx lr
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 11/26] ArmPkg/ArmHvcLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (9 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 10/26] ArmPkg/ArmGicV3: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 12/26] ArmPkg/ArmLib: " Ard Biesheuvel
` (15 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S | 9 +++------
ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S | 10 ++++------
2 files changed, 7 insertions(+), 12 deletions(-)
diff --git a/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S b/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S
index 99a1d21ce7f1..e9140a0a9bba 100644
--- a/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S
+++ b/ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S
@@ -1,6 +1,6 @@
//
// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-// Copyright (c) 2014, Linaro Limited. All rights reserved.
+// Copyright (c) 2014-2016, Linaro Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -12,12 +12,9 @@
//
//
-.text
-.align 3
+#include <AsmMacroIoLibV8.h>
-GCC_ASM_EXPORT(ArmCallHvc)
-
-ASM_PFX(ArmCallHvc):
+ASM_FUNC(ArmCallHvc)
// Push x0 on the stack - The stack must always be quad-word aligned
str x0, [sp, #-16]!
diff --git a/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S b/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S
index 25ceb6a7d8db..be4693796f32 100644
--- a/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S
+++ b/ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S
@@ -1,6 +1,6 @@
//
// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
-// Copyright (c) 2014, Linaro Limited. All rights reserved.
+// Copyright (c) 2014-2016, Linaro Limited. All rights reserved.
//
// This program and the accompanying materials
// are licensed and made available under the terms and conditions of the BSD License
@@ -12,13 +12,11 @@
//
//
-.text
-.align 3
-.arch_extension virt
+#include <AsmMacroIoLibV8.h>
-GCC_ASM_EXPORT(ArmCallHvc)
+.arch_extension virt
-ASM_PFX(ArmCallHvc):
+ASM_FUNC(ArmCallHvc)
push {r4-r8}
// r0 will be popped just after the HVC call
push {r0}
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 12/26] ArmPkg/ArmLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (10 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 11/26] ArmPkg/ArmHvcLib: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 19:00 ` Leif Lindholm
2016-08-10 15:17 ` [PATCH 13/26] ArmPkg/ArmMmuLib: " Ard Biesheuvel
` (14 subsequent siblings)
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S | 67 ++++-------
ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 121 +++++++-------------
ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S | 43 +++----
ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S | 47 +++-----
ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S | 67 ++++-------
ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 113 ++++++------------
ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S | 78 ++++---------
ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S | 89 +++++---------
ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm | 4 +-
9 files changed, 205 insertions(+), 424 deletions(-)
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S b/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S
index 3944d8bcb4f1..59e0bc9a0794 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S
@@ -1,6 +1,7 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -12,127 +13,105 @@
#
#------------------------------------------------------------------------------
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmReadCntFrq)
-GCC_ASM_EXPORT(ArmWriteCntFrq)
-GCC_ASM_EXPORT(ArmReadCntPct)
-GCC_ASM_EXPORT(ArmReadCntkCtl)
-GCC_ASM_EXPORT(ArmWriteCntkCtl)
-GCC_ASM_EXPORT(ArmReadCntpTval)
-GCC_ASM_EXPORT(ArmWriteCntpTval)
-GCC_ASM_EXPORT(ArmReadCntpCtl)
-GCC_ASM_EXPORT(ArmWriteCntpCtl)
-GCC_ASM_EXPORT(ArmReadCntvTval)
-GCC_ASM_EXPORT(ArmWriteCntvTval)
-GCC_ASM_EXPORT(ArmReadCntvCtl)
-GCC_ASM_EXPORT(ArmWriteCntvCtl)
-GCC_ASM_EXPORT(ArmReadCntvCt)
-GCC_ASM_EXPORT(ArmReadCntpCval)
-GCC_ASM_EXPORT(ArmWriteCntpCval)
-GCC_ASM_EXPORT(ArmReadCntvCval)
-GCC_ASM_EXPORT(ArmWriteCntvCval)
-GCC_ASM_EXPORT(ArmReadCntvOff)
-GCC_ASM_EXPORT(ArmWriteCntvOff)
-
-ASM_PFX(ArmReadCntFrq):
+#include <AsmMacroIoLibV8.h>
+
+ASM_FUNC(ArmReadCntFrq)
mrs x0, cntfrq_el0 // Read CNTFRQ
ret
# NOTE - Can only write while at highest implemented EL level (EL3 on model). Else ReadOnly (EL2, EL1, EL0)
-ASM_PFX(ArmWriteCntFrq):
+ASM_FUNC(ArmWriteCntFrq)
msr cntfrq_el0, x0 // Write to CNTFRQ
ret
-ASM_PFX(ArmReadCntPct):
+ASM_FUNC(ArmReadCntPct)
mrs x0, cntpct_el0 // Read CNTPCT (Physical counter register)
ret
-ASM_PFX(ArmReadCntkCtl):
+ASM_FUNC(ArmReadCntkCtl)
mrs x0, cntkctl_el1 // Read CNTK_CTL (Timer PL1 Control Register)
ret
-ASM_PFX(ArmWriteCntkCtl):
+ASM_FUNC(ArmWriteCntkCtl)
msr cntkctl_el1, x0 // Write to CNTK_CTL (Timer PL1 Control Register)
ret
-ASM_PFX(ArmReadCntpTval):
+ASM_FUNC(ArmReadCntpTval)
mrs x0, cntp_tval_el0 // Read CNTP_TVAL (PL1 physical timer value register)
ret
-ASM_PFX(ArmWriteCntpTval):
+ASM_FUNC(ArmWriteCntpTval)
msr cntp_tval_el0, x0 // Write to CNTP_TVAL (PL1 physical timer value register)
ret
-ASM_PFX(ArmReadCntpCtl):
+ASM_FUNC(ArmReadCntpCtl)
mrs x0, cntp_ctl_el0 // Read CNTP_CTL (PL1 Physical Timer Control Register)
ret
-ASM_PFX(ArmWriteCntpCtl):
+ASM_FUNC(ArmWriteCntpCtl)
msr cntp_ctl_el0, x0 // Write to CNTP_CTL (PL1 Physical Timer Control Register)
ret
-ASM_PFX(ArmReadCntvTval):
+ASM_FUNC(ArmReadCntvTval)
mrs x0, cntv_tval_el0 // Read CNTV_TVAL (Virtual Timer Value register)
ret
-ASM_PFX(ArmWriteCntvTval):
+ASM_FUNC(ArmWriteCntvTval)
msr cntv_tval_el0, x0 // Write to CNTV_TVAL (Virtual Timer Value register)
ret
-ASM_PFX(ArmReadCntvCtl):
+ASM_FUNC(ArmReadCntvCtl)
mrs x0, cntv_ctl_el0 // Read CNTV_CTL (Virtual Timer Control Register)
ret
-ASM_PFX(ArmWriteCntvCtl):
+ASM_FUNC(ArmWriteCntvCtl)
msr cntv_ctl_el0, x0 // Write to CNTV_CTL (Virtual Timer Control Register)
ret
-ASM_PFX(ArmReadCntvCt):
+ASM_FUNC(ArmReadCntvCt)
mrs x0, cntvct_el0 // Read CNTVCT (Virtual Count Register)
ret
-ASM_PFX(ArmReadCntpCval):
+ASM_FUNC(ArmReadCntpCval)
mrs x0, cntp_cval_el0 // Read CNTP_CTVAL (Physical Timer Compare Value Register)
ret
-ASM_PFX(ArmWriteCntpCval):
+ASM_FUNC(ArmWriteCntpCval)
msr cntp_cval_el0, x0 // Write to CNTP_CTVAL (Physical Timer Compare Value Register)
ret
-ASM_PFX(ArmReadCntvCval):
+ASM_FUNC(ArmReadCntvCval)
mrs x0, cntv_cval_el0 // Read CNTV_CTVAL (Virtual Timer Compare Value Register)
ret
-ASM_PFX(ArmWriteCntvCval):
+ASM_FUNC(ArmWriteCntvCval)
msr cntv_cval_el0, x0 // write to CNTV_CTVAL (Virtual Timer Compare Value Register)
ret
-ASM_PFX(ArmReadCntvOff):
+ASM_FUNC(ArmReadCntvOff)
mrs x0, cntvoff_el2 // Read CNTVOFF (virtual Offset register)
ret
-ASM_PFX(ArmWriteCntvOff):
+ASM_FUNC(ArmWriteCntvOff)
msr cntvoff_el2, x0 // Write to CNTVOFF (Virtual Offset register)
ret
diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
index 5cef98fd42a0..5cee7c1519c3 100644
--- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
+++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
@@ -2,6 +2,7 @@
#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -16,50 +17,6 @@
#include <Chipset/AArch64.h>
#include <AsmMacroIoLibV8.h>
-.text
-.align 3
-
-GCC_ASM_EXPORT (ArmInvalidateInstructionCache)
-GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)
-GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)
-GCC_ASM_EXPORT (ArmCleanDataCacheEntryToPoUByMVA)
-GCC_ASM_EXPORT (ArmInvalidateInstructionCacheEntryToPoUByMVA)
-GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
-GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
-GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
-GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay)
-GCC_ASM_EXPORT (ArmEnableMmu)
-GCC_ASM_EXPORT (ArmDisableMmu)
-GCC_ASM_EXPORT (ArmDisableCachesAndMmu)
-GCC_ASM_EXPORT (ArmMmuEnabled)
-GCC_ASM_EXPORT (ArmEnableDataCache)
-GCC_ASM_EXPORT (ArmDisableDataCache)
-GCC_ASM_EXPORT (ArmEnableInstructionCache)
-GCC_ASM_EXPORT (ArmDisableInstructionCache)
-GCC_ASM_EXPORT (ArmDisableAlignmentCheck)
-GCC_ASM_EXPORT (ArmEnableAlignmentCheck)
-GCC_ASM_EXPORT (ArmEnableBranchPrediction)
-GCC_ASM_EXPORT (ArmDisableBranchPrediction)
-GCC_ASM_EXPORT (AArch64AllDataCachesOperation)
-GCC_ASM_EXPORT (ArmDataMemoryBarrier)
-GCC_ASM_EXPORT (ArmDataSynchronizationBarrier)
-GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
-GCC_ASM_EXPORT (ArmWriteVBar)
-GCC_ASM_EXPORT (ArmReadVBar)
-GCC_ASM_EXPORT (ArmEnableVFP)
-GCC_ASM_EXPORT (ArmCallWFI)
-GCC_ASM_EXPORT (ArmReadMpidr)
-GCC_ASM_EXPORT (ArmReadTpidrurw)
-GCC_ASM_EXPORT (ArmWriteTpidrurw)
-GCC_ASM_EXPORT (ArmIsArchTimerImplemented)
-GCC_ASM_EXPORT (ArmReadIdPfr0)
-GCC_ASM_EXPORT (ArmReadIdPfr1)
-GCC_ASM_EXPORT (ArmWriteHcr)
-GCC_ASM_EXPORT (ArmReadHcr)
-GCC_ASM_EXPORT (ArmReadCurrentEL)
-GCC_ASM_EXPORT (ArmReplaceLiveTranslationEntry)
-GCC_ASM_EXPORT (ArmReplaceLiveTranslationEntrySize)
-
.set CTRL_M_BIT, (1 << 0)
.set CTRL_A_BIT, (1 << 1)
.set CTRL_C_BIT, (1 << 2)
@@ -67,53 +24,53 @@ GCC_ASM_EXPORT (ArmReplaceLiveTranslationEntrySize)
.set CTRL_V_BIT, (1 << 12)
.set CPACR_VFP_BITS, (3 << 20)
-ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
+ASM_FUNC(ArmInvalidateDataCacheEntryByMVA)
dc ivac, x0 // Invalidate single data cache line
ret
-ASM_PFX(ArmCleanDataCacheEntryByMVA):
+ASM_FUNC(ArmCleanDataCacheEntryByMVA)
dc cvac, x0 // Clean single data cache line
ret
-ASM_PFX(ArmCleanDataCacheEntryToPoUByMVA):
+ASM_FUNC(ArmCleanDataCacheEntryToPoUByMVA)
dc cvau, x0 // Clean single data cache line to PoU
ret
-ASM_PFX(ArmInvalidateInstructionCacheEntryToPoUByMVA):
+ASM_FUNC(ArmInvalidateInstructionCacheEntryToPoUByMVA)
ic ivau, x0 // Invalidate single instruction cache line to PoU
ret
-ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
+ASM_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
dc civac, x0 // Clean and invalidate single data cache line
ret
-ASM_PFX(ArmInvalidateDataCacheEntryBySetWay):
+ASM_FUNC(ArmInvalidateDataCacheEntryBySetWay)
dc isw, x0 // Invalidate this line
ret
-ASM_PFX(ArmCleanInvalidateDataCacheEntryBySetWay):
+ASM_FUNC(ArmCleanInvalidateDataCacheEntryBySetWay)
dc cisw, x0 // Clean and Invalidate this line
ret
-ASM_PFX(ArmCleanDataCacheEntryBySetWay):
+ASM_FUNC(ArmCleanDataCacheEntryBySetWay)
dc csw, x0 // Clean this line
ret
-ASM_PFX(ArmInvalidateInstructionCache):
+ASM_FUNC(ArmInvalidateInstructionCache)
ic iallu // Invalidate entire instruction cache
dsb sy
isb
ret
-ASM_PFX(ArmEnableMmu):
+ASM_FUNC(ArmEnableMmu)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, sctlr_el1 // Read System control register EL1
b 4f
@@ -140,7 +97,7 @@ ASM_PFX(ArmEnableMmu):
ret
-ASM_PFX(ArmDisableMmu):
+ASM_FUNC(ArmDisableMmu)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, sctlr_el1 // Read System Control Register EL1
b 4f
@@ -162,7 +119,7 @@ ASM_PFX(ArmDisableMmu):
ret
-ASM_PFX(ArmDisableCachesAndMmu):
+ASM_FUNC(ArmDisableCachesAndMmu)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, sctlr_el1 // Get control register EL1
b 4f
@@ -182,7 +139,7 @@ ASM_PFX(ArmDisableCachesAndMmu):
ret
-ASM_PFX(ArmMmuEnabled):
+ASM_FUNC(ArmMmuEnabled)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, sctlr_el1 // Get control register EL1
b 4f
@@ -193,7 +150,7 @@ ASM_PFX(ArmMmuEnabled):
ret
-ASM_PFX(ArmEnableDataCache):
+ASM_FUNC(ArmEnableDataCache)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, sctlr_el1 // Get control register EL1
b 4f
@@ -212,7 +169,7 @@ ASM_PFX(ArmEnableDataCache):
ret
-ASM_PFX(ArmDisableDataCache):
+ASM_FUNC(ArmDisableDataCache)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, sctlr_el1 // Get control register EL1
b 4f
@@ -231,7 +188,7 @@ ASM_PFX(ArmDisableDataCache):
ret
-ASM_PFX(ArmEnableInstructionCache):
+ASM_FUNC(ArmEnableInstructionCache)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, sctlr_el1 // Get control register EL1
b 4f
@@ -250,7 +207,7 @@ ASM_PFX(ArmEnableInstructionCache):
ret
-ASM_PFX(ArmDisableInstructionCache):
+ASM_FUNC(ArmDisableInstructionCache)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, sctlr_el1 // Get control register EL1
b 4f
@@ -269,7 +226,7 @@ ASM_PFX(ArmDisableInstructionCache):
ret
-ASM_PFX(ArmEnableAlignmentCheck):
+ASM_FUNC(ArmEnableAlignmentCheck)
EL1_OR_EL2(x1)
1: mrs x0, sctlr_el1 // Get control register EL1
b 3f
@@ -284,7 +241,7 @@ ASM_PFX(ArmEnableAlignmentCheck):
ret
-ASM_PFX(ArmDisableAlignmentCheck):
+ASM_FUNC(ArmDisableAlignmentCheck)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, sctlr_el1 // Get control register EL1
b 4f
@@ -304,16 +261,16 @@ ASM_PFX(ArmDisableAlignmentCheck):
// Always turned on in AArch64. Else implementation specific. Leave in for C compatibility for now
-ASM_PFX(ArmEnableBranchPrediction):
+ASM_FUNC(ArmEnableBranchPrediction)
ret
// Always turned on in AArch64. Else implementation specific. Leave in for C compatibility for now.
-ASM_PFX(ArmDisableBranchPrediction):
+ASM_FUNC(ArmDisableBranchPrediction)
ret
-ASM_PFX(AArch64AllDataCachesOperation):
+ASM_FUNC(AArch64AllDataCachesOperation)
// We can use regs 0-7 and 9-15 without having to save/restore.
// Save our link register on the stack. - The stack must always be quad-word aligned
str x30, [sp, #-16]!
@@ -371,22 +328,22 @@ L_Finished:
ret
-ASM_PFX(ArmDataMemoryBarrier):
+ASM_FUNC(ArmDataMemoryBarrier)
dmb sy
ret
-ASM_PFX(ArmDataSynchronizationBarrier):
+ASM_FUNC(ArmDataSynchronizationBarrier)
dsb sy
ret
-ASM_PFX(ArmInstructionSynchronizationBarrier):
+ASM_FUNC(ArmInstructionSynchronizationBarrier)
isb
ret
-ASM_PFX(ArmWriteVBar):
+ASM_FUNC(ArmWriteVBar)
EL1_OR_EL2_OR_EL3(x1)
1: msr vbar_el1, x0 // Set the Address of the EL1 Vector Table in the VBAR register
b 4f
@@ -396,7 +353,7 @@ ASM_PFX(ArmWriteVBar):
4: isb
ret
-ASM_PFX(ArmReadVBar):
+ASM_FUNC(ArmReadVBar)
EL1_OR_EL2_OR_EL3(x1)
1: mrs x0, vbar_el1 // Set the Address of the EL1 Vector Table in the VBAR register
ret
@@ -406,7 +363,7 @@ ASM_PFX(ArmReadVBar):
ret
-ASM_PFX(ArmEnableVFP):
+ASM_FUNC(ArmEnableVFP)
// Check whether floating-point is implemented in the processor.
mov x1, x30 // Save LR
bl ArmReadIdPfr0 // Read EL1 Processor Feature Register (PFR0)
@@ -432,35 +389,35 @@ ASM_PFX(ArmEnableVFP):
4:ret
-ASM_PFX(ArmCallWFI):
+ASM_FUNC(ArmCallWFI)
wfi
ret
-ASM_PFX(ArmReadMpidr):
+ASM_FUNC(ArmReadMpidr)
mrs x0, mpidr_el1 // read EL1 MPIDR
ret
// Keep old function names for C compatibilty for now. Change later?
-ASM_PFX(ArmReadTpidrurw):
+ASM_FUNC(ArmReadTpidrurw)
mrs x0, tpidr_el0 // read tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
ret
// Keep old function names for C compatibilty for now. Change later?
-ASM_PFX(ArmWriteTpidrurw):
+ASM_FUNC(ArmWriteTpidrurw)
msr tpidr_el0, x0 // write tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
ret
// Arch timers are mandatory on AArch64
-ASM_PFX(ArmIsArchTimerImplemented):
+ASM_FUNC(ArmIsArchTimerImplemented)
mov x0, #1
ret
-ASM_PFX(ArmReadIdPfr0):
+ASM_FUNC(ArmReadIdPfr0)
mrs x0, id_aa64pfr0_el1 // Read ID_AA64PFR0 Register
ret
@@ -469,22 +426,22 @@ ASM_PFX(ArmReadIdPfr0):
// A: used to setup arch timer. Check if we have security extensions, permissions to set stuff.
// See: ArmPkg/Library/ArmArchTimerLib/AArch64/ArmArchTimerLib.c
// Not defined yet, but stick in here for now, should read all zeros.
-ASM_PFX(ArmReadIdPfr1):
+ASM_FUNC(ArmReadIdPfr1)
mrs x0, id_aa64pfr1_el1 // Read ID_PFR1 Register
ret
// VOID ArmWriteHcr(UINTN Hcr)
-ASM_PFX(ArmWriteHcr):
+ASM_FUNC(ArmWriteHcr)
msr hcr_el2, x0 // Write the passed HCR value
ret
// UINTN ArmReadHcr(VOID)
-ASM_PFX(ArmReadHcr):
+ASM_FUNC(ArmReadHcr)
mrs x0, hcr_el2
ret
// UINTN ArmReadCurrentEL(VOID)
-ASM_PFX(ArmReadCurrentEL):
+ASM_FUNC(ArmReadCurrentEL)
mrs x0, CurrentEL
ret
diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
index 341bbce76cbd..221dfc499aa8 100644
--- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
+++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
@@ -2,6 +2,7 @@
#
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -15,24 +16,6 @@
#include <AsmMacroIoLibV8.h>
-.text
-.align 3
-
-GCC_ASM_EXPORT (ArmIsMpCore)
-GCC_ASM_EXPORT (ArmEnableAsynchronousAbort)
-GCC_ASM_EXPORT (ArmDisableAsynchronousAbort)
-GCC_ASM_EXPORT (ArmEnableIrq)
-GCC_ASM_EXPORT (ArmDisableIrq)
-GCC_ASM_EXPORT (ArmEnableFiq)
-GCC_ASM_EXPORT (ArmDisableFiq)
-GCC_ASM_EXPORT (ArmEnableInterrupts)
-GCC_ASM_EXPORT (ArmDisableInterrupts)
-GCC_ASM_EXPORT (ArmDisableAllExceptions)
-GCC_ASM_EXPORT (ReadCCSIDR)
-GCC_ASM_EXPORT (ReadCLIDR)
-
-#------------------------------------------------------------------------------
-
.set MPIDR_U_BIT, (30)
.set MPIDR_U_MASK, (1 << MPIDR_U_BIT)
@@ -45,7 +28,7 @@ GCC_ASM_EXPORT (ReadCLIDR)
.set DAIF_WR_ALL, (DAIF_WR_DEBUG_BIT | DAIF_WR_ABORT_BIT | DAIF_WR_INT_BITS)
-ASM_PFX(ArmIsMpCore):
+ASM_FUNC(ArmIsMpCore)
mrs x0, mpidr_el1 // Read EL1 Mutliprocessor Affinty Reg (MPIDR)
and x0, x0, #MPIDR_U_MASK // U Bit clear, the processor is part of a multiprocessor system
lsr x0, x0, #MPIDR_U_BIT
@@ -53,55 +36,55 @@ ASM_PFX(ArmIsMpCore):
ret
-ASM_PFX(ArmEnableAsynchronousAbort):
+ASM_FUNC(ArmEnableAsynchronousAbort)
msr daifclr, #DAIF_WR_ABORT_BIT
isb
ret
-ASM_PFX(ArmDisableAsynchronousAbort):
+ASM_FUNC(ArmDisableAsynchronousAbort)
msr daifset, #DAIF_WR_ABORT_BIT
isb
ret
-ASM_PFX(ArmEnableIrq):
+ASM_FUNC(ArmEnableIrq)
msr daifclr, #DAIF_WR_IRQ_BIT
isb
ret
-ASM_PFX(ArmDisableIrq):
+ASM_FUNC(ArmDisableIrq)
msr daifset, #DAIF_WR_IRQ_BIT
isb
ret
-ASM_PFX(ArmEnableFiq):
+ASM_FUNC(ArmEnableFiq)
msr daifclr, #DAIF_WR_FIQ_BIT
isb
ret
-ASM_PFX(ArmDisableFiq):
+ASM_FUNC(ArmDisableFiq)
msr daifset, #DAIF_WR_FIQ_BIT
isb
ret
-ASM_PFX(ArmEnableInterrupts):
+ASM_FUNC(ArmEnableInterrupts)
msr daifclr, #DAIF_WR_INT_BITS
isb
ret
-ASM_PFX(ArmDisableInterrupts):
+ASM_FUNC(ArmDisableInterrupts)
msr daifset, #DAIF_WR_INT_BITS
isb
ret
-ASM_PFX(ArmDisableAllExceptions):
+ASM_FUNC(ArmDisableAllExceptions)
msr daifset, #DAIF_WR_ALL
isb
ret
@@ -111,7 +94,7 @@ ASM_PFX(ArmDisableAllExceptions):
// ReadCCSIDR (
// IN UINT32 CSSELR
// )
-ASM_PFX(ReadCCSIDR):
+ASM_FUNC(ReadCCSIDR)
msr csselr_el1, x0 // Write Cache Size Selection Register (CSSELR)
isb
mrs x0, ccsidr_el1 // Read current Cache Size ID Register (CCSIDR)
@@ -122,7 +105,7 @@ ASM_PFX(ReadCCSIDR):
// ReadCLIDR (
// IN UINT32 CSSELR
// )
-ASM_PFX(ReadCLIDR):
+ASM_FUNC(ReadCLIDR)
mrs x0, clidr_el1 // Read Cache Level ID Register
ret
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S
index 1bd00d1b997f..3939bbc6b66d 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S
@@ -2,6 +2,7 @@
#
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -15,27 +16,7 @@
#include <AsmMacroIoLib.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmIsMpCore)
-GCC_ASM_EXPORT(ArmHasMpExtensions)
-GCC_ASM_EXPORT(ArmEnableAsynchronousAbort)
-GCC_ASM_EXPORT(ArmDisableAsynchronousAbort)
-GCC_ASM_EXPORT(ArmEnableIrq)
-GCC_ASM_EXPORT(ArmDisableIrq)
-GCC_ASM_EXPORT(ArmEnableFiq)
-GCC_ASM_EXPORT(ArmDisableFiq)
-GCC_ASM_EXPORT(ArmEnableInterrupts)
-GCC_ASM_EXPORT(ArmDisableInterrupts)
-GCC_ASM_EXPORT(ReadCCSIDR)
-GCC_ASM_EXPORT(ReadCLIDR)
-GCC_ASM_EXPORT(ArmReadNsacr)
-GCC_ASM_EXPORT(ArmWriteNsacr)
-
-#------------------------------------------------------------------------------
-
-ASM_PFX(ArmIsMpCore):
+ASM_FUNC(ArmIsMpCore)
mrc p15,0,R0,c0,c0,5
// Get Multiprocessing extension (bit31) & U bit (bit30)
and R0, R0, #0xC0000000
@@ -45,42 +26,42 @@ ASM_PFX(ArmIsMpCore):
movne R0, #0
bx LR
-ASM_PFX(ArmEnableAsynchronousAbort):
+ASM_FUNC(ArmEnableAsynchronousAbort)
cpsie a
isb
bx LR
-ASM_PFX(ArmDisableAsynchronousAbort):
+ASM_FUNC(ArmDisableAsynchronousAbort)
cpsid a
isb
bx LR
-ASM_PFX(ArmEnableIrq):
+ASM_FUNC(ArmEnableIrq)
cpsie i
isb
bx LR
-ASM_PFX(ArmDisableIrq):
+ASM_FUNC(ArmDisableIrq)
cpsid i
isb
bx LR
-ASM_PFX(ArmEnableFiq):
+ASM_FUNC(ArmEnableFiq)
cpsie f
isb
bx LR
-ASM_PFX(ArmDisableFiq):
+ASM_FUNC(ArmDisableFiq)
cpsid f
isb
bx LR
-ASM_PFX(ArmEnableInterrupts):
+ASM_FUNC(ArmEnableInterrupts)
cpsie if
isb
bx LR
-ASM_PFX(ArmDisableInterrupts):
+ASM_FUNC(ArmDisableInterrupts)
cpsid if
isb
bx LR
@@ -89,7 +70,7 @@ ASM_PFX(ArmDisableInterrupts):
// ReadCCSIDR (
// IN UINT32 CSSELR
// )
-ASM_PFX(ReadCCSIDR):
+ASM_FUNC(ReadCCSIDR)
mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
isb
mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
@@ -99,15 +80,15 @@ ASM_PFX(ReadCCSIDR):
// ReadCLIDR (
// IN UINT32 CSSELR
// )
-ASM_PFX(ReadCLIDR):
+ASM_FUNC(ReadCLIDR)
mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
bx lr
-ASM_PFX(ArmReadNsacr):
+ASM_FUNC(ArmReadNsacr)
mrc p15, 0, r0, c1, c1, 2
bx lr
-ASM_PFX(ArmWriteNsacr):
+ASM_FUNC(ArmWriteNsacr)
mcr p15, 0, r0, c1, c1, 2
bx lr
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S
index ec4ede52503e..9a7794f0adf4 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S
@@ -1,6 +1,7 @@
#------------------------------------------------------------------------------
#
# Copyright (c) 2011, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -12,107 +13,85 @@
#
#------------------------------------------------------------------------------
-.text
-.align 2
-
-GCC_ASM_EXPORT (ArmReadCntFrq)
-GCC_ASM_EXPORT (ArmWriteCntFrq)
-GCC_ASM_EXPORT (ArmReadCntPct)
-GCC_ASM_EXPORT (ArmReadCntkCtl)
-GCC_ASM_EXPORT (ArmWriteCntkCtl)
-GCC_ASM_EXPORT (ArmReadCntpTval)
-GCC_ASM_EXPORT (ArmWriteCntpTval)
-GCC_ASM_EXPORT (ArmReadCntpCtl)
-GCC_ASM_EXPORT (ArmWriteCntpCtl)
-GCC_ASM_EXPORT (ArmReadCntvTval)
-GCC_ASM_EXPORT (ArmWriteCntvTval)
-GCC_ASM_EXPORT (ArmReadCntvCtl)
-GCC_ASM_EXPORT (ArmWriteCntvCtl)
-GCC_ASM_EXPORT (ArmReadCntvCt)
-GCC_ASM_EXPORT (ArmReadCntpCval)
-GCC_ASM_EXPORT (ArmWriteCntpCval)
-GCC_ASM_EXPORT (ArmReadCntvCval)
-GCC_ASM_EXPORT (ArmWriteCntvCval)
-GCC_ASM_EXPORT (ArmReadCntvOff)
-GCC_ASM_EXPORT (ArmWriteCntvOff)
-
-ASM_PFX(ArmReadCntFrq):
+#include <AsmMacroIoLib.h>
+
+ASM_FUNC(ArmReadCntFrq)
mrc p15, 0, r0, c14, c0, 0 @ Read CNTFRQ
bx lr
-ASM_PFX(ArmWriteCntFrq):
+ASM_FUNC(ArmWriteCntFrq)
mcr p15, 0, r0, c14, c0, 0 @ Write to CNTFRQ
bx lr
-ASM_PFX(ArmReadCntPct):
+ASM_FUNC(ArmReadCntPct)
mrrc p15, 0, r0, r1, c14 @ Read CNTPT (Physical counter register)
bx lr
-ASM_PFX(ArmReadCntkCtl):
+ASM_FUNC(ArmReadCntkCtl)
mrc p15, 0, r0, c14, c1, 0 @ Read CNTK_CTL (Timer PL1 Control Register)
bx lr
-ASM_PFX(ArmWriteCntkCtl):
+ASM_FUNC(ArmWriteCntkCtl)
mcr p15, 0, r0, c14, c1, 0 @ Write to CNTK_CTL (Timer PL1 Control Register)
bx lr
-ASM_PFX(ArmReadCntpTval):
+ASM_FUNC(ArmReadCntpTval)
mrc p15, 0, r0, c14, c2, 0 @ Read CNTP_TVAL (PL1 physical timer value register)
bx lr
-ASM_PFX(ArmWriteCntpTval):
+ASM_FUNC(ArmWriteCntpTval)
mcr p15, 0, r0, c14, c2, 0 @ Write to CNTP_TVAL (PL1 physical timer value register)
bx lr
-ASM_PFX(ArmReadCntpCtl):
+ASM_FUNC(ArmReadCntpCtl)
mrc p15, 0, r0, c14, c2, 1 @ Read CNTP_CTL (PL1 Physical Timer Control Register)
bx lr
-ASM_PFX(ArmWriteCntpCtl):
+ASM_FUNC(ArmWriteCntpCtl)
mcr p15, 0, r0, c14, c2, 1 @ Write to CNTP_CTL (PL1 Physical Timer Control Register)
bx lr
-ASM_PFX(ArmReadCntvTval):
+ASM_FUNC(ArmReadCntvTval)
mrc p15, 0, r0, c14, c3, 0 @ Read CNTV_TVAL (Virtual Timer Value register)
bx lr
-ASM_PFX(ArmWriteCntvTval):
+ASM_FUNC(ArmWriteCntvTval)
mcr p15, 0, r0, c14, c3, 0 @ Write to CNTV_TVAL (Virtual Timer Value register)
bx lr
-ASM_PFX(ArmReadCntvCtl):
+ASM_FUNC(ArmReadCntvCtl)
mrc p15, 0, r0, c14, c3, 1 @ Read CNTV_CTL (Virtual Timer Control Register)
bx lr
-ASM_PFX(ArmWriteCntvCtl):
+ASM_FUNC(ArmWriteCntvCtl)
mcr p15, 0, r0, c14, c3, 1 @ Write to CNTV_CTL (Virtual Timer Control Register)
bx lr
-ASM_PFX(ArmReadCntvCt):
+ASM_FUNC(ArmReadCntvCt)
mrrc p15, 1, r0, r1, c14 @ Read CNTVCT (Virtual Count Register)
bx lr
-ASM_PFX(ArmReadCntpCval):
+ASM_FUNC(ArmReadCntpCval)
mrrc p15, 2, r0, r1, c14 @ Read CNTP_CTVAL (Physical Timer Compare Value Register)
bx lr
-ASM_PFX(ArmWriteCntpCval):
+ASM_FUNC(ArmWriteCntpCval)
mcrr p15, 2, r0, r1, c14 @ Write to CNTP_CTVAL (Physical Timer Compare Value Register)
bx lr
-ASM_PFX(ArmReadCntvCval):
+ASM_FUNC(ArmReadCntvCval)
mrrc p15, 3, r0, r1, c14 @ Read CNTV_CTVAL (Virtual Timer Compare Value Register)
bx lr
-ASM_PFX(ArmWriteCntvCval):
+ASM_FUNC(ArmWriteCntvCval)
mcrr p15, 3, r0, r1, c14 @ write to CNTV_CTVAL (Virtual Timer Compare Value Register)
bx lr
-ASM_PFX(ArmReadCntvOff):
+ASM_FUNC(ArmReadCntvOff)
mrrc p15, 4, r0, r1, c14 @ Read CNTVOFF (virtual Offset register)
bx lr
-ASM_PFX(ArmWriteCntvOff):
+ASM_FUNC(ArmWriteCntvOff)
mcrr p15, 4, r0, r1, c14 @ Write to CNTVOFF (Virtual Offset register)
bx lr
diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
index 47a4aa5e0d4e..281499b46cbc 100644
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
@@ -2,6 +2,7 @@
#
# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -13,45 +14,7 @@
#
#------------------------------------------------------------------------------
-.text
-.align 2
-
-GCC_ASM_EXPORT (ArmInvalidateInstructionCache)
-GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)
-GCC_ASM_EXPORT (ArmInvalidateInstructionCacheEntryToPoUByMVA)
-GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)
-GCC_ASM_EXPORT (ArmCleanDataCacheEntryToPoUByMVA)
-GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
-GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
-GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
-GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay)
-GCC_ASM_EXPORT (ArmEnableMmu)
-GCC_ASM_EXPORT (ArmDisableMmu)
-GCC_ASM_EXPORT (ArmDisableCachesAndMmu)
-GCC_ASM_EXPORT (ArmMmuEnabled)
-GCC_ASM_EXPORT (ArmEnableDataCache)
-GCC_ASM_EXPORT (ArmDisableDataCache)
-GCC_ASM_EXPORT (ArmEnableInstructionCache)
-GCC_ASM_EXPORT (ArmDisableInstructionCache)
-GCC_ASM_EXPORT (ArmEnableSWPInstruction)
-GCC_ASM_EXPORT (ArmEnableBranchPrediction)
-GCC_ASM_EXPORT (ArmDisableBranchPrediction)
-GCC_ASM_EXPORT (ArmSetLowVectors)
-GCC_ASM_EXPORT (ArmSetHighVectors)
-GCC_ASM_EXPORT (ArmV7AllDataCachesOperation)
-GCC_ASM_EXPORT (ArmDataMemoryBarrier)
-GCC_ASM_EXPORT (ArmDataSynchronizationBarrier)
-GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
-GCC_ASM_EXPORT (ArmReadVBar)
-GCC_ASM_EXPORT (ArmWriteVBar)
-GCC_ASM_EXPORT (ArmEnableVFP)
-GCC_ASM_EXPORT (ArmCallWFI)
-GCC_ASM_EXPORT (ArmReadCbar)
-GCC_ASM_EXPORT (ArmReadMpidr)
-GCC_ASM_EXPORT (ArmReadTpidrurw)
-GCC_ASM_EXPORT (ArmWriteTpidrurw)
-GCC_ASM_EXPORT (ArmIsArchTimerImplemented)
-GCC_ASM_EXPORT (ArmReadIdPfr1)
+#include <AsmMacroIoLib.h>
.set DC_ON, (0x1<<2)
.set IC_ON, (0x1<<12)
@@ -61,50 +24,50 @@ GCC_ASM_EXPORT (ArmReadIdPfr1)
.set CTRL_I_BIT, (1 << 12)
-ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
+ASM_FUNC(ArmInvalidateDataCacheEntryByMVA)
mcr p15, 0, r0, c7, c6, 1 @invalidate single data cache line
bx lr
-ASM_PFX(ArmCleanDataCacheEntryByMVA):
+ASM_FUNC(ArmCleanDataCacheEntryByMVA)
mcr p15, 0, r0, c7, c10, 1 @clean single data cache line
bx lr
-ASM_PFX(ArmCleanDataCacheEntryToPoUByMVA):
+ASM_FUNC(ArmCleanDataCacheEntryToPoUByMVA)
mcr p15, 0, r0, c7, c11, 1 @clean single data cache line to PoU
bx lr
-ASM_PFX(ArmInvalidateInstructionCacheEntryToPoUByMVA):
+ASM_FUNC(ArmInvalidateInstructionCacheEntryToPoUByMVA)
mcr p15, 0, r0, c7, c5, 1 @Invalidate single instruction cache line to PoU
mcr p15, 0, r0, c7, c5, 7 @Invalidate branch predictor
bx lr
-ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
+ASM_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
mcr p15, 0, r0, c7, c14, 1 @clean and invalidate single data cache line
bx lr
-ASM_PFX(ArmInvalidateDataCacheEntryBySetWay):
+ASM_FUNC(ArmInvalidateDataCacheEntryBySetWay)
mcr p15, 0, r0, c7, c6, 2 @ Invalidate this line
bx lr
-ASM_PFX(ArmCleanInvalidateDataCacheEntryBySetWay):
+ASM_FUNC(ArmCleanInvalidateDataCacheEntryBySetWay)
mcr p15, 0, r0, c7, c14, 2 @ Clean and Invalidate this line
bx lr
-ASM_PFX(ArmCleanDataCacheEntryBySetWay):
+ASM_FUNC(ArmCleanDataCacheEntryBySetWay)
mcr p15, 0, r0, c7, c10, 2 @ Clean this line
bx lr
-ASM_PFX(ArmInvalidateInstructionCache):
+ASM_FUNC(ArmInvalidateInstructionCache)
mcr p15,0,R0,c7,c5,0 @Invalidate entire instruction cache
dsb
isb
bx LR
-ASM_PFX(ArmEnableMmu):
+ASM_FUNC(ArmEnableMmu)
mrc p15,0,R0,c1,c0,0
orr R0,R0,#1
mcr p15,0,R0,c1,c0,0
@@ -113,7 +76,7 @@ ASM_PFX(ArmEnableMmu):
bx LR
-ASM_PFX(ArmDisableMmu):
+ASM_FUNC(ArmDisableMmu)
mrc p15,0,R0,c1,c0,0
bic R0,R0,#1
mcr p15,0,R0,c1,c0,0 @Disable MMU
@@ -124,7 +87,7 @@ ASM_PFX(ArmDisableMmu):
isb
bx LR
-ASM_PFX(ArmDisableCachesAndMmu):
+ASM_FUNC(ArmDisableCachesAndMmu)
mrc p15, 0, r0, c1, c0, 0 @ Get control register
bic r0, r0, #CTRL_M_BIT @ Disable MMU
bic r0, r0, #CTRL_C_BIT @ Disable D Cache
@@ -134,12 +97,12 @@ ASM_PFX(ArmDisableCachesAndMmu):
isb
bx LR
-ASM_PFX(ArmMmuEnabled):
+ASM_FUNC(ArmMmuEnabled)
mrc p15,0,R0,c1,c0,0
and R0,R0,#1
bx LR
-ASM_PFX(ArmEnableDataCache):
+ASM_FUNC(ArmEnableDataCache)
ldr R1,=DC_ON
mrc p15,0,R0,c1,c0,0 @Read control register configuration data
orr R0,R0,R1 @Set C bit
@@ -148,7 +111,7 @@ ASM_PFX(ArmEnableDataCache):
isb
bx LR
-ASM_PFX(ArmDisableDataCache):
+ASM_FUNC(ArmDisableDataCache)
ldr R1,=DC_ON
mrc p15,0,R0,c1,c0,0 @Read control register configuration data
bic R0,R0,R1 @Clear C bit
@@ -157,7 +120,7 @@ ASM_PFX(ArmDisableDataCache):
isb
bx LR
-ASM_PFX(ArmEnableInstructionCache):
+ASM_FUNC(ArmEnableInstructionCache)
ldr R1,=IC_ON
mrc p15,0,R0,c1,c0,0 @Read control register configuration data
orr R0,R0,R1 @Set I bit
@@ -166,7 +129,7 @@ ASM_PFX(ArmEnableInstructionCache):
isb
bx LR
-ASM_PFX(ArmDisableInstructionCache):
+ASM_FUNC(ArmDisableInstructionCache)
ldr R1,=IC_ON
mrc p15,0,R0,c1,c0,0 @Read control register configuration data
bic R0,R0,R1 @Clear I bit.
@@ -175,14 +138,14 @@ ASM_PFX(ArmDisableInstructionCache):
isb
bx LR
-ASM_PFX(ArmEnableSWPInstruction):
+ASM_FUNC(ArmEnableSWPInstruction)
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #0x00000400
mcr p15, 0, r0, c1, c0, 0
isb
bx LR
-ASM_PFX(ArmEnableBranchPrediction):
+ASM_FUNC(ArmEnableBranchPrediction)
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #0x00000800
mcr p15, 0, r0, c1, c0, 0
@@ -190,7 +153,7 @@ ASM_PFX(ArmEnableBranchPrediction):
isb
bx LR
-ASM_PFX(ArmDisableBranchPrediction):
+ASM_FUNC(ArmDisableBranchPrediction)
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00000800
mcr p15, 0, r0, c1, c0, 0
@@ -198,21 +161,21 @@ ASM_PFX(ArmDisableBranchPrediction):
isb
bx LR
-ASM_PFX(ArmSetLowVectors):
+ASM_FUNC(ArmSetLowVectors)
mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
bic r0, r0, #0x00002000 @ clear V bit
mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
isb
bx LR
-ASM_PFX(ArmSetHighVectors):
+ASM_FUNC(ArmSetHighVectors)
mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
orr r0, r0, #0x00002000 @ Set V bit
mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
isb
bx LR
-ASM_PFX(ArmV7AllDataCachesOperation):
+ASM_FUNC(ArmV7AllDataCachesOperation)
stmfd SP!,{r4-r12, LR}
mov R1, R0 @ Save Function call in R1
mrc p15, 1, R6, c0, c0, 1 @ Read CLIDR
@@ -265,24 +228,24 @@ L_Finished:
ldmfd SP!, {r4-r12, lr}
bx LR
-ASM_PFX(ArmDataMemoryBarrier):
+ASM_FUNC(ArmDataMemoryBarrier)
dmb
bx LR
-ASM_PFX(ArmDataSynchronizationBarrier):
+ASM_FUNC(ArmDataSynchronizationBarrier)
dsb
bx LR
-ASM_PFX(ArmInstructionSynchronizationBarrier):
+ASM_FUNC(ArmInstructionSynchronizationBarrier)
isb
bx LR
-ASM_PFX(ArmReadVBar):
+ASM_FUNC(ArmReadVBar)
# Set the Address of the Vector Table in the VBAR register
mrc p15, 0, r0, c12, c0, 0
bx lr
-ASM_PFX(ArmWriteVBar):
+ASM_FUNC(ArmWriteVBar)
# Set the Address of the Vector Table in the VBAR register
mcr p15, 0, r0, c12, c0, 0
# Ensure the SCTLR.V bit is clear
@@ -292,7 +255,7 @@ ASM_PFX(ArmWriteVBar):
isb
bx lr
-ASM_PFX(ArmEnableVFP):
+ASM_FUNC(ArmEnableVFP)
# Read CPACR (Coprocessor Access Control Register)
mrc p15, 0, r0, c1, c0, 2
# Enable VPF access (Full Access to CP10, CP11) (V* instructions)
@@ -309,33 +272,33 @@ ASM_PFX(ArmEnableVFP):
#endif
bx lr
-ASM_PFX(ArmCallWFI):
+ASM_FUNC(ArmCallWFI)
wfi
bx lr
#Note: Return 0 in Uniprocessor implementation
-ASM_PFX(ArmReadCbar):
+ASM_FUNC(ArmReadCbar)
mrc p15, 4, r0, c15, c0, 0 @ Read Configuration Base Address Register
bx lr
-ASM_PFX(ArmReadMpidr):
+ASM_FUNC(ArmReadMpidr)
mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
bx lr
-ASM_PFX(ArmReadTpidrurw):
+ASM_FUNC(ArmReadTpidrurw)
mrc p15, 0, r0, c13, c0, 2 @ read TPIDRURW
bx lr
-ASM_PFX(ArmWriteTpidrurw):
+ASM_FUNC(ArmWriteTpidrurw)
mcr p15, 0, r0, c13, c0, 2 @ write TPIDRURW
bx lr
-ASM_PFX(ArmIsArchTimerImplemented):
+ASM_FUNC(ArmIsArchTimerImplemented)
mrc p15, 0, r0, c0, c1, 1 @ Read ID_PFR1
and r0, r0, #0x000F0000
bx lr
-ASM_PFX(ArmReadIdPfr1):
+ASM_FUNC(ArmReadIdPfr1)
mrc p15, 0, r0, c0, c1, 1 @ Read ID_PFR1 Register
bx lr
diff --git a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
index c9f3bd1e8810..9d3dd66b10eb 100644
--- a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
@@ -2,6 +2,7 @@
#
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -15,76 +16,48 @@
#include <AsmMacroIoLibV8.h>
-.text
-.align 3
-GCC_ASM_EXPORT (ArmReadMidr)
-GCC_ASM_EXPORT (ArmCacheInfo)
-GCC_ASM_EXPORT (ArmGetInterruptState)
-GCC_ASM_EXPORT (ArmGetFiqState)
-GCC_ASM_EXPORT (ArmGetTTBR0BaseAddress)
-GCC_ASM_EXPORT (ArmSetTTBR0)
-GCC_ASM_EXPORT (ArmGetTCR)
-GCC_ASM_EXPORT (ArmSetTCR)
-GCC_ASM_EXPORT (ArmGetMAIR)
-GCC_ASM_EXPORT (ArmSetMAIR)
-GCC_ASM_EXPORT (ArmWriteCpacr)
-GCC_ASM_EXPORT (ArmWriteAuxCr)
-GCC_ASM_EXPORT (ArmReadAuxCr)
-GCC_ASM_EXPORT (ArmInvalidateTlb)
-GCC_ASM_EXPORT (ArmUpdateTranslationTableEntry)
-GCC_ASM_EXPORT (ArmWriteCptr)
-GCC_ASM_EXPORT (ArmWriteScr)
-GCC_ASM_EXPORT (ArmWriteMVBar)
-GCC_ASM_EXPORT (ArmCallWFE)
-GCC_ASM_EXPORT (ArmCallSEV)
-GCC_ASM_EXPORT (ArmReadCpuActlr)
-GCC_ASM_EXPORT (ArmWriteCpuActlr)
-GCC_ASM_EXPORT (ArmReadSctlr)
-
-#------------------------------------------------------------------------------
-
.set DAIF_RD_FIQ_BIT, (1 << 6)
.set DAIF_RD_IRQ_BIT, (1 << 7)
-ASM_PFX(ArmReadMidr):
+ASM_FUNC(ArmReadMidr)
mrs x0, midr_el1 // Read from Main ID Register (MIDR)
ret
-ASM_PFX(ArmCacheInfo):
+ASM_FUNC(ArmCacheInfo)
mrs x0, ctr_el0 // Read from Cache Type Regiter (CTR)
ret
-ASM_PFX(ArmGetInterruptState):
+ASM_FUNC(ArmGetInterruptState)
mrs x0, daif
tst w0, #DAIF_RD_IRQ_BIT // Check if IRQ is enabled. Enabled if 0 (Z=1)
cset w0, eq // if Z=1 return 1, else 0
ret
-ASM_PFX(ArmGetFiqState):
+ASM_FUNC(ArmGetFiqState)
mrs x0, daif
tst w0, #DAIF_RD_FIQ_BIT // Check if FIQ is enabled. Enabled if 0 (Z=1)
cset w0, eq // if Z=1 return 1, else 0
ret
-ASM_PFX(ArmWriteCpacr):
+ASM_FUNC(ArmWriteCpacr)
msr cpacr_el1, x0 // Coprocessor Access Control Reg (CPACR)
ret
-ASM_PFX(ArmWriteAuxCr):
+ASM_FUNC(ArmWriteAuxCr)
EL1_OR_EL2(x1)
1:msr actlr_el1, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
ret
2:msr actlr_el2, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
ret
-ASM_PFX(ArmReadAuxCr):
+ASM_FUNC(ArmReadAuxCr)
EL1_OR_EL2(x1)
1:mrs x0, actlr_el1 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
ret
2:mrs x0, actlr_el2 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
ret
-ASM_PFX(ArmSetTTBR0):
+ASM_FUNC(ArmSetTTBR0)
EL1_OR_EL2_OR_EL3(x1)
1:msr ttbr0_el1, x0 // Translation Table Base Reg 0 (TTBR0)
b 4f
@@ -94,17 +67,16 @@ ASM_PFX(ArmSetTTBR0):
4:isb
ret
-ASM_PFX(ArmGetTTBR0BaseAddress):
+ASM_FUNC(ArmGetTTBR0BaseAddress)
EL1_OR_EL2(x1)
1:mrs x0, ttbr0_el1
b 3f
2:mrs x0, ttbr0_el2
-3:LoadConstantToReg(0xFFFFFFFFFFFF, x1) /* Look at bottom 48 bits */
- and x0, x0, x1
+3:and x0, x0, 0xFFFFFFFFFFFF /* Look at bottom 48 bits */
isb
ret
-ASM_PFX(ArmGetTCR):
+ASM_FUNC(ArmGetTCR)
EL1_OR_EL2_OR_EL3(x1)
1:mrs x0, tcr_el1
b 4f
@@ -114,7 +86,7 @@ ASM_PFX(ArmGetTCR):
4:isb
ret
-ASM_PFX(ArmSetTCR):
+ASM_FUNC(ArmSetTCR)
EL1_OR_EL2_OR_EL3(x1)
1:msr tcr_el1, x0
b 4f
@@ -124,7 +96,7 @@ ASM_PFX(ArmSetTCR):
4:isb
ret
-ASM_PFX(ArmGetMAIR):
+ASM_FUNC(ArmGetMAIR)
EL1_OR_EL2_OR_EL3(x1)
1:mrs x0, mair_el1
b 4f
@@ -134,7 +106,7 @@ ASM_PFX(ArmGetMAIR):
4:isb
ret
-ASM_PFX(ArmSetMAIR):
+ASM_FUNC(ArmSetMAIR)
EL1_OR_EL2_OR_EL3(x1)
1:msr mair_el1, x0
b 4f
@@ -151,7 +123,7 @@ ASM_PFX(ArmSetMAIR):
// IN VOID *TranslationTableEntry // X0
// IN VOID *MVA // X1
// );
-ASM_PFX(ArmUpdateTranslationTableEntry):
+ASM_FUNC(ArmUpdateTranslationTableEntry)
dc civac, x0 // Clean and invalidate data line
dsb sy
EL1_OR_EL2_OR_EL3(x0)
@@ -164,7 +136,7 @@ ASM_PFX(ArmUpdateTranslationTableEntry):
isb
ret
-ASM_PFX(ArmInvalidateTlb):
+ASM_FUNC(ArmInvalidateTlb)
EL1_OR_EL2_OR_EL3(x0)
1: tlbi vmalle1
b 4f
@@ -175,38 +147,38 @@ ASM_PFX(ArmInvalidateTlb):
isb
ret
-ASM_PFX(ArmWriteCptr):
+ASM_FUNC(ArmWriteCptr)
msr cptr_el3, x0 // EL3 Coprocessor Trap Reg (CPTR)
ret
-ASM_PFX(ArmWriteScr):
+ASM_FUNC(ArmWriteScr)
msr scr_el3, x0 // Secure configuration register EL3
isb
ret
-ASM_PFX(ArmWriteMVBar):
+ASM_FUNC(ArmWriteMVBar)
msr vbar_el3, x0 // Exception Vector Base address for Monitor on EL3
ret
-ASM_PFX(ArmCallWFE):
+ASM_FUNC(ArmCallWFE)
wfe
ret
-ASM_PFX(ArmCallSEV):
+ASM_FUNC(ArmCallSEV)
sev
ret
-ASM_PFX(ArmReadCpuActlr):
+ASM_FUNC(ArmReadCpuActlr)
mrs x0, S3_1_c15_c2_0
ret
-ASM_PFX(ArmWriteCpuActlr):
+ASM_FUNC(ArmWriteCpuActlr)
msr S3_1_c15_c2_0, x0
dsb sy
isb
ret
-ASM_PFX(ArmReadSctlr):
+ASM_FUNC(ArmReadSctlr)
EL1_OR_EL2_OR_EL3(x1)
1:mrs x0, sctlr_el1
ret
diff --git a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
index 5d1194e7e219..a0b5ed500298 100644
--- a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
@@ -2,6 +2,7 @@
#
# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
# Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
+# Copyright (c) 2016, Linaro Limited. All rights reserved.
#
# This program and the accompanying materials
# are licensed and made available under the terms and conditions of the BSD License
@@ -15,65 +16,33 @@
#include <AsmMacroIoLib.h>
-.text
-.align 2
-GCC_ASM_EXPORT(ArmReadMidr)
-GCC_ASM_EXPORT(ArmCacheInfo)
-GCC_ASM_EXPORT(ArmGetInterruptState)
-GCC_ASM_EXPORT(ArmGetFiqState)
-GCC_ASM_EXPORT(ArmGetTTBR0BaseAddress)
-GCC_ASM_EXPORT(ArmSetTTBR0)
-GCC_ASM_EXPORT(ArmSetTTBCR)
-GCC_ASM_EXPORT(ArmSetDomainAccessControl)
-GCC_ASM_EXPORT(CPSRMaskInsert)
-GCC_ASM_EXPORT(CPSRRead)
-GCC_ASM_EXPORT(ArmReadCpacr)
-GCC_ASM_EXPORT(ArmWriteCpacr)
-GCC_ASM_EXPORT(ArmWriteAuxCr)
-GCC_ASM_EXPORT(ArmReadAuxCr)
-GCC_ASM_EXPORT(ArmInvalidateTlb)
-GCC_ASM_EXPORT(ArmUpdateTranslationTableEntry)
-GCC_ASM_EXPORT(ArmReadScr)
-GCC_ASM_EXPORT(ArmWriteScr)
-GCC_ASM_EXPORT(ArmReadMVBar)
-GCC_ASM_EXPORT(ArmWriteMVBar)
-GCC_ASM_EXPORT(ArmReadHVBar)
-GCC_ASM_EXPORT(ArmWriteHVBar)
-GCC_ASM_EXPORT(ArmCallWFE)
-GCC_ASM_EXPORT(ArmCallSEV)
-GCC_ASM_EXPORT(ArmReadSctlr)
-GCC_ASM_EXPORT(ArmReadCpuActlr)
-GCC_ASM_EXPORT(ArmWriteCpuActlr)
-
-#------------------------------------------------------------------------------
-
-ASM_PFX(ArmReadMidr):
+ASM_FUNC(ArmReadMidr)
mrc p15,0,R0,c0,c0,0
bx LR
-ASM_PFX(ArmCacheInfo):
+ASM_FUNC(ArmCacheInfo)
mrc p15,0,R0,c0,c0,1
bx LR
-ASM_PFX(ArmGetInterruptState):
+ASM_FUNC(ArmGetInterruptState)
mrs R0,CPSR
tst R0,#0x80 @Check if IRQ is enabled.
moveq R0,#1
movne R0,#0
bx LR
-ASM_PFX(ArmGetFiqState):
+ASM_FUNC(ArmGetFiqState)
mrs R0,CPSR
tst R0,#0x40 @Check if FIQ is enabled.
moveq R0,#1
movne R0,#0
bx LR
-ASM_PFX(ArmSetDomainAccessControl):
+ASM_FUNC(ArmSetDomainAccessControl)
mcr p15,0,r0,c3,c0,0
bx lr
-ASM_PFX(CPSRMaskInsert): @ on entry, r0 is the mask and r1 is the field to insert
+ASM_FUNC(CPSRMaskInsert) @ on entry, r0 is the mask and r1 is the field to insert
stmfd sp!, {r4-r12, lr} @ save all the banked registers
mov r3, sp @ copy the stack pointer into a non-banked register
mrs r2, cpsr @ read the cpsr
@@ -86,40 +55,40 @@ ASM_PFX(CPSRMaskInsert): @ on entry, r0 is the mask and r1 is the field to in
ldmfd sp!, {r4-r12, lr} @ restore registers
bx lr @ return (hopefully thumb-safe!)
-ASM_PFX(CPSRRead):
+ASM_FUNC(CPSRRead)
mrs r0, cpsr
bx lr
-ASM_PFX(ArmReadCpacr):
+ASM_FUNC(ArmReadCpacr)
mrc p15, 0, r0, c1, c0, 2
bx lr
-ASM_PFX(ArmWriteCpacr):
+ASM_FUNC(ArmWriteCpacr)
mcr p15, 0, r0, c1, c0, 2
isb
bx lr
-ASM_PFX(ArmWriteAuxCr):
+ASM_FUNC(ArmWriteAuxCr)
mcr p15, 0, r0, c1, c0, 1
bx lr
-ASM_PFX(ArmReadAuxCr):
+ASM_FUNC(ArmReadAuxCr)
mrc p15, 0, r0, c1, c0, 1
bx lr
-ASM_PFX(ArmSetTTBR0):
+ASM_FUNC(ArmSetTTBR0)
mcr p15,0,r0,c2,c0,0
isb
bx lr
-ASM_PFX(ArmSetTTBCR):
+ASM_FUNC(ArmSetTTBCR)
mcr p15, 0, r0, c2, c0, 2
isb
bx lr
-ASM_PFX(ArmGetTTBR0BaseAddress):
+ASM_FUNC(ArmGetTTBR0BaseAddress)
mrc p15,0,r0,c2,c0,0
- LoadConstantToReg(0xFFFFC000, r1)
+ MOV32 (r1, 0xFFFFC000)
and r0, r0, r1
isb
bx lr
@@ -130,7 +99,7 @@ ASM_PFX(ArmGetTTBR0BaseAddress):
// IN VOID *TranslationTableEntry // R0
// IN VOID *MVA // R1
// );
-ASM_PFX(ArmUpdateTranslationTableEntry):
+ASM_FUNC(ArmUpdateTranslationTableEntry)
mcr p15,0,R0,c7,c14,1 @ DCCIMVAC Clean data cache by MVA
dsb
mcr p15,0,R1,c8,c7,1 @ TLBIMVA TLB Invalidate MVA
@@ -139,7 +108,7 @@ ASM_PFX(ArmUpdateTranslationTableEntry):
isb
bx lr
-ASM_PFX(ArmInvalidateTlb):
+ASM_FUNC(ArmInvalidateTlb)
mov r0,#0
mcr p15,0,r0,c8,c7,0
mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
@@ -147,48 +116,48 @@ ASM_PFX(ArmInvalidateTlb):
isb
bx lr
-ASM_PFX(ArmReadScr):
+ASM_FUNC(ArmReadScr)
mrc p15, 0, r0, c1, c1, 0
bx lr
-ASM_PFX(ArmWriteScr):
+ASM_FUNC(ArmWriteScr)
mcr p15, 0, r0, c1, c1, 0
isb
bx lr
-ASM_PFX(ArmReadHVBar):
+ASM_FUNC(ArmReadHVBar)
mrc p15, 4, r0, c12, c0, 0
bx lr
-ASM_PFX(ArmWriteHVBar):
+ASM_FUNC(ArmWriteHVBar)
mcr p15, 4, r0, c12, c0, 0
bx lr
-ASM_PFX(ArmReadMVBar):
+ASM_FUNC(ArmReadMVBar)
mrc p15, 0, r0, c12, c0, 1
bx lr
-ASM_PFX(ArmWriteMVBar):
+ASM_FUNC(ArmWriteMVBar)
mcr p15, 0, r0, c12, c0, 1
bx lr
-ASM_PFX(ArmCallWFE):
+ASM_FUNC(ArmCallWFE)
wfe
bx lr
-ASM_PFX(ArmCallSEV):
+ASM_FUNC(ArmCallSEV)
sev
bx lr
-ASM_PFX(ArmReadSctlr):
+ASM_FUNC(ArmReadSctlr)
mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
bx lr
-ASM_PFX(ArmReadCpuActlr):
+ASM_FUNC(ArmReadCpuActlr)
mrc p15, 0, r0, c1, c0, 1
bx lr
-ASM_PFX(ArmWriteCpuActlr):
+ASM_FUNC(ArmWriteCpuActlr)
mcr p15, 0, r0, c1, c0, 1
dsb
isb
diff --git a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
index 9b87b7f2579f..85b0feee20d4 100644
--- a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
+++ b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
@@ -13,8 +13,6 @@
//
//------------------------------------------------------------------------------
-#include <AsmMacroIoLib.h>
-
INCLUDE AsmMacroIoLib.inc
@@ -92,7 +90,7 @@
RVCT_ASM_EXPORT ArmGetTTBR0BaseAddress
mrc p15,0,r0,c2,c0,0
- LoadConstantToReg(0xFFFFC000, r1)
+ MOV32 r1, 0xFFFFC000
and r0, r0, r1
isb
bx lr
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 12/26] ArmPkg/ArmLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 ` [PATCH 12/26] ArmPkg/ArmLib: " Ard Biesheuvel
@ 2016-08-10 19:00 ` Leif Lindholm
0 siblings, 0 replies; 56+ messages in thread
From: Leif Lindholm @ 2016-08-10 19:00 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
On Wed, Aug 10, 2016 at 05:17:48PM +0200, Ard Biesheuvel wrote:
> Annotate functions with ASM_FUNC() so that they are emitted into
> separate sections.
Also changes ConstantToReg -> MOV32.
Add a note on this to commit message and:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S | 67 ++++-------
> ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 121 +++++++-------------
> ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S | 43 +++----
> ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S | 47 +++-----
> ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S | 67 ++++-------
> ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 113 ++++++------------
> ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S | 78 ++++---------
> ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S | 89 +++++---------
> ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm | 4 +-
> 9 files changed, 205 insertions(+), 424 deletions(-)
>
> diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S b/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S
> index 3944d8bcb4f1..59e0bc9a0794 100644
> --- a/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S
> +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S
> @@ -1,6 +1,7 @@
> #------------------------------------------------------------------------------
> #
> # Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
> +# Copyright (c) 2016, Linaro Limited. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> @@ -12,127 +13,105 @@
> #
> #------------------------------------------------------------------------------
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT(ArmReadCntFrq)
> -GCC_ASM_EXPORT(ArmWriteCntFrq)
> -GCC_ASM_EXPORT(ArmReadCntPct)
> -GCC_ASM_EXPORT(ArmReadCntkCtl)
> -GCC_ASM_EXPORT(ArmWriteCntkCtl)
> -GCC_ASM_EXPORT(ArmReadCntpTval)
> -GCC_ASM_EXPORT(ArmWriteCntpTval)
> -GCC_ASM_EXPORT(ArmReadCntpCtl)
> -GCC_ASM_EXPORT(ArmWriteCntpCtl)
> -GCC_ASM_EXPORT(ArmReadCntvTval)
> -GCC_ASM_EXPORT(ArmWriteCntvTval)
> -GCC_ASM_EXPORT(ArmReadCntvCtl)
> -GCC_ASM_EXPORT(ArmWriteCntvCtl)
> -GCC_ASM_EXPORT(ArmReadCntvCt)
> -GCC_ASM_EXPORT(ArmReadCntpCval)
> -GCC_ASM_EXPORT(ArmWriteCntpCval)
> -GCC_ASM_EXPORT(ArmReadCntvCval)
> -GCC_ASM_EXPORT(ArmWriteCntvCval)
> -GCC_ASM_EXPORT(ArmReadCntvOff)
> -GCC_ASM_EXPORT(ArmWriteCntvOff)
> -
> -ASM_PFX(ArmReadCntFrq):
> +#include <AsmMacroIoLibV8.h>
> +
> +ASM_FUNC(ArmReadCntFrq)
> mrs x0, cntfrq_el0 // Read CNTFRQ
> ret
>
>
> # NOTE - Can only write while at highest implemented EL level (EL3 on model). Else ReadOnly (EL2, EL1, EL0)
> -ASM_PFX(ArmWriteCntFrq):
> +ASM_FUNC(ArmWriteCntFrq)
> msr cntfrq_el0, x0 // Write to CNTFRQ
> ret
>
>
> -ASM_PFX(ArmReadCntPct):
> +ASM_FUNC(ArmReadCntPct)
> mrs x0, cntpct_el0 // Read CNTPCT (Physical counter register)
> ret
>
>
> -ASM_PFX(ArmReadCntkCtl):
> +ASM_FUNC(ArmReadCntkCtl)
> mrs x0, cntkctl_el1 // Read CNTK_CTL (Timer PL1 Control Register)
> ret
>
>
> -ASM_PFX(ArmWriteCntkCtl):
> +ASM_FUNC(ArmWriteCntkCtl)
> msr cntkctl_el1, x0 // Write to CNTK_CTL (Timer PL1 Control Register)
> ret
>
>
> -ASM_PFX(ArmReadCntpTval):
> +ASM_FUNC(ArmReadCntpTval)
> mrs x0, cntp_tval_el0 // Read CNTP_TVAL (PL1 physical timer value register)
> ret
>
>
> -ASM_PFX(ArmWriteCntpTval):
> +ASM_FUNC(ArmWriteCntpTval)
> msr cntp_tval_el0, x0 // Write to CNTP_TVAL (PL1 physical timer value register)
> ret
>
>
> -ASM_PFX(ArmReadCntpCtl):
> +ASM_FUNC(ArmReadCntpCtl)
> mrs x0, cntp_ctl_el0 // Read CNTP_CTL (PL1 Physical Timer Control Register)
> ret
>
>
> -ASM_PFX(ArmWriteCntpCtl):
> +ASM_FUNC(ArmWriteCntpCtl)
> msr cntp_ctl_el0, x0 // Write to CNTP_CTL (PL1 Physical Timer Control Register)
> ret
>
>
> -ASM_PFX(ArmReadCntvTval):
> +ASM_FUNC(ArmReadCntvTval)
> mrs x0, cntv_tval_el0 // Read CNTV_TVAL (Virtual Timer Value register)
> ret
>
>
> -ASM_PFX(ArmWriteCntvTval):
> +ASM_FUNC(ArmWriteCntvTval)
> msr cntv_tval_el0, x0 // Write to CNTV_TVAL (Virtual Timer Value register)
> ret
>
>
> -ASM_PFX(ArmReadCntvCtl):
> +ASM_FUNC(ArmReadCntvCtl)
> mrs x0, cntv_ctl_el0 // Read CNTV_CTL (Virtual Timer Control Register)
> ret
>
>
> -ASM_PFX(ArmWriteCntvCtl):
> +ASM_FUNC(ArmWriteCntvCtl)
> msr cntv_ctl_el0, x0 // Write to CNTV_CTL (Virtual Timer Control Register)
> ret
>
>
> -ASM_PFX(ArmReadCntvCt):
> +ASM_FUNC(ArmReadCntvCt)
> mrs x0, cntvct_el0 // Read CNTVCT (Virtual Count Register)
> ret
>
>
> -ASM_PFX(ArmReadCntpCval):
> +ASM_FUNC(ArmReadCntpCval)
> mrs x0, cntp_cval_el0 // Read CNTP_CTVAL (Physical Timer Compare Value Register)
> ret
>
>
> -ASM_PFX(ArmWriteCntpCval):
> +ASM_FUNC(ArmWriteCntpCval)
> msr cntp_cval_el0, x0 // Write to CNTP_CTVAL (Physical Timer Compare Value Register)
> ret
>
>
> -ASM_PFX(ArmReadCntvCval):
> +ASM_FUNC(ArmReadCntvCval)
> mrs x0, cntv_cval_el0 // Read CNTV_CTVAL (Virtual Timer Compare Value Register)
> ret
>
>
> -ASM_PFX(ArmWriteCntvCval):
> +ASM_FUNC(ArmWriteCntvCval)
> msr cntv_cval_el0, x0 // write to CNTV_CTVAL (Virtual Timer Compare Value Register)
> ret
>
>
> -ASM_PFX(ArmReadCntvOff):
> +ASM_FUNC(ArmReadCntvOff)
> mrs x0, cntvoff_el2 // Read CNTVOFF (virtual Offset register)
> ret
>
>
> -ASM_PFX(ArmWriteCntvOff):
> +ASM_FUNC(ArmWriteCntvOff)
> msr cntvoff_el2, x0 // Write to CNTVOFF (Virtual Offset register)
> ret
>
> diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> index 5cef98fd42a0..5cee7c1519c3 100644
> --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S
> @@ -2,6 +2,7 @@
> #
> # Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
> # Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
> +# Copyright (c) 2016, Linaro Limited. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> @@ -16,50 +17,6 @@
> #include <Chipset/AArch64.h>
> #include <AsmMacroIoLibV8.h>
>
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT (ArmInvalidateInstructionCache)
> -GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)
> -GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)
> -GCC_ASM_EXPORT (ArmCleanDataCacheEntryToPoUByMVA)
> -GCC_ASM_EXPORT (ArmInvalidateInstructionCacheEntryToPoUByMVA)
> -GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
> -GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
> -GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
> -GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay)
> -GCC_ASM_EXPORT (ArmEnableMmu)
> -GCC_ASM_EXPORT (ArmDisableMmu)
> -GCC_ASM_EXPORT (ArmDisableCachesAndMmu)
> -GCC_ASM_EXPORT (ArmMmuEnabled)
> -GCC_ASM_EXPORT (ArmEnableDataCache)
> -GCC_ASM_EXPORT (ArmDisableDataCache)
> -GCC_ASM_EXPORT (ArmEnableInstructionCache)
> -GCC_ASM_EXPORT (ArmDisableInstructionCache)
> -GCC_ASM_EXPORT (ArmDisableAlignmentCheck)
> -GCC_ASM_EXPORT (ArmEnableAlignmentCheck)
> -GCC_ASM_EXPORT (ArmEnableBranchPrediction)
> -GCC_ASM_EXPORT (ArmDisableBranchPrediction)
> -GCC_ASM_EXPORT (AArch64AllDataCachesOperation)
> -GCC_ASM_EXPORT (ArmDataMemoryBarrier)
> -GCC_ASM_EXPORT (ArmDataSynchronizationBarrier)
> -GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
> -GCC_ASM_EXPORT (ArmWriteVBar)
> -GCC_ASM_EXPORT (ArmReadVBar)
> -GCC_ASM_EXPORT (ArmEnableVFP)
> -GCC_ASM_EXPORT (ArmCallWFI)
> -GCC_ASM_EXPORT (ArmReadMpidr)
> -GCC_ASM_EXPORT (ArmReadTpidrurw)
> -GCC_ASM_EXPORT (ArmWriteTpidrurw)
> -GCC_ASM_EXPORT (ArmIsArchTimerImplemented)
> -GCC_ASM_EXPORT (ArmReadIdPfr0)
> -GCC_ASM_EXPORT (ArmReadIdPfr1)
> -GCC_ASM_EXPORT (ArmWriteHcr)
> -GCC_ASM_EXPORT (ArmReadHcr)
> -GCC_ASM_EXPORT (ArmReadCurrentEL)
> -GCC_ASM_EXPORT (ArmReplaceLiveTranslationEntry)
> -GCC_ASM_EXPORT (ArmReplaceLiveTranslationEntrySize)
> -
> .set CTRL_M_BIT, (1 << 0)
> .set CTRL_A_BIT, (1 << 1)
> .set CTRL_C_BIT, (1 << 2)
> @@ -67,53 +24,53 @@ GCC_ASM_EXPORT (ArmReplaceLiveTranslationEntrySize)
> .set CTRL_V_BIT, (1 << 12)
> .set CPACR_VFP_BITS, (3 << 20)
>
> -ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
> +ASM_FUNC(ArmInvalidateDataCacheEntryByMVA)
> dc ivac, x0 // Invalidate single data cache line
> ret
>
>
> -ASM_PFX(ArmCleanDataCacheEntryByMVA):
> +ASM_FUNC(ArmCleanDataCacheEntryByMVA)
> dc cvac, x0 // Clean single data cache line
> ret
>
>
> -ASM_PFX(ArmCleanDataCacheEntryToPoUByMVA):
> +ASM_FUNC(ArmCleanDataCacheEntryToPoUByMVA)
> dc cvau, x0 // Clean single data cache line to PoU
> ret
>
> -ASM_PFX(ArmInvalidateInstructionCacheEntryToPoUByMVA):
> +ASM_FUNC(ArmInvalidateInstructionCacheEntryToPoUByMVA)
> ic ivau, x0 // Invalidate single instruction cache line to PoU
> ret
>
>
> -ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
> +ASM_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
> dc civac, x0 // Clean and invalidate single data cache line
> ret
>
>
> -ASM_PFX(ArmInvalidateDataCacheEntryBySetWay):
> +ASM_FUNC(ArmInvalidateDataCacheEntryBySetWay)
> dc isw, x0 // Invalidate this line
> ret
>
>
> -ASM_PFX(ArmCleanInvalidateDataCacheEntryBySetWay):
> +ASM_FUNC(ArmCleanInvalidateDataCacheEntryBySetWay)
> dc cisw, x0 // Clean and Invalidate this line
> ret
>
>
> -ASM_PFX(ArmCleanDataCacheEntryBySetWay):
> +ASM_FUNC(ArmCleanDataCacheEntryBySetWay)
> dc csw, x0 // Clean this line
> ret
>
>
> -ASM_PFX(ArmInvalidateInstructionCache):
> +ASM_FUNC(ArmInvalidateInstructionCache)
> ic iallu // Invalidate entire instruction cache
> dsb sy
> isb
> ret
>
>
> -ASM_PFX(ArmEnableMmu):
> +ASM_FUNC(ArmEnableMmu)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, sctlr_el1 // Read System control register EL1
> b 4f
> @@ -140,7 +97,7 @@ ASM_PFX(ArmEnableMmu):
> ret
>
>
> -ASM_PFX(ArmDisableMmu):
> +ASM_FUNC(ArmDisableMmu)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, sctlr_el1 // Read System Control Register EL1
> b 4f
> @@ -162,7 +119,7 @@ ASM_PFX(ArmDisableMmu):
> ret
>
>
> -ASM_PFX(ArmDisableCachesAndMmu):
> +ASM_FUNC(ArmDisableCachesAndMmu)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, sctlr_el1 // Get control register EL1
> b 4f
> @@ -182,7 +139,7 @@ ASM_PFX(ArmDisableCachesAndMmu):
> ret
>
>
> -ASM_PFX(ArmMmuEnabled):
> +ASM_FUNC(ArmMmuEnabled)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, sctlr_el1 // Get control register EL1
> b 4f
> @@ -193,7 +150,7 @@ ASM_PFX(ArmMmuEnabled):
> ret
>
>
> -ASM_PFX(ArmEnableDataCache):
> +ASM_FUNC(ArmEnableDataCache)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, sctlr_el1 // Get control register EL1
> b 4f
> @@ -212,7 +169,7 @@ ASM_PFX(ArmEnableDataCache):
> ret
>
>
> -ASM_PFX(ArmDisableDataCache):
> +ASM_FUNC(ArmDisableDataCache)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, sctlr_el1 // Get control register EL1
> b 4f
> @@ -231,7 +188,7 @@ ASM_PFX(ArmDisableDataCache):
> ret
>
>
> -ASM_PFX(ArmEnableInstructionCache):
> +ASM_FUNC(ArmEnableInstructionCache)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, sctlr_el1 // Get control register EL1
> b 4f
> @@ -250,7 +207,7 @@ ASM_PFX(ArmEnableInstructionCache):
> ret
>
>
> -ASM_PFX(ArmDisableInstructionCache):
> +ASM_FUNC(ArmDisableInstructionCache)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, sctlr_el1 // Get control register EL1
> b 4f
> @@ -269,7 +226,7 @@ ASM_PFX(ArmDisableInstructionCache):
> ret
>
>
> -ASM_PFX(ArmEnableAlignmentCheck):
> +ASM_FUNC(ArmEnableAlignmentCheck)
> EL1_OR_EL2(x1)
> 1: mrs x0, sctlr_el1 // Get control register EL1
> b 3f
> @@ -284,7 +241,7 @@ ASM_PFX(ArmEnableAlignmentCheck):
> ret
>
>
> -ASM_PFX(ArmDisableAlignmentCheck):
> +ASM_FUNC(ArmDisableAlignmentCheck)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, sctlr_el1 // Get control register EL1
> b 4f
> @@ -304,16 +261,16 @@ ASM_PFX(ArmDisableAlignmentCheck):
>
>
> // Always turned on in AArch64. Else implementation specific. Leave in for C compatibility for now
> -ASM_PFX(ArmEnableBranchPrediction):
> +ASM_FUNC(ArmEnableBranchPrediction)
> ret
>
>
> // Always turned on in AArch64. Else implementation specific. Leave in for C compatibility for now.
> -ASM_PFX(ArmDisableBranchPrediction):
> +ASM_FUNC(ArmDisableBranchPrediction)
> ret
>
>
> -ASM_PFX(AArch64AllDataCachesOperation):
> +ASM_FUNC(AArch64AllDataCachesOperation)
> // We can use regs 0-7 and 9-15 without having to save/restore.
> // Save our link register on the stack. - The stack must always be quad-word aligned
> str x30, [sp, #-16]!
> @@ -371,22 +328,22 @@ L_Finished:
> ret
>
>
> -ASM_PFX(ArmDataMemoryBarrier):
> +ASM_FUNC(ArmDataMemoryBarrier)
> dmb sy
> ret
>
>
> -ASM_PFX(ArmDataSynchronizationBarrier):
> +ASM_FUNC(ArmDataSynchronizationBarrier)
> dsb sy
> ret
>
>
> -ASM_PFX(ArmInstructionSynchronizationBarrier):
> +ASM_FUNC(ArmInstructionSynchronizationBarrier)
> isb
> ret
>
>
> -ASM_PFX(ArmWriteVBar):
> +ASM_FUNC(ArmWriteVBar)
> EL1_OR_EL2_OR_EL3(x1)
> 1: msr vbar_el1, x0 // Set the Address of the EL1 Vector Table in the VBAR register
> b 4f
> @@ -396,7 +353,7 @@ ASM_PFX(ArmWriteVBar):
> 4: isb
> ret
>
> -ASM_PFX(ArmReadVBar):
> +ASM_FUNC(ArmReadVBar)
> EL1_OR_EL2_OR_EL3(x1)
> 1: mrs x0, vbar_el1 // Set the Address of the EL1 Vector Table in the VBAR register
> ret
> @@ -406,7 +363,7 @@ ASM_PFX(ArmReadVBar):
> ret
>
>
> -ASM_PFX(ArmEnableVFP):
> +ASM_FUNC(ArmEnableVFP)
> // Check whether floating-point is implemented in the processor.
> mov x1, x30 // Save LR
> bl ArmReadIdPfr0 // Read EL1 Processor Feature Register (PFR0)
> @@ -432,35 +389,35 @@ ASM_PFX(ArmEnableVFP):
> 4:ret
>
>
> -ASM_PFX(ArmCallWFI):
> +ASM_FUNC(ArmCallWFI)
> wfi
> ret
>
>
> -ASM_PFX(ArmReadMpidr):
> +ASM_FUNC(ArmReadMpidr)
> mrs x0, mpidr_el1 // read EL1 MPIDR
> ret
>
>
> // Keep old function names for C compatibilty for now. Change later?
> -ASM_PFX(ArmReadTpidrurw):
> +ASM_FUNC(ArmReadTpidrurw)
> mrs x0, tpidr_el0 // read tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
> ret
>
>
> // Keep old function names for C compatibilty for now. Change later?
> -ASM_PFX(ArmWriteTpidrurw):
> +ASM_FUNC(ArmWriteTpidrurw)
> msr tpidr_el0, x0 // write tpidr_el0 (v7 TPIDRURW) -> (v8 TPIDR_EL0)
> ret
>
>
> // Arch timers are mandatory on AArch64
> -ASM_PFX(ArmIsArchTimerImplemented):
> +ASM_FUNC(ArmIsArchTimerImplemented)
> mov x0, #1
> ret
>
>
> -ASM_PFX(ArmReadIdPfr0):
> +ASM_FUNC(ArmReadIdPfr0)
> mrs x0, id_aa64pfr0_el1 // Read ID_AA64PFR0 Register
> ret
>
> @@ -469,22 +426,22 @@ ASM_PFX(ArmReadIdPfr0):
> // A: used to setup arch timer. Check if we have security extensions, permissions to set stuff.
> // See: ArmPkg/Library/ArmArchTimerLib/AArch64/ArmArchTimerLib.c
> // Not defined yet, but stick in here for now, should read all zeros.
> -ASM_PFX(ArmReadIdPfr1):
> +ASM_FUNC(ArmReadIdPfr1)
> mrs x0, id_aa64pfr1_el1 // Read ID_PFR1 Register
> ret
>
> // VOID ArmWriteHcr(UINTN Hcr)
> -ASM_PFX(ArmWriteHcr):
> +ASM_FUNC(ArmWriteHcr)
> msr hcr_el2, x0 // Write the passed HCR value
> ret
>
> // UINTN ArmReadHcr(VOID)
> -ASM_PFX(ArmReadHcr):
> +ASM_FUNC(ArmReadHcr)
> mrs x0, hcr_el2
> ret
>
> // UINTN ArmReadCurrentEL(VOID)
> -ASM_PFX(ArmReadCurrentEL):
> +ASM_FUNC(ArmReadCurrentEL)
> mrs x0, CurrentEL
> ret
>
> diff --git a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
> index 341bbce76cbd..221dfc499aa8 100644
> --- a/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
> +++ b/ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S
> @@ -2,6 +2,7 @@
> #
> # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> # Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
> +# Copyright (c) 2016, Linaro Limited. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> @@ -15,24 +16,6 @@
>
> #include <AsmMacroIoLibV8.h>
>
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT (ArmIsMpCore)
> -GCC_ASM_EXPORT (ArmEnableAsynchronousAbort)
> -GCC_ASM_EXPORT (ArmDisableAsynchronousAbort)
> -GCC_ASM_EXPORT (ArmEnableIrq)
> -GCC_ASM_EXPORT (ArmDisableIrq)
> -GCC_ASM_EXPORT (ArmEnableFiq)
> -GCC_ASM_EXPORT (ArmDisableFiq)
> -GCC_ASM_EXPORT (ArmEnableInterrupts)
> -GCC_ASM_EXPORT (ArmDisableInterrupts)
> -GCC_ASM_EXPORT (ArmDisableAllExceptions)
> -GCC_ASM_EXPORT (ReadCCSIDR)
> -GCC_ASM_EXPORT (ReadCLIDR)
> -
> -#------------------------------------------------------------------------------
> -
> .set MPIDR_U_BIT, (30)
> .set MPIDR_U_MASK, (1 << MPIDR_U_BIT)
>
> @@ -45,7 +28,7 @@ GCC_ASM_EXPORT (ReadCLIDR)
> .set DAIF_WR_ALL, (DAIF_WR_DEBUG_BIT | DAIF_WR_ABORT_BIT | DAIF_WR_INT_BITS)
>
>
> -ASM_PFX(ArmIsMpCore):
> +ASM_FUNC(ArmIsMpCore)
> mrs x0, mpidr_el1 // Read EL1 Mutliprocessor Affinty Reg (MPIDR)
> and x0, x0, #MPIDR_U_MASK // U Bit clear, the processor is part of a multiprocessor system
> lsr x0, x0, #MPIDR_U_BIT
> @@ -53,55 +36,55 @@ ASM_PFX(ArmIsMpCore):
> ret
>
>
> -ASM_PFX(ArmEnableAsynchronousAbort):
> +ASM_FUNC(ArmEnableAsynchronousAbort)
> msr daifclr, #DAIF_WR_ABORT_BIT
> isb
> ret
>
>
> -ASM_PFX(ArmDisableAsynchronousAbort):
> +ASM_FUNC(ArmDisableAsynchronousAbort)
> msr daifset, #DAIF_WR_ABORT_BIT
> isb
> ret
>
>
> -ASM_PFX(ArmEnableIrq):
> +ASM_FUNC(ArmEnableIrq)
> msr daifclr, #DAIF_WR_IRQ_BIT
> isb
> ret
>
>
> -ASM_PFX(ArmDisableIrq):
> +ASM_FUNC(ArmDisableIrq)
> msr daifset, #DAIF_WR_IRQ_BIT
> isb
> ret
>
>
> -ASM_PFX(ArmEnableFiq):
> +ASM_FUNC(ArmEnableFiq)
> msr daifclr, #DAIF_WR_FIQ_BIT
> isb
> ret
>
>
> -ASM_PFX(ArmDisableFiq):
> +ASM_FUNC(ArmDisableFiq)
> msr daifset, #DAIF_WR_FIQ_BIT
> isb
> ret
>
>
> -ASM_PFX(ArmEnableInterrupts):
> +ASM_FUNC(ArmEnableInterrupts)
> msr daifclr, #DAIF_WR_INT_BITS
> isb
> ret
>
>
> -ASM_PFX(ArmDisableInterrupts):
> +ASM_FUNC(ArmDisableInterrupts)
> msr daifset, #DAIF_WR_INT_BITS
> isb
> ret
>
>
> -ASM_PFX(ArmDisableAllExceptions):
> +ASM_FUNC(ArmDisableAllExceptions)
> msr daifset, #DAIF_WR_ALL
> isb
> ret
> @@ -111,7 +94,7 @@ ASM_PFX(ArmDisableAllExceptions):
> // ReadCCSIDR (
> // IN UINT32 CSSELR
> // )
> -ASM_PFX(ReadCCSIDR):
> +ASM_FUNC(ReadCCSIDR)
> msr csselr_el1, x0 // Write Cache Size Selection Register (CSSELR)
> isb
> mrs x0, ccsidr_el1 // Read current Cache Size ID Register (CCSIDR)
> @@ -122,7 +105,7 @@ ASM_PFX(ReadCCSIDR):
> // ReadCLIDR (
> // IN UINT32 CSSELR
> // )
> -ASM_PFX(ReadCLIDR):
> +ASM_FUNC(ReadCLIDR)
> mrs x0, clidr_el1 // Read Cache Level ID Register
> ret
>
> diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S
> index 1bd00d1b997f..3939bbc6b66d 100644
> --- a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S
> +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S
> @@ -2,6 +2,7 @@
> #
> # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> # Copyright (c) 2011-2013, ARM Limited. All rights reserved.
> +# Copyright (c) 2016, Linaro Limited. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> @@ -15,27 +16,7 @@
>
> #include <AsmMacroIoLib.h>
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT(ArmIsMpCore)
> -GCC_ASM_EXPORT(ArmHasMpExtensions)
> -GCC_ASM_EXPORT(ArmEnableAsynchronousAbort)
> -GCC_ASM_EXPORT(ArmDisableAsynchronousAbort)
> -GCC_ASM_EXPORT(ArmEnableIrq)
> -GCC_ASM_EXPORT(ArmDisableIrq)
> -GCC_ASM_EXPORT(ArmEnableFiq)
> -GCC_ASM_EXPORT(ArmDisableFiq)
> -GCC_ASM_EXPORT(ArmEnableInterrupts)
> -GCC_ASM_EXPORT(ArmDisableInterrupts)
> -GCC_ASM_EXPORT(ReadCCSIDR)
> -GCC_ASM_EXPORT(ReadCLIDR)
> -GCC_ASM_EXPORT(ArmReadNsacr)
> -GCC_ASM_EXPORT(ArmWriteNsacr)
> -
> -#------------------------------------------------------------------------------
> -
> -ASM_PFX(ArmIsMpCore):
> +ASM_FUNC(ArmIsMpCore)
> mrc p15,0,R0,c0,c0,5
> // Get Multiprocessing extension (bit31) & U bit (bit30)
> and R0, R0, #0xC0000000
> @@ -45,42 +26,42 @@ ASM_PFX(ArmIsMpCore):
> movne R0, #0
> bx LR
>
> -ASM_PFX(ArmEnableAsynchronousAbort):
> +ASM_FUNC(ArmEnableAsynchronousAbort)
> cpsie a
> isb
> bx LR
>
> -ASM_PFX(ArmDisableAsynchronousAbort):
> +ASM_FUNC(ArmDisableAsynchronousAbort)
> cpsid a
> isb
> bx LR
>
> -ASM_PFX(ArmEnableIrq):
> +ASM_FUNC(ArmEnableIrq)
> cpsie i
> isb
> bx LR
>
> -ASM_PFX(ArmDisableIrq):
> +ASM_FUNC(ArmDisableIrq)
> cpsid i
> isb
> bx LR
>
> -ASM_PFX(ArmEnableFiq):
> +ASM_FUNC(ArmEnableFiq)
> cpsie f
> isb
> bx LR
>
> -ASM_PFX(ArmDisableFiq):
> +ASM_FUNC(ArmDisableFiq)
> cpsid f
> isb
> bx LR
>
> -ASM_PFX(ArmEnableInterrupts):
> +ASM_FUNC(ArmEnableInterrupts)
> cpsie if
> isb
> bx LR
>
> -ASM_PFX(ArmDisableInterrupts):
> +ASM_FUNC(ArmDisableInterrupts)
> cpsid if
> isb
> bx LR
> @@ -89,7 +70,7 @@ ASM_PFX(ArmDisableInterrupts):
> // ReadCCSIDR (
> // IN UINT32 CSSELR
> // )
> -ASM_PFX(ReadCCSIDR):
> +ASM_FUNC(ReadCCSIDR)
> mcr p15,2,r0,c0,c0,0 @ Write Cache Size Selection Register (CSSELR)
> isb
> mrc p15,1,r0,c0,c0,0 @ Read current CP15 Cache Size ID Register (CCSIDR)
> @@ -99,15 +80,15 @@ ASM_PFX(ReadCCSIDR):
> // ReadCLIDR (
> // IN UINT32 CSSELR
> // )
> -ASM_PFX(ReadCLIDR):
> +ASM_FUNC(ReadCLIDR)
> mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
> bx lr
>
> -ASM_PFX(ArmReadNsacr):
> +ASM_FUNC(ArmReadNsacr)
> mrc p15, 0, r0, c1, c1, 2
> bx lr
>
> -ASM_PFX(ArmWriteNsacr):
> +ASM_FUNC(ArmWriteNsacr)
> mcr p15, 0, r0, c1, c1, 2
> bx lr
>
> diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S
> index ec4ede52503e..9a7794f0adf4 100644
> --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S
> +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S
> @@ -1,6 +1,7 @@
> #------------------------------------------------------------------------------
> #
> # Copyright (c) 2011, ARM Limited. All rights reserved.
> +# Copyright (c) 2016, Linaro Limited. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> @@ -12,107 +13,85 @@
> #
> #------------------------------------------------------------------------------
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT (ArmReadCntFrq)
> -GCC_ASM_EXPORT (ArmWriteCntFrq)
> -GCC_ASM_EXPORT (ArmReadCntPct)
> -GCC_ASM_EXPORT (ArmReadCntkCtl)
> -GCC_ASM_EXPORT (ArmWriteCntkCtl)
> -GCC_ASM_EXPORT (ArmReadCntpTval)
> -GCC_ASM_EXPORT (ArmWriteCntpTval)
> -GCC_ASM_EXPORT (ArmReadCntpCtl)
> -GCC_ASM_EXPORT (ArmWriteCntpCtl)
> -GCC_ASM_EXPORT (ArmReadCntvTval)
> -GCC_ASM_EXPORT (ArmWriteCntvTval)
> -GCC_ASM_EXPORT (ArmReadCntvCtl)
> -GCC_ASM_EXPORT (ArmWriteCntvCtl)
> -GCC_ASM_EXPORT (ArmReadCntvCt)
> -GCC_ASM_EXPORT (ArmReadCntpCval)
> -GCC_ASM_EXPORT (ArmWriteCntpCval)
> -GCC_ASM_EXPORT (ArmReadCntvCval)
> -GCC_ASM_EXPORT (ArmWriteCntvCval)
> -GCC_ASM_EXPORT (ArmReadCntvOff)
> -GCC_ASM_EXPORT (ArmWriteCntvOff)
> -
> -ASM_PFX(ArmReadCntFrq):
> +#include <AsmMacroIoLib.h>
> +
> +ASM_FUNC(ArmReadCntFrq)
> mrc p15, 0, r0, c14, c0, 0 @ Read CNTFRQ
> bx lr
>
> -ASM_PFX(ArmWriteCntFrq):
> +ASM_FUNC(ArmWriteCntFrq)
> mcr p15, 0, r0, c14, c0, 0 @ Write to CNTFRQ
> bx lr
>
> -ASM_PFX(ArmReadCntPct):
> +ASM_FUNC(ArmReadCntPct)
> mrrc p15, 0, r0, r1, c14 @ Read CNTPT (Physical counter register)
> bx lr
>
> -ASM_PFX(ArmReadCntkCtl):
> +ASM_FUNC(ArmReadCntkCtl)
> mrc p15, 0, r0, c14, c1, 0 @ Read CNTK_CTL (Timer PL1 Control Register)
> bx lr
>
> -ASM_PFX(ArmWriteCntkCtl):
> +ASM_FUNC(ArmWriteCntkCtl)
> mcr p15, 0, r0, c14, c1, 0 @ Write to CNTK_CTL (Timer PL1 Control Register)
> bx lr
>
> -ASM_PFX(ArmReadCntpTval):
> +ASM_FUNC(ArmReadCntpTval)
> mrc p15, 0, r0, c14, c2, 0 @ Read CNTP_TVAL (PL1 physical timer value register)
> bx lr
>
> -ASM_PFX(ArmWriteCntpTval):
> +ASM_FUNC(ArmWriteCntpTval)
> mcr p15, 0, r0, c14, c2, 0 @ Write to CNTP_TVAL (PL1 physical timer value register)
> bx lr
>
> -ASM_PFX(ArmReadCntpCtl):
> +ASM_FUNC(ArmReadCntpCtl)
> mrc p15, 0, r0, c14, c2, 1 @ Read CNTP_CTL (PL1 Physical Timer Control Register)
> bx lr
>
> -ASM_PFX(ArmWriteCntpCtl):
> +ASM_FUNC(ArmWriteCntpCtl)
> mcr p15, 0, r0, c14, c2, 1 @ Write to CNTP_CTL (PL1 Physical Timer Control Register)
> bx lr
>
> -ASM_PFX(ArmReadCntvTval):
> +ASM_FUNC(ArmReadCntvTval)
> mrc p15, 0, r0, c14, c3, 0 @ Read CNTV_TVAL (Virtual Timer Value register)
> bx lr
>
> -ASM_PFX(ArmWriteCntvTval):
> +ASM_FUNC(ArmWriteCntvTval)
> mcr p15, 0, r0, c14, c3, 0 @ Write to CNTV_TVAL (Virtual Timer Value register)
> bx lr
>
> -ASM_PFX(ArmReadCntvCtl):
> +ASM_FUNC(ArmReadCntvCtl)
> mrc p15, 0, r0, c14, c3, 1 @ Read CNTV_CTL (Virtual Timer Control Register)
> bx lr
>
> -ASM_PFX(ArmWriteCntvCtl):
> +ASM_FUNC(ArmWriteCntvCtl)
> mcr p15, 0, r0, c14, c3, 1 @ Write to CNTV_CTL (Virtual Timer Control Register)
> bx lr
>
> -ASM_PFX(ArmReadCntvCt):
> +ASM_FUNC(ArmReadCntvCt)
> mrrc p15, 1, r0, r1, c14 @ Read CNTVCT (Virtual Count Register)
> bx lr
>
> -ASM_PFX(ArmReadCntpCval):
> +ASM_FUNC(ArmReadCntpCval)
> mrrc p15, 2, r0, r1, c14 @ Read CNTP_CTVAL (Physical Timer Compare Value Register)
> bx lr
>
> -ASM_PFX(ArmWriteCntpCval):
> +ASM_FUNC(ArmWriteCntpCval)
> mcrr p15, 2, r0, r1, c14 @ Write to CNTP_CTVAL (Physical Timer Compare Value Register)
> bx lr
>
> -ASM_PFX(ArmReadCntvCval):
> +ASM_FUNC(ArmReadCntvCval)
> mrrc p15, 3, r0, r1, c14 @ Read CNTV_CTVAL (Virtual Timer Compare Value Register)
> bx lr
>
> -ASM_PFX(ArmWriteCntvCval):
> +ASM_FUNC(ArmWriteCntvCval)
> mcrr p15, 3, r0, r1, c14 @ write to CNTV_CTVAL (Virtual Timer Compare Value Register)
> bx lr
>
> -ASM_PFX(ArmReadCntvOff):
> +ASM_FUNC(ArmReadCntvOff)
> mrrc p15, 4, r0, r1, c14 @ Read CNTVOFF (virtual Offset register)
> bx lr
>
> -ASM_PFX(ArmWriteCntvOff):
> +ASM_FUNC(ArmWriteCntvOff)
> mcrr p15, 4, r0, r1, c14 @ Write to CNTVOFF (Virtual Offset register)
> bx lr
>
> diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
> index 47a4aa5e0d4e..281499b46cbc 100644
> --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
> +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S
> @@ -2,6 +2,7 @@
> #
> # Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
> # Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
> +# Copyright (c) 2016, Linaro Limited. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> @@ -13,45 +14,7 @@
> #
> #------------------------------------------------------------------------------
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT (ArmInvalidateInstructionCache)
> -GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryByMVA)
> -GCC_ASM_EXPORT (ArmInvalidateInstructionCacheEntryToPoUByMVA)
> -GCC_ASM_EXPORT (ArmCleanDataCacheEntryByMVA)
> -GCC_ASM_EXPORT (ArmCleanDataCacheEntryToPoUByMVA)
> -GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryByMVA)
> -GCC_ASM_EXPORT (ArmInvalidateDataCacheEntryBySetWay)
> -GCC_ASM_EXPORT (ArmCleanDataCacheEntryBySetWay)
> -GCC_ASM_EXPORT (ArmCleanInvalidateDataCacheEntryBySetWay)
> -GCC_ASM_EXPORT (ArmEnableMmu)
> -GCC_ASM_EXPORT (ArmDisableMmu)
> -GCC_ASM_EXPORT (ArmDisableCachesAndMmu)
> -GCC_ASM_EXPORT (ArmMmuEnabled)
> -GCC_ASM_EXPORT (ArmEnableDataCache)
> -GCC_ASM_EXPORT (ArmDisableDataCache)
> -GCC_ASM_EXPORT (ArmEnableInstructionCache)
> -GCC_ASM_EXPORT (ArmDisableInstructionCache)
> -GCC_ASM_EXPORT (ArmEnableSWPInstruction)
> -GCC_ASM_EXPORT (ArmEnableBranchPrediction)
> -GCC_ASM_EXPORT (ArmDisableBranchPrediction)
> -GCC_ASM_EXPORT (ArmSetLowVectors)
> -GCC_ASM_EXPORT (ArmSetHighVectors)
> -GCC_ASM_EXPORT (ArmV7AllDataCachesOperation)
> -GCC_ASM_EXPORT (ArmDataMemoryBarrier)
> -GCC_ASM_EXPORT (ArmDataSynchronizationBarrier)
> -GCC_ASM_EXPORT (ArmInstructionSynchronizationBarrier)
> -GCC_ASM_EXPORT (ArmReadVBar)
> -GCC_ASM_EXPORT (ArmWriteVBar)
> -GCC_ASM_EXPORT (ArmEnableVFP)
> -GCC_ASM_EXPORT (ArmCallWFI)
> -GCC_ASM_EXPORT (ArmReadCbar)
> -GCC_ASM_EXPORT (ArmReadMpidr)
> -GCC_ASM_EXPORT (ArmReadTpidrurw)
> -GCC_ASM_EXPORT (ArmWriteTpidrurw)
> -GCC_ASM_EXPORT (ArmIsArchTimerImplemented)
> -GCC_ASM_EXPORT (ArmReadIdPfr1)
> +#include <AsmMacroIoLib.h>
>
> .set DC_ON, (0x1<<2)
> .set IC_ON, (0x1<<12)
> @@ -61,50 +24,50 @@ GCC_ASM_EXPORT (ArmReadIdPfr1)
> .set CTRL_I_BIT, (1 << 12)
>
>
> -ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
> +ASM_FUNC(ArmInvalidateDataCacheEntryByMVA)
> mcr p15, 0, r0, c7, c6, 1 @invalidate single data cache line
> bx lr
>
> -ASM_PFX(ArmCleanDataCacheEntryByMVA):
> +ASM_FUNC(ArmCleanDataCacheEntryByMVA)
> mcr p15, 0, r0, c7, c10, 1 @clean single data cache line
> bx lr
>
>
> -ASM_PFX(ArmCleanDataCacheEntryToPoUByMVA):
> +ASM_FUNC(ArmCleanDataCacheEntryToPoUByMVA)
> mcr p15, 0, r0, c7, c11, 1 @clean single data cache line to PoU
> bx lr
>
> -ASM_PFX(ArmInvalidateInstructionCacheEntryToPoUByMVA):
> +ASM_FUNC(ArmInvalidateInstructionCacheEntryToPoUByMVA)
> mcr p15, 0, r0, c7, c5, 1 @Invalidate single instruction cache line to PoU
> mcr p15, 0, r0, c7, c5, 7 @Invalidate branch predictor
> bx lr
>
> -ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
> +ASM_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
> mcr p15, 0, r0, c7, c14, 1 @clean and invalidate single data cache line
> bx lr
>
>
> -ASM_PFX(ArmInvalidateDataCacheEntryBySetWay):
> +ASM_FUNC(ArmInvalidateDataCacheEntryBySetWay)
> mcr p15, 0, r0, c7, c6, 2 @ Invalidate this line
> bx lr
>
>
> -ASM_PFX(ArmCleanInvalidateDataCacheEntryBySetWay):
> +ASM_FUNC(ArmCleanInvalidateDataCacheEntryBySetWay)
> mcr p15, 0, r0, c7, c14, 2 @ Clean and Invalidate this line
> bx lr
>
>
> -ASM_PFX(ArmCleanDataCacheEntryBySetWay):
> +ASM_FUNC(ArmCleanDataCacheEntryBySetWay)
> mcr p15, 0, r0, c7, c10, 2 @ Clean this line
> bx lr
>
> -ASM_PFX(ArmInvalidateInstructionCache):
> +ASM_FUNC(ArmInvalidateInstructionCache)
> mcr p15,0,R0,c7,c5,0 @Invalidate entire instruction cache
> dsb
> isb
> bx LR
>
> -ASM_PFX(ArmEnableMmu):
> +ASM_FUNC(ArmEnableMmu)
> mrc p15,0,R0,c1,c0,0
> orr R0,R0,#1
> mcr p15,0,R0,c1,c0,0
> @@ -113,7 +76,7 @@ ASM_PFX(ArmEnableMmu):
> bx LR
>
>
> -ASM_PFX(ArmDisableMmu):
> +ASM_FUNC(ArmDisableMmu)
> mrc p15,0,R0,c1,c0,0
> bic R0,R0,#1
> mcr p15,0,R0,c1,c0,0 @Disable MMU
> @@ -124,7 +87,7 @@ ASM_PFX(ArmDisableMmu):
> isb
> bx LR
>
> -ASM_PFX(ArmDisableCachesAndMmu):
> +ASM_FUNC(ArmDisableCachesAndMmu)
> mrc p15, 0, r0, c1, c0, 0 @ Get control register
> bic r0, r0, #CTRL_M_BIT @ Disable MMU
> bic r0, r0, #CTRL_C_BIT @ Disable D Cache
> @@ -134,12 +97,12 @@ ASM_PFX(ArmDisableCachesAndMmu):
> isb
> bx LR
>
> -ASM_PFX(ArmMmuEnabled):
> +ASM_FUNC(ArmMmuEnabled)
> mrc p15,0,R0,c1,c0,0
> and R0,R0,#1
> bx LR
>
> -ASM_PFX(ArmEnableDataCache):
> +ASM_FUNC(ArmEnableDataCache)
> ldr R1,=DC_ON
> mrc p15,0,R0,c1,c0,0 @Read control register configuration data
> orr R0,R0,R1 @Set C bit
> @@ -148,7 +111,7 @@ ASM_PFX(ArmEnableDataCache):
> isb
> bx LR
>
> -ASM_PFX(ArmDisableDataCache):
> +ASM_FUNC(ArmDisableDataCache)
> ldr R1,=DC_ON
> mrc p15,0,R0,c1,c0,0 @Read control register configuration data
> bic R0,R0,R1 @Clear C bit
> @@ -157,7 +120,7 @@ ASM_PFX(ArmDisableDataCache):
> isb
> bx LR
>
> -ASM_PFX(ArmEnableInstructionCache):
> +ASM_FUNC(ArmEnableInstructionCache)
> ldr R1,=IC_ON
> mrc p15,0,R0,c1,c0,0 @Read control register configuration data
> orr R0,R0,R1 @Set I bit
> @@ -166,7 +129,7 @@ ASM_PFX(ArmEnableInstructionCache):
> isb
> bx LR
>
> -ASM_PFX(ArmDisableInstructionCache):
> +ASM_FUNC(ArmDisableInstructionCache)
> ldr R1,=IC_ON
> mrc p15,0,R0,c1,c0,0 @Read control register configuration data
> bic R0,R0,R1 @Clear I bit.
> @@ -175,14 +138,14 @@ ASM_PFX(ArmDisableInstructionCache):
> isb
> bx LR
>
> -ASM_PFX(ArmEnableSWPInstruction):
> +ASM_FUNC(ArmEnableSWPInstruction)
> mrc p15, 0, r0, c1, c0, 0
> orr r0, r0, #0x00000400
> mcr p15, 0, r0, c1, c0, 0
> isb
> bx LR
>
> -ASM_PFX(ArmEnableBranchPrediction):
> +ASM_FUNC(ArmEnableBranchPrediction)
> mrc p15, 0, r0, c1, c0, 0
> orr r0, r0, #0x00000800
> mcr p15, 0, r0, c1, c0, 0
> @@ -190,7 +153,7 @@ ASM_PFX(ArmEnableBranchPrediction):
> isb
> bx LR
>
> -ASM_PFX(ArmDisableBranchPrediction):
> +ASM_FUNC(ArmDisableBranchPrediction)
> mrc p15, 0, r0, c1, c0, 0
> bic r0, r0, #0x00000800
> mcr p15, 0, r0, c1, c0, 0
> @@ -198,21 +161,21 @@ ASM_PFX(ArmDisableBranchPrediction):
> isb
> bx LR
>
> -ASM_PFX(ArmSetLowVectors):
> +ASM_FUNC(ArmSetLowVectors)
> mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
> bic r0, r0, #0x00002000 @ clear V bit
> mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
> isb
> bx LR
>
> -ASM_PFX(ArmSetHighVectors):
> +ASM_FUNC(ArmSetHighVectors)
> mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
> orr r0, r0, #0x00002000 @ Set V bit
> mcr p15, 0, r0, c1, c0, 0 @ Write R0 into SCTLR (Write control register configuration data)
> isb
> bx LR
>
> -ASM_PFX(ArmV7AllDataCachesOperation):
> +ASM_FUNC(ArmV7AllDataCachesOperation)
> stmfd SP!,{r4-r12, LR}
> mov R1, R0 @ Save Function call in R1
> mrc p15, 1, R6, c0, c0, 1 @ Read CLIDR
> @@ -265,24 +228,24 @@ L_Finished:
> ldmfd SP!, {r4-r12, lr}
> bx LR
>
> -ASM_PFX(ArmDataMemoryBarrier):
> +ASM_FUNC(ArmDataMemoryBarrier)
> dmb
> bx LR
>
> -ASM_PFX(ArmDataSynchronizationBarrier):
> +ASM_FUNC(ArmDataSynchronizationBarrier)
> dsb
> bx LR
>
> -ASM_PFX(ArmInstructionSynchronizationBarrier):
> +ASM_FUNC(ArmInstructionSynchronizationBarrier)
> isb
> bx LR
>
> -ASM_PFX(ArmReadVBar):
> +ASM_FUNC(ArmReadVBar)
> # Set the Address of the Vector Table in the VBAR register
> mrc p15, 0, r0, c12, c0, 0
> bx lr
>
> -ASM_PFX(ArmWriteVBar):
> +ASM_FUNC(ArmWriteVBar)
> # Set the Address of the Vector Table in the VBAR register
> mcr p15, 0, r0, c12, c0, 0
> # Ensure the SCTLR.V bit is clear
> @@ -292,7 +255,7 @@ ASM_PFX(ArmWriteVBar):
> isb
> bx lr
>
> -ASM_PFX(ArmEnableVFP):
> +ASM_FUNC(ArmEnableVFP)
> # Read CPACR (Coprocessor Access Control Register)
> mrc p15, 0, r0, c1, c0, 2
> # Enable VPF access (Full Access to CP10, CP11) (V* instructions)
> @@ -309,33 +272,33 @@ ASM_PFX(ArmEnableVFP):
> #endif
> bx lr
>
> -ASM_PFX(ArmCallWFI):
> +ASM_FUNC(ArmCallWFI)
> wfi
> bx lr
>
> #Note: Return 0 in Uniprocessor implementation
> -ASM_PFX(ArmReadCbar):
> +ASM_FUNC(ArmReadCbar)
> mrc p15, 4, r0, c15, c0, 0 @ Read Configuration Base Address Register
> bx lr
>
> -ASM_PFX(ArmReadMpidr):
> +ASM_FUNC(ArmReadMpidr)
> mrc p15, 0, r0, c0, c0, 5 @ read MPIDR
> bx lr
>
> -ASM_PFX(ArmReadTpidrurw):
> +ASM_FUNC(ArmReadTpidrurw)
> mrc p15, 0, r0, c13, c0, 2 @ read TPIDRURW
> bx lr
>
> -ASM_PFX(ArmWriteTpidrurw):
> +ASM_FUNC(ArmWriteTpidrurw)
> mcr p15, 0, r0, c13, c0, 2 @ write TPIDRURW
> bx lr
>
> -ASM_PFX(ArmIsArchTimerImplemented):
> +ASM_FUNC(ArmIsArchTimerImplemented)
> mrc p15, 0, r0, c0, c1, 1 @ Read ID_PFR1
> and r0, r0, #0x000F0000
> bx lr
>
> -ASM_PFX(ArmReadIdPfr1):
> +ASM_FUNC(ArmReadIdPfr1)
> mrc p15, 0, r0, c0, c1, 1 @ Read ID_PFR1 Register
> bx lr
>
> diff --git a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
> index c9f3bd1e8810..9d3dd66b10eb 100644
> --- a/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
> +++ b/ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S
> @@ -2,6 +2,7 @@
> #
> # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> # Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
> +# Copyright (c) 2016, Linaro Limited. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> @@ -15,76 +16,48 @@
>
> #include <AsmMacroIoLibV8.h>
>
> -.text
> -.align 3
> -GCC_ASM_EXPORT (ArmReadMidr)
> -GCC_ASM_EXPORT (ArmCacheInfo)
> -GCC_ASM_EXPORT (ArmGetInterruptState)
> -GCC_ASM_EXPORT (ArmGetFiqState)
> -GCC_ASM_EXPORT (ArmGetTTBR0BaseAddress)
> -GCC_ASM_EXPORT (ArmSetTTBR0)
> -GCC_ASM_EXPORT (ArmGetTCR)
> -GCC_ASM_EXPORT (ArmSetTCR)
> -GCC_ASM_EXPORT (ArmGetMAIR)
> -GCC_ASM_EXPORT (ArmSetMAIR)
> -GCC_ASM_EXPORT (ArmWriteCpacr)
> -GCC_ASM_EXPORT (ArmWriteAuxCr)
> -GCC_ASM_EXPORT (ArmReadAuxCr)
> -GCC_ASM_EXPORT (ArmInvalidateTlb)
> -GCC_ASM_EXPORT (ArmUpdateTranslationTableEntry)
> -GCC_ASM_EXPORT (ArmWriteCptr)
> -GCC_ASM_EXPORT (ArmWriteScr)
> -GCC_ASM_EXPORT (ArmWriteMVBar)
> -GCC_ASM_EXPORT (ArmCallWFE)
> -GCC_ASM_EXPORT (ArmCallSEV)
> -GCC_ASM_EXPORT (ArmReadCpuActlr)
> -GCC_ASM_EXPORT (ArmWriteCpuActlr)
> -GCC_ASM_EXPORT (ArmReadSctlr)
> -
> -#------------------------------------------------------------------------------
> -
> .set DAIF_RD_FIQ_BIT, (1 << 6)
> .set DAIF_RD_IRQ_BIT, (1 << 7)
>
> -ASM_PFX(ArmReadMidr):
> +ASM_FUNC(ArmReadMidr)
> mrs x0, midr_el1 // Read from Main ID Register (MIDR)
> ret
>
> -ASM_PFX(ArmCacheInfo):
> +ASM_FUNC(ArmCacheInfo)
> mrs x0, ctr_el0 // Read from Cache Type Regiter (CTR)
> ret
>
> -ASM_PFX(ArmGetInterruptState):
> +ASM_FUNC(ArmGetInterruptState)
> mrs x0, daif
> tst w0, #DAIF_RD_IRQ_BIT // Check if IRQ is enabled. Enabled if 0 (Z=1)
> cset w0, eq // if Z=1 return 1, else 0
> ret
>
> -ASM_PFX(ArmGetFiqState):
> +ASM_FUNC(ArmGetFiqState)
> mrs x0, daif
> tst w0, #DAIF_RD_FIQ_BIT // Check if FIQ is enabled. Enabled if 0 (Z=1)
> cset w0, eq // if Z=1 return 1, else 0
> ret
>
> -ASM_PFX(ArmWriteCpacr):
> +ASM_FUNC(ArmWriteCpacr)
> msr cpacr_el1, x0 // Coprocessor Access Control Reg (CPACR)
> ret
>
> -ASM_PFX(ArmWriteAuxCr):
> +ASM_FUNC(ArmWriteAuxCr)
> EL1_OR_EL2(x1)
> 1:msr actlr_el1, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
> ret
> 2:msr actlr_el2, x0 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
> ret
>
> -ASM_PFX(ArmReadAuxCr):
> +ASM_FUNC(ArmReadAuxCr)
> EL1_OR_EL2(x1)
> 1:mrs x0, actlr_el1 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
> ret
> 2:mrs x0, actlr_el2 // Aux Control Reg (ACTLR) at EL1. Also available in EL2 and EL3
> ret
>
> -ASM_PFX(ArmSetTTBR0):
> +ASM_FUNC(ArmSetTTBR0)
> EL1_OR_EL2_OR_EL3(x1)
> 1:msr ttbr0_el1, x0 // Translation Table Base Reg 0 (TTBR0)
> b 4f
> @@ -94,17 +67,16 @@ ASM_PFX(ArmSetTTBR0):
> 4:isb
> ret
>
> -ASM_PFX(ArmGetTTBR0BaseAddress):
> +ASM_FUNC(ArmGetTTBR0BaseAddress)
> EL1_OR_EL2(x1)
> 1:mrs x0, ttbr0_el1
> b 3f
> 2:mrs x0, ttbr0_el2
> -3:LoadConstantToReg(0xFFFFFFFFFFFF, x1) /* Look at bottom 48 bits */
> - and x0, x0, x1
> +3:and x0, x0, 0xFFFFFFFFFFFF /* Look at bottom 48 bits */
> isb
> ret
>
> -ASM_PFX(ArmGetTCR):
> +ASM_FUNC(ArmGetTCR)
> EL1_OR_EL2_OR_EL3(x1)
> 1:mrs x0, tcr_el1
> b 4f
> @@ -114,7 +86,7 @@ ASM_PFX(ArmGetTCR):
> 4:isb
> ret
>
> -ASM_PFX(ArmSetTCR):
> +ASM_FUNC(ArmSetTCR)
> EL1_OR_EL2_OR_EL3(x1)
> 1:msr tcr_el1, x0
> b 4f
> @@ -124,7 +96,7 @@ ASM_PFX(ArmSetTCR):
> 4:isb
> ret
>
> -ASM_PFX(ArmGetMAIR):
> +ASM_FUNC(ArmGetMAIR)
> EL1_OR_EL2_OR_EL3(x1)
> 1:mrs x0, mair_el1
> b 4f
> @@ -134,7 +106,7 @@ ASM_PFX(ArmGetMAIR):
> 4:isb
> ret
>
> -ASM_PFX(ArmSetMAIR):
> +ASM_FUNC(ArmSetMAIR)
> EL1_OR_EL2_OR_EL3(x1)
> 1:msr mair_el1, x0
> b 4f
> @@ -151,7 +123,7 @@ ASM_PFX(ArmSetMAIR):
> // IN VOID *TranslationTableEntry // X0
> // IN VOID *MVA // X1
> // );
> -ASM_PFX(ArmUpdateTranslationTableEntry):
> +ASM_FUNC(ArmUpdateTranslationTableEntry)
> dc civac, x0 // Clean and invalidate data line
> dsb sy
> EL1_OR_EL2_OR_EL3(x0)
> @@ -164,7 +136,7 @@ ASM_PFX(ArmUpdateTranslationTableEntry):
> isb
> ret
>
> -ASM_PFX(ArmInvalidateTlb):
> +ASM_FUNC(ArmInvalidateTlb)
> EL1_OR_EL2_OR_EL3(x0)
> 1: tlbi vmalle1
> b 4f
> @@ -175,38 +147,38 @@ ASM_PFX(ArmInvalidateTlb):
> isb
> ret
>
> -ASM_PFX(ArmWriteCptr):
> +ASM_FUNC(ArmWriteCptr)
> msr cptr_el3, x0 // EL3 Coprocessor Trap Reg (CPTR)
> ret
>
> -ASM_PFX(ArmWriteScr):
> +ASM_FUNC(ArmWriteScr)
> msr scr_el3, x0 // Secure configuration register EL3
> isb
> ret
>
> -ASM_PFX(ArmWriteMVBar):
> +ASM_FUNC(ArmWriteMVBar)
> msr vbar_el3, x0 // Exception Vector Base address for Monitor on EL3
> ret
>
> -ASM_PFX(ArmCallWFE):
> +ASM_FUNC(ArmCallWFE)
> wfe
> ret
>
> -ASM_PFX(ArmCallSEV):
> +ASM_FUNC(ArmCallSEV)
> sev
> ret
>
> -ASM_PFX(ArmReadCpuActlr):
> +ASM_FUNC(ArmReadCpuActlr)
> mrs x0, S3_1_c15_c2_0
> ret
>
> -ASM_PFX(ArmWriteCpuActlr):
> +ASM_FUNC(ArmWriteCpuActlr)
> msr S3_1_c15_c2_0, x0
> dsb sy
> isb
> ret
>
> -ASM_PFX(ArmReadSctlr):
> +ASM_FUNC(ArmReadSctlr)
> EL1_OR_EL2_OR_EL3(x1)
> 1:mrs x0, sctlr_el1
> ret
> diff --git a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
> index 5d1194e7e219..a0b5ed500298 100644
> --- a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
> +++ b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S
> @@ -2,6 +2,7 @@
> #
> # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> # Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
> +# Copyright (c) 2016, Linaro Limited. All rights reserved.
> #
> # This program and the accompanying materials
> # are licensed and made available under the terms and conditions of the BSD License
> @@ -15,65 +16,33 @@
>
> #include <AsmMacroIoLib.h>
>
> -.text
> -.align 2
> -GCC_ASM_EXPORT(ArmReadMidr)
> -GCC_ASM_EXPORT(ArmCacheInfo)
> -GCC_ASM_EXPORT(ArmGetInterruptState)
> -GCC_ASM_EXPORT(ArmGetFiqState)
> -GCC_ASM_EXPORT(ArmGetTTBR0BaseAddress)
> -GCC_ASM_EXPORT(ArmSetTTBR0)
> -GCC_ASM_EXPORT(ArmSetTTBCR)
> -GCC_ASM_EXPORT(ArmSetDomainAccessControl)
> -GCC_ASM_EXPORT(CPSRMaskInsert)
> -GCC_ASM_EXPORT(CPSRRead)
> -GCC_ASM_EXPORT(ArmReadCpacr)
> -GCC_ASM_EXPORT(ArmWriteCpacr)
> -GCC_ASM_EXPORT(ArmWriteAuxCr)
> -GCC_ASM_EXPORT(ArmReadAuxCr)
> -GCC_ASM_EXPORT(ArmInvalidateTlb)
> -GCC_ASM_EXPORT(ArmUpdateTranslationTableEntry)
> -GCC_ASM_EXPORT(ArmReadScr)
> -GCC_ASM_EXPORT(ArmWriteScr)
> -GCC_ASM_EXPORT(ArmReadMVBar)
> -GCC_ASM_EXPORT(ArmWriteMVBar)
> -GCC_ASM_EXPORT(ArmReadHVBar)
> -GCC_ASM_EXPORT(ArmWriteHVBar)
> -GCC_ASM_EXPORT(ArmCallWFE)
> -GCC_ASM_EXPORT(ArmCallSEV)
> -GCC_ASM_EXPORT(ArmReadSctlr)
> -GCC_ASM_EXPORT(ArmReadCpuActlr)
> -GCC_ASM_EXPORT(ArmWriteCpuActlr)
> -
> -#------------------------------------------------------------------------------
> -
> -ASM_PFX(ArmReadMidr):
> +ASM_FUNC(ArmReadMidr)
> mrc p15,0,R0,c0,c0,0
> bx LR
>
> -ASM_PFX(ArmCacheInfo):
> +ASM_FUNC(ArmCacheInfo)
> mrc p15,0,R0,c0,c0,1
> bx LR
>
> -ASM_PFX(ArmGetInterruptState):
> +ASM_FUNC(ArmGetInterruptState)
> mrs R0,CPSR
> tst R0,#0x80 @Check if IRQ is enabled.
> moveq R0,#1
> movne R0,#0
> bx LR
>
> -ASM_PFX(ArmGetFiqState):
> +ASM_FUNC(ArmGetFiqState)
> mrs R0,CPSR
> tst R0,#0x40 @Check if FIQ is enabled.
> moveq R0,#1
> movne R0,#0
> bx LR
>
> -ASM_PFX(ArmSetDomainAccessControl):
> +ASM_FUNC(ArmSetDomainAccessControl)
> mcr p15,0,r0,c3,c0,0
> bx lr
>
> -ASM_PFX(CPSRMaskInsert): @ on entry, r0 is the mask and r1 is the field to insert
> +ASM_FUNC(CPSRMaskInsert) @ on entry, r0 is the mask and r1 is the field to insert
> stmfd sp!, {r4-r12, lr} @ save all the banked registers
> mov r3, sp @ copy the stack pointer into a non-banked register
> mrs r2, cpsr @ read the cpsr
> @@ -86,40 +55,40 @@ ASM_PFX(CPSRMaskInsert): @ on entry, r0 is the mask and r1 is the field to in
> ldmfd sp!, {r4-r12, lr} @ restore registers
> bx lr @ return (hopefully thumb-safe!)
>
> -ASM_PFX(CPSRRead):
> +ASM_FUNC(CPSRRead)
> mrs r0, cpsr
> bx lr
>
> -ASM_PFX(ArmReadCpacr):
> +ASM_FUNC(ArmReadCpacr)
> mrc p15, 0, r0, c1, c0, 2
> bx lr
>
> -ASM_PFX(ArmWriteCpacr):
> +ASM_FUNC(ArmWriteCpacr)
> mcr p15, 0, r0, c1, c0, 2
> isb
> bx lr
>
> -ASM_PFX(ArmWriteAuxCr):
> +ASM_FUNC(ArmWriteAuxCr)
> mcr p15, 0, r0, c1, c0, 1
> bx lr
>
> -ASM_PFX(ArmReadAuxCr):
> +ASM_FUNC(ArmReadAuxCr)
> mrc p15, 0, r0, c1, c0, 1
> bx lr
>
> -ASM_PFX(ArmSetTTBR0):
> +ASM_FUNC(ArmSetTTBR0)
> mcr p15,0,r0,c2,c0,0
> isb
> bx lr
>
> -ASM_PFX(ArmSetTTBCR):
> +ASM_FUNC(ArmSetTTBCR)
> mcr p15, 0, r0, c2, c0, 2
> isb
> bx lr
>
> -ASM_PFX(ArmGetTTBR0BaseAddress):
> +ASM_FUNC(ArmGetTTBR0BaseAddress)
> mrc p15,0,r0,c2,c0,0
> - LoadConstantToReg(0xFFFFC000, r1)
> + MOV32 (r1, 0xFFFFC000)
> and r0, r0, r1
> isb
> bx lr
> @@ -130,7 +99,7 @@ ASM_PFX(ArmGetTTBR0BaseAddress):
> // IN VOID *TranslationTableEntry // R0
> // IN VOID *MVA // R1
> // );
> -ASM_PFX(ArmUpdateTranslationTableEntry):
> +ASM_FUNC(ArmUpdateTranslationTableEntry)
> mcr p15,0,R0,c7,c14,1 @ DCCIMVAC Clean data cache by MVA
> dsb
> mcr p15,0,R1,c8,c7,1 @ TLBIMVA TLB Invalidate MVA
> @@ -139,7 +108,7 @@ ASM_PFX(ArmUpdateTranslationTableEntry):
> isb
> bx lr
>
> -ASM_PFX(ArmInvalidateTlb):
> +ASM_FUNC(ArmInvalidateTlb)
> mov r0,#0
> mcr p15,0,r0,c8,c7,0
> mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
> @@ -147,48 +116,48 @@ ASM_PFX(ArmInvalidateTlb):
> isb
> bx lr
>
> -ASM_PFX(ArmReadScr):
> +ASM_FUNC(ArmReadScr)
> mrc p15, 0, r0, c1, c1, 0
> bx lr
>
> -ASM_PFX(ArmWriteScr):
> +ASM_FUNC(ArmWriteScr)
> mcr p15, 0, r0, c1, c1, 0
> isb
> bx lr
>
> -ASM_PFX(ArmReadHVBar):
> +ASM_FUNC(ArmReadHVBar)
> mrc p15, 4, r0, c12, c0, 0
> bx lr
>
> -ASM_PFX(ArmWriteHVBar):
> +ASM_FUNC(ArmWriteHVBar)
> mcr p15, 4, r0, c12, c0, 0
> bx lr
>
> -ASM_PFX(ArmReadMVBar):
> +ASM_FUNC(ArmReadMVBar)
> mrc p15, 0, r0, c12, c0, 1
> bx lr
>
> -ASM_PFX(ArmWriteMVBar):
> +ASM_FUNC(ArmWriteMVBar)
> mcr p15, 0, r0, c12, c0, 1
> bx lr
>
> -ASM_PFX(ArmCallWFE):
> +ASM_FUNC(ArmCallWFE)
> wfe
> bx lr
>
> -ASM_PFX(ArmCallSEV):
> +ASM_FUNC(ArmCallSEV)
> sev
> bx lr
>
> -ASM_PFX(ArmReadSctlr):
> +ASM_FUNC(ArmReadSctlr)
> mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
> bx lr
>
> -ASM_PFX(ArmReadCpuActlr):
> +ASM_FUNC(ArmReadCpuActlr)
> mrc p15, 0, r0, c1, c0, 1
> bx lr
>
> -ASM_PFX(ArmWriteCpuActlr):
> +ASM_FUNC(ArmWriteCpuActlr)
> mcr p15, 0, r0, c1, c0, 1
> dsb
> isb
> diff --git a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
> index 9b87b7f2579f..85b0feee20d4 100644
> --- a/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
> +++ b/ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm
> @@ -13,8 +13,6 @@
> //
> //------------------------------------------------------------------------------
>
> -#include <AsmMacroIoLib.h>
> -
> INCLUDE AsmMacroIoLib.inc
>
>
> @@ -92,7 +90,7 @@
>
> RVCT_ASM_EXPORT ArmGetTTBR0BaseAddress
> mrc p15,0,r0,c2,c0,0
> - LoadConstantToReg(0xFFFFC000, r1)
> + MOV32 r1, 0xFFFFC000
> and r0, r0, r1
> isb
> bx lr
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 13/26] ArmPkg/ArmMmuLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (11 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 12/26] ArmPkg/ArmLib: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 14/26] ArmPkg/ArmSmcLib: " Ard Biesheuvel
` (13 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
index 3834da7bfedd..90192df24f55 100644
--- a/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
+++ b/ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S
@@ -14,8 +14,6 @@
#include <AsmMacroIoLibV8.h>
-GCC_ASM_EXPORT(ArmReplaceLiveTranslationEntry)
-
.set CTRL_M_BIT, (1 << 0)
.macro __replace_entry, el
@@ -52,7 +50,7 @@ GCC_ASM_EXPORT(ArmReplaceLiveTranslationEntry)
// IN UINT64 *Entry,
// IN UINT64 Value
// )
-ASM_PFX(ArmReplaceLiveTranslationEntry):
+ASM_FUNC(ArmReplaceLiveTranslationEntry)
// disable interrupts
mrs x2, daif
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 14/26] ArmPkg/ArmSmcLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (12 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 13/26] ArmPkg/ArmMmuLib: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 15/26] ArmPkg/BaseMemoryLibSm: " Ard Biesheuvel
` (12 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S | 7 ++-----
ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S | 8 +++-----
2 files changed, 5 insertions(+), 10 deletions(-)
diff --git a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S b/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
index 46c17674c199..a8dbb911de5e 100644
--- a/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
+++ b/ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S
@@ -11,12 +11,9 @@
//
//
-.text
-.align 3
+#include <AsmMacroIoLibV8.h>
-GCC_ASM_EXPORT(ArmCallSmc)
-
-ASM_PFX(ArmCallSmc):
+ASM_FUNC(ArmCallSmc)
// Push x0 on the stack - The stack must always be quad-word aligned
str x0, [sp, #-16]!
diff --git a/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S b/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S
index 260fb10fe86b..afb2e9bc901c 100644
--- a/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S
+++ b/ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S
@@ -11,13 +11,11 @@
//
//
-.text
-.align 3
-.arch_extension sec
+#include <AsmMacroIoLibV8.h>
-GCC_ASM_EXPORT(ArmCallSmc)
+.arch_extension sec
-ASM_PFX(ArmCallSmc):
+ASM_FUNC(ArmCallSmc)
push {r4-r8}
// r0 will be popped just after the SMC call
push {r0}
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 15/26] ArmPkg/BaseMemoryLibSm: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (13 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 14/26] ArmPkg/ArmSmcLib: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 16/26] ArmPkg/BaseMemoryLibVstm: " Ard Biesheuvel
` (11 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/BaseMemoryLibStm/Arm/CopyMem.S | 8 +++-----
ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.S | 7 +++----
2 files changed, 6 insertions(+), 9 deletions(-)
diff --git a/ArmPkg/Library/BaseMemoryLibStm/Arm/CopyMem.S b/ArmPkg/Library/BaseMemoryLibStm/Arm/CopyMem.S
index 7985b59279ba..f90589c22594 100644
--- a/ArmPkg/Library/BaseMemoryLibStm/Arm/CopyMem.S
+++ b/ArmPkg/Library/BaseMemoryLibStm/Arm/CopyMem.S
@@ -17,6 +17,8 @@
#
#------------------------------------------------------------------------------
+#include <AsmMacroIoLib.h>
+
/**
Copy Length bytes from Source to Destination. Overlap is OK.
@@ -37,11 +39,7 @@ InternalMemCopyMem (
IN UINTN Length
)
**/
-.text
-.align 2
-GCC_ASM_EXPORT(InternalMemCopyMem)
-
-ASM_PFX(InternalMemCopyMem):
+ASM_FUNC(InternalMemCopyMem)
stmfd sp!, {r4-r11, lr}
// Save the input parameters in extra registers (r11 = destination, r14 = source, r12 = length)
mov r11, r0
diff --git a/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.S b/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.S
index 970d030ca368..242de95f74d1 100644
--- a/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.S
+++ b/ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.S
@@ -17,6 +17,8 @@
#
#------------------------------------------------------------------------------
+#include <AsmMacroIoLib.h>
+
/**
Set Buffer to Value for Size bytes.
@@ -35,12 +37,9 @@ InternalMemSetMem (
)
**/
-.text
.syntax unified
-.align 2
-GCC_ASM_EXPORT(InternalMemSetMem)
-ASM_PFX(InternalMemSetMem):
+ASM_FUNC(InternalMemSetMem)
stmfd sp!, {r4-r11, lr}
tst r0, #3
movne r3, #0
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 16/26] ArmPkg/BaseMemoryLibVstm: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (14 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 15/26] ArmPkg/BaseMemoryLibSm: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 17/26] ArmPkg/CompilerIntrinsicsLib: " Ard Biesheuvel
` (10 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/BaseMemoryLibVstm/Arm/CopyMem.S | 8 +++-----
ArmPkg/Library/BaseMemoryLibVstm/Arm/SetMem.S | 9 +++------
2 files changed, 6 insertions(+), 11 deletions(-)
diff --git a/ArmPkg/Library/BaseMemoryLibVstm/Arm/CopyMem.S b/ArmPkg/Library/BaseMemoryLibVstm/Arm/CopyMem.S
index 0a6e039af9dc..69de4c1fd48e 100644
--- a/ArmPkg/Library/BaseMemoryLibVstm/Arm/CopyMem.S
+++ b/ArmPkg/Library/BaseMemoryLibVstm/Arm/CopyMem.S
@@ -17,6 +17,8 @@
#
#------------------------------------------------------------------------------
+#include <AsmMacroIoLib.h>
+
/**
Copy Length bytes from Source to Destination. Overlap is OK.
@@ -37,11 +39,7 @@ InternalMemCopyMem (
IN UINTN Length
)
**/
-.text
-.align 2
-GCC_ASM_EXPORT(InternalMemCopyMem)
-
-ASM_PFX(InternalMemCopyMem):
+ASM_FUNC(InternalMemCopyMem)
stmfd sp!, {r4, r9, lr}
tst r0, #3
mov r4, r0
diff --git a/ArmPkg/Library/BaseMemoryLibVstm/Arm/SetMem.S b/ArmPkg/Library/BaseMemoryLibVstm/Arm/SetMem.S
index 6a6bb20ec14f..28ba38b79c6a 100644
--- a/ArmPkg/Library/BaseMemoryLibVstm/Arm/SetMem.S
+++ b/ArmPkg/Library/BaseMemoryLibVstm/Arm/SetMem.S
@@ -17,6 +17,8 @@
#
#------------------------------------------------------------------------------
+#include <AsmMacroIoLib.h>
+
/**
Set Buffer to Value for Size bytes.
@@ -34,12 +36,7 @@ InternalMemSetMem (
IN UINT8 Value
)
**/
-
-.text
-.align 2
-GCC_ASM_EXPORT(InternalMemSetMem)
-
-ASM_PFX(InternalMemSetMem):
+ASM_FUNC(InternalMemSetMem)
stmfd sp!, {r4-r7, lr}
tst r0, #3
movne r3, #0
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 17/26] ArmPkg/CompilerIntrinsicsLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (15 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 16/26] ArmPkg/BaseMemoryLibVstm: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 18/26] ArmPkg/SemihostLib: " Ard Biesheuvel
` (9 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections. Note that in some cases, various entry points
refer to different parts of the same routine, so in those cases,
the files have been left untouched.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S | 10 ++--------
ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S | 13 ++++---------
ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S | 7 ++-----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S | 7 ++-----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S | 8 ++------
ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S | 8 +++-----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S | 8 +++-----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S | 8 +++-----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S | 9 +++------
ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S | 7 +++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S | 7 +++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S | 6 ++----
ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S | 6 ++----
26 files changed, 60 insertions(+), 122 deletions(-)
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S b/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S
index 66102da14b6a..4dd6cf207754 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S
@@ -26,16 +26,10 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-
-.text
-.align 2
-
-
-GCC_ASM_EXPORT(memcpy)
-
+#include <AsmMacroIoLibV8.h>
// Taken from Newlib BSD implementation.
-ASM_PFX(memcpy):
+ASM_FUNC(memcpy)
// Copy dst to x6, so we can preserve return value.
mov x6, x0
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S
index 74960b1df185..a68b60cf0c96 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__ashldi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__ashldi3):
+ASM_FUNC(__ashldi3)
cmp r2, #31
bls L2
cmp r2, #63
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S
index 3cee2c1085d8..6d004a553fa6 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__ashrdi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__ashrdi3):
+ASM_FUNC(__ashrdi3)
cmp r2, #31
bls L2
cmp r2, #63
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S
index 4cef26575712..8ebf65bc8c6a 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__clzsi2)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__clzsi2):
+ASM_FUNC(__clzsi2)
@ frame_needed = 1, uses_anonymous_args = 0
stmfd sp!, {r7, lr}
add r7, sp, #0
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S
index 108072eef720..ea957fb198eb 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__ctzsi2)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__ctzsi2):
+ASM_FUNC(__ctzsi2)
uxth r3, r0
cmp r3, #0
moveq ip, #16
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S
index faf70dbf4598..277f4718880f 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S
@@ -12,12 +12,7 @@
#
#------------------------------------------------------------------------------
-.text
-.align 2
-GCC_ASM_EXPORT(__aeabi_uidiv)
-GCC_ASM_EXPORT(__aeabi_uidivmod)
-GCC_ASM_EXPORT(__aeabi_idiv)
-GCC_ASM_EXPORT(__aeabi_idivmod)
+#include <AsmMacroIoLib.h>
# AREA Math, CODE, READONLY
@@ -34,11 +29,11 @@ ASM_PFX(__aeabi_uidiv):
ASM_PFX(__aeabi_uidivmod):
rsbs r12, r1, r0, LSR #4
mov r2, #0
- bcc ASM_PFX(__arm_div4)
+ bcc .L__arm_div4
rsbs r12, r1, r0, LSR #8
- bcc ASM_PFX(__arm_div8)
+ bcc .L__arm_div8
mov r3, #0
- b ASM_PFX(__arm_div_large)
+ b .L__arm_div_large
#
#INT32
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S
index 23c8e8ffbf68..ce55951d3cf7 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__divdi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__divdi3):
+ASM_FUNC(__divdi3)
@ args = 0, pretend = 0, frame = 0
@ frame_needed = 1, uses_anonymous_args = 0
stmfd sp!, {r4, r5, r7, lr}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S
index d585146878d0..835f1c51718f 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__divsi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__divsi3):
+ASM_FUNC(__divsi3)
eor r3, r0, r0, asr #31
eor r2, r1, r1, asr #31
stmfd sp!, {r4, r5, r7, lr}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S
index e7a05de58913..98632cf445cc 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S
@@ -12,10 +12,7 @@
//
//------------------------------------------------------------------------------
-
- .text
- .align 2
- GCC_ASM_EXPORT(__aeabi_ldivmod)
+#include <AsmMacroIoLib.h>
//
// A pair of (unsigned) long longs is returned in {{r0, r1}, {r2, r3}},
@@ -29,7 +26,7 @@
// )//
//
-ASM_PFX(__aeabi_ldivmod):
+ASM_FUNC(__aeabi_ldivmod)
push {r4,lr}
asrs r4,r1,#1
eor r4,r4,r3,LSR #1
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S
index ba8ab1cf5870..f72aca97c137 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S
@@ -12,10 +12,7 @@
#
#------------------------------------------------------------------------------
-
-.text
-.align 2
-GCC_ASM_EXPORT(__aeabi_llsl)
+#include <AsmMacroIoLib.h>
#
#VOID
@@ -26,7 +23,7 @@ GCC_ASM_EXPORT(__aeabi_llsl)
# IN UINT32 Size
# );
#
-ASM_PFX(__aeabi_llsl):
+ASM_FUNC(__aeabi_llsl)
subs r3,r2,#0x20
bpl 1f
rsb r3,r2,#0x20
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S
index 3d2c106270e7..6908bd6b7c08 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S
@@ -12,12 +12,8 @@
#
#------------------------------------------------------------------------------
+#include <AsmMacroIoLib.h>
-.text
-.align 2
-GCC_ASM_EXPORT(__aeabi_llsr)
-
-#
#VOID
#EFIAPI
#__aeabi_llsr (
@@ -26,7 +22,7 @@ GCC_ASM_EXPORT(__aeabi_llsr)
# IN UINT32 Size
# );
#
-ASM_PFX(__aeabi_llsr):
+ASM_FUNC(__aeabi_llsr)
subs r3,r2,#0x20
bpl 1f
rsb r3,r2,#0x20
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S
index a3133206a5df..e17391184a74 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__lshrdi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__lshrdi3):
+ASM_FUNC(__lshrdi3)
cmp r2, #31
bls L2
cmp r2, #63
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S
index 79f95b007d80..d10860d80689 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S
@@ -12,9 +12,7 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT (memmove)
+#include <AsmMacroIoLib.h>
# VOID
# EFIAPI
@@ -23,7 +21,7 @@
# IN CONST VOID *Source,
# IN UINT32 Size
# );
-ASM_PFX(memmove):
+ASM_FUNC(memmove)
CMP r2, #0
BXEQ lr
CMP r0, r1
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S
index 7b618eb06bdb..c8c87d8e23f9 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__moddi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__moddi3):
+ASM_FUNC(__moddi3)
stmfd sp!, {r4, r5, r7, lr}
mov r4, r1, asr #31
add r7, sp, #8
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S
index 047501e929bd..29e2df92b02f 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__modsi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__modsi3):
+ASM_FUNC(__modsi3)
stmfd sp!, {r4, r5, r7, lr}
add r7, sp, #8
mov r5, r0
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S
index dff61ef7a44b..a6689fcee958 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__muldi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__muldi3):
+ASM_FUNC(__muldi3)
stmfd sp!, {r4, r5, r6, r7, lr}
add r7, sp, #12
stmfd sp!, {r8, r10, r11}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S
index 09c9004ddfff..6de2d4513c82 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S
@@ -13,13 +13,11 @@
#**/
#
-.text
-.syntax unified
-.p2align 2
+#include <AsmMacroIoLib.h>
-GCC_ASM_EXPORT(__switch16)
+.syntax unified
-ASM_PFX(__switch16):
+ASM_FUNC(__switch16)
ldrh ip, [lr, #-1]
cmp r0, ip
add r0, lr, r0, lsl #1
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S
index 5b8fd34733cd..f4b3343a787e 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S
@@ -13,13 +13,11 @@
#**/
#
-.text
-.syntax unified
-.p2align 2
+#include <AsmMacroIoLib.h>
-GCC_ASM_EXPORT(__switch32)
+.syntax unified
-ASM_PFX(__switch32):
+ASM_FUNC(__switch32)
ldr ip, [lr, #-1]
cmp r0, ip
add r0, lr, r0, lsl #2
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S
index 871c7c05f7a4..7f84b16c7917 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S
@@ -13,13 +13,11 @@
#**/
#
-.text
-.syntax unified
-.p2align 2
+#include <AsmMacroIoLib.h>
-GCC_ASM_EXPORT(__switch8)
+.syntax unified
-ASM_PFX(__switch8):
+ASM_FUNC(__switch8)
ldrb ip, [lr, #-1]
cmp r0, ip
ldrsbcc r0, [lr, r0]
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S
index 5849998eaf32..7c94dd4fad27 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S
@@ -13,14 +13,11 @@
#**/
#
-.text
-.syntax unified
-.p2align 2
-
-GCC_ASM_EXPORT(__switchu8)
+#include <AsmMacroIoLib.h>
+.syntax unified
-ASM_PFX(__switchu8):
+ASM_FUNC(__switchu8)
ldrb ip,[lr,#-1]
cmp r0,ip
ldrbcc r0,[lr,r0]
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S
index da57423bf1e3..472bbc10563c 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__ucmpdi2)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__ucmpdi2):
+ASM_FUNC(__ucmpdi2)
stmfd sp!, {r4, r5, r8, lr}
cmp r1, r3
mov r8, r0
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S
index cbfb12735003..e173d4ada786 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__udivdi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__udivdi3):
+ASM_FUNC(__udivdi3)
stmfd sp!, {r7, lr}
add r7, sp, #0
sub sp, sp, #8
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S
index 42f4ba404730..b87872d39e07 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S
@@ -12,12 +12,11 @@
#
#------------------------------------------------------------------------------
- .text
+#include <AsmMacroIoLib.h>
+
.syntax unified
- .align 2
- GCC_ASM_EXPORT(__udivmoddi4)
-ASM_PFX(__udivmoddi4):
+ASM_FUNC(__udivmoddi4)
stmfd sp!, {r4, r5, r6, r7, lr}
add r7, sp, #12
stmfd sp!, {r10, r11}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S
index 080aa51c3c54..b70d1d7f0322 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S
@@ -12,12 +12,11 @@
#
#------------------------------------------------------------------------------
- .text
+#include <AsmMacroIoLib.h>
+
.syntax unified
- .align 2
- GCC_ASM_EXPORT(__udivsi3)
-ASM_PFX(__udivsi3):
+ASM_FUNC(__udivsi3)
cmp r1, #0
cmpne r0, #0
stmfd sp!, {r4, r5, r7, lr}
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S
index 6b718a657474..3edff1b715a1 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__umoddi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__umoddi3):
+ASM_FUNC(__umoddi3)
stmfd sp!, {r7, lr}
add r7, sp, #0
sub sp, sp, #16
diff --git a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S
index 76c26beb0b19..2a300601d0f5 100644
--- a/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S
+++ b/ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S
@@ -12,11 +12,9 @@
#
#------------------------------------------------------------------------------
- .text
- .align 2
- GCC_ASM_EXPORT(__umodsi3)
+#include <AsmMacroIoLib.h>
-ASM_PFX(__umodsi3):
+ASM_FUNC(__umodsi3)
stmfd sp!, {r4, r5, r7, lr}
add r7, sp, #8
mov r5, r0
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 18/26] ArmPkg/SemihostLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (16 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 17/26] ArmPkg/CompilerIntrinsicsLib: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 19/26] BeagleBoardPkg: remove unused Sec.inf module Ard Biesheuvel
` (8 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S | 7 ++-----
ArmPkg/Library/SemihostLib/Arm/GccSemihost.S | 8 ++------
2 files changed, 4 insertions(+), 11 deletions(-)
diff --git a/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S b/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S
index 42211cf4ff8f..43a780c9ed3e 100644
--- a/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S
+++ b/ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S
@@ -13,11 +13,8 @@
#
#------------------------------------------------------------------------------
-.text
-.align 2
+#include <AsmMacroIoLibV8.h>
-.globl ASM_PFX(GccSemihostCall)
-
-ASM_PFX(GccSemihostCall):
+ASM_FUNC(GccSemihostCall)
hlt #0xf000
ret
diff --git a/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S b/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S
index c9d13183f61e..770e512cfbca 100644
--- a/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S
+++ b/ArmPkg/Library/SemihostLib/Arm/GccSemihost.S
@@ -12,11 +12,7 @@
#
#------------------------------------------------------------------------------
-.text
-.align 2
-
-.globl ASM_PFX(GccSemihostCall)
-INTERWORK_FUNC(GccSemihostCall)
+#include <AsmMacroIoLib.h>
/*
Semihosting operation request mechanism
@@ -32,7 +28,7 @@ INTERWORK_FUNC(GccSemihostCall)
the svc lr register. That happens to be the one we are using, so we must
save it or we will not be able to return.
*/
-ASM_PFX(GccSemihostCall):
+ASM_FUNC(GccSemihostCall)
stmfd sp!, {lr}
svc #0x123456
ldmfd sp!, {lr}
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 19/26] BeagleBoardPkg: remove unused Sec.inf module
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (17 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 18/26] ArmPkg/SemihostLib: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-11 8:34 ` Leif Lindholm
2016-08-10 15:17 ` [PATCH 20/26] BeagleBoardPkg: add missing ArmMmuLib resolution Ard Biesheuvel
` (7 subsequent siblings)
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
This module is not referenced anywhere, so remove it.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S | 85 ------
BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm | 89 ------
BeagleBoardPkg/Sec/Cache.c | 79 ------
BeagleBoardPkg/Sec/Clock.c | 70 -----
BeagleBoardPkg/Sec/LzmaDecompress.h | 103 -------
BeagleBoardPkg/Sec/PadConfiguration.c | 282 --------------------
BeagleBoardPkg/Sec/Sec.c | 186 -------------
BeagleBoardPkg/Sec/Sec.inf | 73 -----
8 files changed, 967 deletions(-)
diff --git a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S b/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S
deleted file mode 100644
index b656c1e040c5..000000000000
--- a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S
+++ /dev/null
@@ -1,85 +0,0 @@
-#------------------------------------------------------------------------------
-#
-# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-#
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-#include <Library/PcdLib.h>
-
-.text
-.align 3
-
-.globl ASM_PFX(CEntryPoint)
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-
-ASM_PFX(_ModuleEntryPoint):
-
- //Disable L2 cache
- mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
- bic r0, r0, #0x00000002 // disable L2 cache
- mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
-
- //Enable Strict alignment checking & Instruction cache
- mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
- bic r0, r0, #0x00000005 /* clear bits 0, 2 (---- -C-M) */
- orr r0, r0, #0x00000002 /* set bit 1 (A) Align */
- orr r0, r0, #0x00001000 /* set bit 12 (I) enable I-Cache */
- mcr p15, 0, r0, c1, c0, 0
-
- // Enable NEON register in case folks want to use them for optimizations (CopyMem)
- mrc p15, 0, r0, c1, c0, 2
- orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
- mcr p15, 0, r0, c1, c0, 2
- mov r0, #0x40000000 // Set EN bit in FPEXC
- mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
-
-
- // Set CPU vectors to start of DRAM
- LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
- mcr p15, 0, r0, c12, c0, 0
- isb // Sync changes to control registers
-
- // Fill vector table with branchs to current pc (jmp $)
- ldr r1, ShouldNeverGetHere
- movs r2, #0
-FillVectors:
- str r1, [r0, r2]
- adds r2, r2, #4
- cmp r2, #32
- bne FillVectors
-
- /* before we call C code, lets setup the stack pointer in internal RAM */
-stack_pointer_setup:
-
- //
- // Set stack based on PCD values. Need to do it this way to make C code work
- // when it runs from FLASH.
- //
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) /* stack base arg2 */
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */
- add r4, r2, r3
-
- //Enter SVC mode and set up SVC stack pointer
- mov r0,#0x13|0x80|0x40
- msr CPSR_c,r0
- mov r13,r4
-
- // Call C entry point
- LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) /* memory size arg1 */
- LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) /* memory size arg0 */
- blx ASM_PFX(CEntryPoint) /* Assume C code is thumb */
-
-ShouldNeverGetHere:
- /* _CEntryPoint should never return */
- b ShouldNeverGetHere
-
diff --git a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm b/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm
deleted file mode 100644
index 63174d4b8437..000000000000
--- a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm
+++ /dev/null
@@ -1,89 +0,0 @@
-//------------------------------------------------------------------------------
-//
-// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-//
-// This program and the accompanying materials
-// are licensed and made available under the terms and conditions of the BSD License
-// which accompanies this distribution. The full text of the license may be found at
-// http://opensource.org/licenses/bsd-license.php
-//
-// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-//
-//------------------------------------------------------------------------------
-
-#include <AsmMacroIoLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
- INCLUDE AsmMacroIoLib.inc
-
- IMPORT CEntryPoint
- EXPORT _ModuleEntryPoint
-
- PRESERVE8
- AREA ModuleEntryPoint, CODE, READONLY
-
-
-_ModuleEntryPoint
-
- //Disable L2 cache
- mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
- bic r0, r0, #0x00000002 // disable L2 cache
- mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
-
- //Enable Strict alignment checking & Instruction cache
- mrc p15, 0, r0, c1, c0, 0
- bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
- bic r0, r0, #0x00000005 /* clear bits 0, 2 (---- -C-M) */
- orr r0, r0, #0x00000002 /* set bit 1 (A) Align */
- orr r0, r0, #0x00001000 /* set bit 12 (I) enable I-Cache */
- mcr p15, 0, r0, c1, c0, 0
-
- // Enable NEON register in case folks want to use them for optimizations (CopyMem)
- mrc p15, 0, r0, c1, c0, 2
- orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
- mcr p15, 0, r0, c1, c0, 2
- mov r0, #0x40000000 // Set EN bit in FPEXC
- msr FPEXC,r0
-
- // Set CPU vectors to start of DRAM
- LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
- mcr p15, 0, r0, c12, c0, 0
- isb // Sync changes to control registers
-
- // Fill vector table with branchs to current pc (jmp $)
- ldr r1, ShouldNeverGetHere
- movs r2, #0
-FillVectors
- str r1, [r0, r2]
- adds r2, r2, #4
- cmp r2, #32
- bne FillVectors
-
- /* before we call C code, lets setup the stack pointer in internal RAM */
-stack_pointer_setup
-
- //
- // Set stack based on PCD values. Need to do it this way to make C code work
- // when it runs from FLASH.
- //
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
- LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
- add r4, r2, r3
-
- //Enter SVC mode and set up SVC stack pointer
- mov r5,#0x13|0x80|0x40
- msr CPSR_c,r5
- mov r13,r4
-
- // Call C entry point
- LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
- LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory start arg0
- blx CEntryPoint // Assume C code is thumb
-
-ShouldNeverGetHere
- /* _CEntryPoint should never return */
- b ShouldNeverGetHere
-
- END
-
diff --git a/BeagleBoardPkg/Sec/Cache.c b/BeagleBoardPkg/Sec/Cache.c
deleted file mode 100644
index 7399eef5be7c..000000000000
--- a/BeagleBoardPkg/Sec/Cache.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Library/ArmLib.h>
-#include <Library/PrePiLib.h>
-#include <Library/PcdLib.h>
-
-// DDR attributes
-#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
-#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
-
-// SoC registers. L3 interconnects
-#define SOC_REGISTERS_L3_PHYSICAL_BASE 0x68000000
-#define SOC_REGISTERS_L3_PHYSICAL_LENGTH 0x08000000
-#define SOC_REGISTERS_L3_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
-
-// SoC registers. L4 interconnects
-#define SOC_REGISTERS_L4_PHYSICAL_BASE 0x48000000
-#define SOC_REGISTERS_L4_PHYSICAL_LENGTH 0x08000000
-#define SOC_REGISTERS_L4_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
-
-VOID
-InitCache (
- IN UINT32 MemoryBase,
- IN UINT32 MemoryLength
- )
-{
- UINT32 CacheAttributes;
- ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];
- VOID *TranslationTableBase;
- UINTN TranslationTableSize;
-
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
- CacheAttributes = DDR_ATTRIBUTES_CACHED;
- } else {
- CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
- }
-
- // DDR
- MemoryTable[0].PhysicalBase = MemoryBase;
- MemoryTable[0].VirtualBase = MemoryBase;
- MemoryTable[0].Length = MemoryLength;
- MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
-
- // SOC Registers. L3 interconnects
- MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
- MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
- MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
- MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;
-
- // SOC Registers. L4 interconnects
- MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
- MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
- MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
- MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;
-
- // End of Table
- MemoryTable[3].PhysicalBase = 0;
- MemoryTable[3].VirtualBase = 0;
- MemoryTable[3].Length = 0;
- MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
-
- ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
-
- BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
-}
diff --git a/BeagleBoardPkg/Sec/Clock.c b/BeagleBoardPkg/Sec/Clock.c
deleted file mode 100644
index 24fdc71c420f..000000000000
--- a/BeagleBoardPkg/Sec/Clock.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <Library/IoLib.h>
-#include <Library/DebugLib.h>
-
-#include <Omap3530/Omap3530.h>
-
-VOID
-ClockInit (
- VOID
- )
-{
- //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.
-
- // Enable PLL5 and set to 120 MHz as a reference clock.
- MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
- MmioWrite32 (CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));
- MmioWrite32 (CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);
-
- // Turn on functional & interface clocks to the USBHOST power domain
- MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
- | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);
- MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
-
- // Turn on functional & interface clocks to the USBTLL block.
- MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
- MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
-
- // Turn on functional & interface clocks to MMC1 and I2C1 modules.
- MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
- | CM_FCLKEN1_CORE_EN_I2C1_ENABLE);
- MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
- | CM_ICLKEN1_CORE_EN_I2C1_ENABLE);
-
- // Turn on functional & interface clocks to various Peripherals.
- MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
- | CM_FCLKEN_PER_EN_GPT3_ENABLE
- | CM_FCLKEN_PER_EN_GPT4_ENABLE
- | CM_FCLKEN_PER_EN_GPIO2_ENABLE
- | CM_FCLKEN_PER_EN_GPIO3_ENABLE
- | CM_FCLKEN_PER_EN_GPIO4_ENABLE
- | CM_FCLKEN_PER_EN_GPIO5_ENABLE
- | CM_FCLKEN_PER_EN_GPIO6_ENABLE);
- MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
- | CM_ICLKEN_PER_EN_GPT3_ENABLE
- | CM_ICLKEN_PER_EN_GPT4_ENABLE
- | CM_ICLKEN_PER_EN_GPIO2_ENABLE
- | CM_ICLKEN_PER_EN_GPIO3_ENABLE
- | CM_ICLKEN_PER_EN_GPIO4_ENABLE
- | CM_ICLKEN_PER_EN_GPIO5_ENABLE
- | CM_ICLKEN_PER_EN_GPIO6_ENABLE);
-
- // Turn on functional & inteface clocks to various wakeup modules.
- MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
- | CM_FCLKEN_WKUP_EN_WDT2_ENABLE);
- MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
- | CM_ICLKEN_WKUP_EN_WDT2_ENABLE);
-}
diff --git a/BeagleBoardPkg/Sec/LzmaDecompress.h b/BeagleBoardPkg/Sec/LzmaDecompress.h
deleted file mode 100644
index a79ff343d231..000000000000
--- a/BeagleBoardPkg/Sec/LzmaDecompress.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/** @file
- LZMA Decompress Library header file
-
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#ifndef __LZMA_DECOMPRESS_H___
-#define __LZMA_DECOMPRESS_H___
-
-/**
- Examines a GUIDed section and returns the size of the decoded buffer and the
- size of an scratch buffer required to actually decode the data in a GUIDed section.
-
- Examines a GUIDed section specified by InputSection.
- If GUID for InputSection does not match the GUID that this handler supports,
- then RETURN_UNSUPPORTED is returned.
- If the required information can not be retrieved from InputSection,
- then RETURN_INVALID_PARAMETER is returned.
- If the GUID of InputSection does match the GUID that this handler supports,
- then the size required to hold the decoded buffer is returned in OututBufferSize,
- the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field
- from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.
-
- If InputSection is NULL, then ASSERT().
- If OutputBufferSize is NULL, then ASSERT().
- If ScratchBufferSize is NULL, then ASSERT().
- If SectionAttribute is NULL, then ASSERT().
-
-
- @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
- @param[out] OutputBufferSize A pointer to the size, in bytes, of an output buffer required
- if the buffer specified by InputSection were decoded.
- @param[out] ScratchBufferSize A pointer to the size, in bytes, required as scratch space
- if the buffer specified by InputSection were decoded.
- @param[out] SectionAttribute A pointer to the attributes of the GUIDed section. See the Attributes
- field of EFI_GUID_DEFINED_SECTION in the PI Specification.
-
- @retval RETURN_SUCCESS The information about InputSection was returned.
- @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
- @retval RETURN_INVALID_PARAMETER The information can not be retrieved from the section specified by InputSection.
-
-**/
-RETURN_STATUS
-EFIAPI
-LzmaGuidedSectionGetInfo (
- IN CONST VOID *InputSection,
- OUT UINT32 *OutputBufferSize,
- OUT UINT32 *ScratchBufferSize,
- OUT UINT16 *SectionAttribute
- );
-
-/**
- Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.
-
- Decodes the GUIDed section specified by InputSection.
- If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned.
- If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.
- If the GUID of InputSection does match the GUID that this handler supports, then InputSection
- is decoded into the buffer specified by OutputBuffer and the authentication status of this
- decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the
- data in InputSection, then OutputBuffer is set to point at the data in InputSection. Otherwise,
- the decoded data will be placed in caller allocated buffer specified by OutputBuffer.
-
- If InputSection is NULL, then ASSERT().
- If OutputBuffer is NULL, then ASSERT().
- If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().
- If AuthenticationStatus is NULL, then ASSERT().
-
-
- @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
- @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation.
- @param[out] ScratchBuffer A caller allocated buffer that may be required by this function
- as a scratch buffer to perform the decode operation.
- @param[out] AuthenticationStatus
- A pointer to the authentication status of the decoded output buffer.
- See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI
- section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must
- never be set by this handler.
-
- @retval RETURN_SUCCESS The buffer specified by InputSection was decoded.
- @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
- @retval RETURN_INVALID_PARAMETER The section specified by InputSection can not be decoded.
-
-**/
-RETURN_STATUS
-EFIAPI
-LzmaGuidedSectionExtraction (
- IN CONST VOID *InputSection,
- OUT VOID **OutputBuffer,
- OUT VOID *ScratchBuffer, OPTIONAL
- OUT UINT32 *AuthenticationStatus
- );
-
-#endif // __LZMADECOMPRESS_H__
-
diff --git a/BeagleBoardPkg/Sec/PadConfiguration.c b/BeagleBoardPkg/Sec/PadConfiguration.c
deleted file mode 100644
index 2dace3bf38b4..000000000000
--- a/BeagleBoardPkg/Sec/PadConfiguration.c
+++ /dev/null
@@ -1,282 +0,0 @@
-/** @file
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-#include <Library/IoLib.h>
-#include <Library/DebugLib.h>
-#include <Omap3530/Omap3530.h>
-
-#define NUM_PINS 238
-
-PAD_CONFIGURATION PadConfigurationTable[NUM_PINS] = {
- //Pin, MuxMode, PullConfig, InputEnable
- { SDRC_D0, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D1, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D2, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D3, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D4, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D5, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D6, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D7, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D8, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D9, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D10, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D11, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D12, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D13, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D14, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D15, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D16, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D17, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D18, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D19, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D20, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D21, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D22, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D23, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D24, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D25, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D26, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D27, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D28, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D29, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D30, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_D31, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_CLK, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_DQS0, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_CKE0, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { SDRC_CKE1, MUXMODE7, PULL_DISABLED, INPUT },
- { SDRC_DQS1, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_DQS2, MUXMODE0, PULL_DISABLED, INPUT },
- { SDRC_DQS3, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_A1, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A2, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A3, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A4, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A5, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A6, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A7, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A8, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A9, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_A10, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_D0, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D1, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D2, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D3, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D4, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D5, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D6, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D7, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D8, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D9, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D10, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D11, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D12, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D13, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D14, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_D15, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NCS0, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NCS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { GPMC_NCS2, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { GPMC_NCS3, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { GPMC_NCS4, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { GPMC_NCS5, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_NCS6, MUXMODE1, PULL_DISABLED, INPUT },
- { GPMC_NCS7, MUXMODE1, PULL_UP_SELECTED, INPUT },
- { GPMC_CLK, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_NADV_ALE, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NOE, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NWE, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NBE0_CLE, MUXMODE0, PULL_DISABLED, OUTPUT },
- { GPMC_NBE1, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_NWP, MUXMODE0, PULL_DISABLED, INPUT },
- { GPMC_WAIT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { GPMC_WAIT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { GPMC_WAIT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { GPMC_WAIT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { DSS_PCLK, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_HSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_PSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_ACBIAS, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA0, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA1, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA2, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA3, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA4, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA5, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA6, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA7, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA8, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA9, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA10, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA11, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA12, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA13, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA14, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA15, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA16, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA17, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA18, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA19, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA20, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA21, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA22, MUXMODE0, PULL_DISABLED, OUTPUT },
- { DSS_DATA23, MUXMODE0, PULL_DISABLED, OUTPUT },
- { CAM_HS, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { CAM_VS, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { CAM_XCLKA, MUXMODE0, PULL_DISABLED, OUTPUT },
- { CAM_PCLK, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { CAM_FLD, MUXMODE4, PULL_DISABLED, OUTPUT },
- { CAM_D0, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D1, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D2, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D3, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D4, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D5, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D6, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D7, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D8, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D9, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D10, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_D11, MUXMODE0, PULL_DISABLED, INPUT },
- { CAM_XCLKB, MUXMODE0, PULL_DISABLED, OUTPUT },
- { CAM_WEN, MUXMODE4, PULL_DISABLED, INPUT },
- { CAM_STROBE, MUXMODE0, PULL_DISABLED, OUTPUT },
- { CSI2_DX0, MUXMODE0, PULL_DISABLED, INPUT },
- { CSI2_DY0, MUXMODE0, PULL_DISABLED, INPUT },
- { CSI2_DX1, MUXMODE0, PULL_DISABLED, INPUT },
- { CSI2_DY1, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP2_FSX, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP2_CLKX, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP2_DR, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP2_DX, MUXMODE0, PULL_DISABLED, OUTPUT },
- { MMC1_CLK, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { MMC1_CMD, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT4, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT5, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT6, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC1_DAT7, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MMC2_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_CMD, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT0, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT1, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT3, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT4, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT5, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT6, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MMC2_DAT7, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MCBSP3_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP3_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP3_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP3_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART2_CTS, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { UART2_RTS, MUXMODE0, PULL_DISABLED, OUTPUT },
- { UART2_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
- { UART2_RX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART1_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
- { UART1_RTS, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART1_CTS, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART1_RX, MUXMODE0, PULL_DISABLED, INPUT },
- { MCBSP4_CLKX, MUXMODE1, PULL_DISABLED, INPUT },
- { MCBSP4_DR, MUXMODE1, PULL_DISABLED, INPUT },
- { MCBSP4_DX, MUXMODE1, PULL_DISABLED, INPUT },
- { MCBSP4_FSX, MUXMODE1, PULL_DISABLED, INPUT },
- { MCBSP1_CLKR, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP1_FSR, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
- { MCBSP1_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP1_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP1_CLKS, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MCBSP1_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCBSP1_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
- { UART3_CTS_RCTX,MUXMODE0, PULL_UP_SELECTED, INPUT },
- { UART3_RTS_SD, MUXMODE0, PULL_DISABLED, OUTPUT },
- { UART3_RX_IRRX, MUXMODE0, PULL_DISABLED, INPUT },
- { UART3_TX_IRTX, MUXMODE0, PULL_DISABLED, OUTPUT },
- { HSUSB0_CLK, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_STP, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { HSUSB0_DIR, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_NXT, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA0, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA1, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA2, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA3, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA4, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA5, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA6, MUXMODE0, PULL_DISABLED, INPUT },
- { HSUSB0_DATA7, MUXMODE0, PULL_DISABLED, INPUT },
- { I2C1_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { I2C1_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { I2C2_SCL, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { I2C2_SDA, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { I2C3_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { I2C3_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { HDQ_SIO, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
- { MCSPI1_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MCSPI1_SIMO, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { MCSPI1_SOMI, MUXMODE0, PULL_DISABLED, INPUT },
- { MCSPI1_CS0, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { MCSPI1_CS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
- { MCSPI1_CS2, MUXMODE4, PULL_DISABLED, OUTPUT },
- { MCSPI1_CS3, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_CLK, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_SIMO, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_SOMI, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_CS0, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { MCSPI2_CS1, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { SYS_NIRQ, MUXMODE0, PULL_UP_SELECTED, INPUT },
- { SYS_CLKOUT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { ETK_CLK, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
- { ETK_CTL, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
- { ETK_D0, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D1, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D2, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D3, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D4, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D5, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D6, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D7, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D8, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D9, MUXMODE4, PULL_UP_SELECTED, INPUT },
- { ETK_D10, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
- { ETK_D11, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
- { ETK_D12, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D13, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D14, MUXMODE3, PULL_UP_SELECTED, INPUT },
- { ETK_D15, MUXMODE3, PULL_UP_SELECTED, INPUT }
-};
-
-VOID
-PadConfiguration (
- VOID
- )
-{
- UINTN Index;
- UINT16 PadConfiguration;
- UINTN NumPinsToConfigure = sizeof(PadConfigurationTable)/sizeof(PAD_CONFIGURATION);
-
- for (Index = 0; Index < NumPinsToConfigure; Index++) {
- //Set up Pad configuration for particular pin.
- PadConfiguration = (PadConfigurationTable[Index].MuxMode << MUXMODE_OFFSET);
- PadConfiguration |= (PadConfigurationTable[Index].PullConfig << PULL_CONFIG_OFFSET);
- PadConfiguration |= (PadConfigurationTable[Index].InputEnable << INPUTENABLE_OFFSET);
-
- //Configure the pin with specific Pad configuration.
- MmioWrite16(PadConfigurationTable[Index].Pin, PadConfiguration);
- }
-}
diff --git a/BeagleBoardPkg/Sec/Sec.c b/BeagleBoardPkg/Sec/Sec.c
deleted file mode 100644
index 0708396d9792..000000000000
--- a/BeagleBoardPkg/Sec/Sec.c
+++ /dev/null
@@ -1,186 +0,0 @@
-/** @file
- C Entry point for the SEC. First C code after the reset vector.
-
- Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
-
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-#include <PiPei.h>
-
-#include <Library/DebugLib.h>
-#include <Library/PrePiLib.h>
-#include <Library/PcdLib.h>
-#include <Library/IoLib.h>
-#include <Library/OmapLib.h>
-#include <Library/ArmLib.h>
-#include <Library/PeCoffGetEntryPointLib.h>
-#include <Library/DebugAgentLib.h>
-
-#include <Ppi/GuidedSectionExtraction.h>
-#include <Guid/LzmaDecompress.h>
-#include <Omap3530/Omap3530.h>
-
-#include "LzmaDecompress.h"
-
-VOID
-PadConfiguration (
- VOID
- );
-
-VOID
-ClockInit (
- VOID
- );
-
-
-VOID
-TimerInit (
- VOID
- )
-{
- UINTN Timer = FixedPcdGet32(PcdOmap35xxFreeTimer);
- UINT32 TimerBaseAddress = TimerBase(Timer);
-
- // Set source clock for GPT3 & GPT4 to SYS_CLK
- MmioOr32 (CM_CLKSEL_PER, CM_CLKSEL_PER_CLKSEL_GPT3_SYS | CM_CLKSEL_PER_CLKSEL_GPT4_SYS);
-
- // Set count & reload registers
- MmioWrite32 (TimerBaseAddress + GPTIMER_TCRR, 0x00000000);
- MmioWrite32 (TimerBaseAddress + GPTIMER_TLDR, 0x00000000);
-
- // Disable interrupts
- MmioWrite32 (TimerBaseAddress + GPTIMER_TIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_DISABLE | TIER_MAT_IT_DISABLE);
-
- // Start Timer
- MmioWrite32 (TimerBaseAddress + GPTIMER_TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);
-
- //Disable OMAP Watchdog timer (WDT2)
- MmioWrite32 (WDTIMER2_BASE + WSPR, 0xAAAA);
- DEBUG ((EFI_D_ERROR, "Magic delay to disable watchdog timers properly.\n"));
- MmioWrite32 (WDTIMER2_BASE + WSPR, 0x5555);
-}
-
-VOID
-UartInit (
- VOID
- )
-{
- UINTN Uart = FixedPcdGet32(PcdOmap35xxConsoleUart);
- UINT32 UartBaseAddress = UartBase(Uart);
-
- // Set MODE_SELECT=DISABLE before trying to initialize or modify DLL, DLH registers.
- MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_DISABLE);
-
- // Put device in configuration mode.
- MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_ENABLE);
-
- // Programmable divisor N = 48Mhz/16/115200 = 26
- MmioWrite32 (UartBaseAddress + UART_DLL_REG, 3000000/FixedPcdGet64 (PcdUartDefaultBaudRate)); // low divisor
- MmioWrite32 (UartBaseAddress + UART_DLH_REG, 0); // high divisor
-
- // Enter into UART operational mode.
- MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_DISABLE | UART_LCR_CHAR_LENGTH_8);
-
- // Force DTR and RTS output to active
- MmioWrite32 (UartBaseAddress + UART_MCR_REG, UART_MCR_RTS_FORCE_ACTIVE | UART_MCR_DTR_FORCE_ACTIVE);
-
- // Clear & enable fifos
- MmioWrite32 (UartBaseAddress + UART_FCR_REG, UART_FCR_TX_FIFO_CLEAR | UART_FCR_RX_FIFO_CLEAR | UART_FCR_FIFO_ENABLE);
-
- // Restore MODE_SELECT
- MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_UART_16X);
-}
-
-VOID
-InitCache (
- IN UINT32 MemoryBase,
- IN UINT32 MemoryLength
- );
-
-EFI_STATUS
-EFIAPI
-ExtractGuidedSectionLibConstructor (
- VOID
- );
-
-EFI_STATUS
-EFIAPI
-LzmaDecompressLibConstructor (
- VOID
- );
-
-
-VOID
-CEntryPoint (
- IN VOID *MemoryBase,
- IN UINTN MemorySize,
- IN VOID *StackBase,
- IN UINTN StackSize
- )
-{
- VOID *HobBase;
-
- // Build a basic HOB list
- HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));
- CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);
-
- //Set up Pin muxing.
- PadConfiguration ();
-
- // Set up system clocking
- ClockInit ();
-
-
- // Enable program flow prediction, if supported.
- ArmEnableBranchPrediction ();
-
- // Initialize CPU cache
- InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);
-
- // Add memory allocation hob for relocated FD
- BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);
-
- // Add the FVs to the hob list
- BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));
-
- // Start talking
- UartInit ();
-
- InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
- SaveAndSetDebugTimerInterrupt (TRUE);
-
- DEBUG ((EFI_D_ERROR, "UART Enabled\n"));
-
- // Start up a free running timer so that the timer lib will work
- TimerInit ();
-
- // SEC phase needs to run library constructors by hand.
- ExtractGuidedSectionLibConstructor ();
- LzmaDecompressLibConstructor ();
-
- // Build HOBs to pass up our version of stuff the DXE Core needs to save space
- BuildPeCoffLoaderHob ();
- BuildExtractSectionHob (
- &gLzmaCustomDecompressGuid,
- LzmaGuidedSectionGetInfo,
- LzmaGuidedSectionExtraction
- );
-
- // Assume the FV that contains the SEC (our code) also contains a compressed FV.
- DecompressFirstFv ();
-
- // Load the DXE Core and transfer control to it
- LoadDxeCoreFromFv (NULL, 0);
-
- // DXE Core should always load and never return
- ASSERT (FALSE);
-}
-
diff --git a/BeagleBoardPkg/Sec/Sec.inf b/BeagleBoardPkg/Sec/Sec.inf
deleted file mode 100644
index eb6d93c000bb..000000000000
--- a/BeagleBoardPkg/Sec/Sec.inf
+++ /dev/null
@@ -1,73 +0,0 @@
-
-#/** @file
-# SEC - Reset vector code that jumps to C and loads DXE core
-#
-# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
-# This program and the accompanying materials
-# are licensed and made available under the terms and conditions of the BSD License
-# which accompanies this distribution. The full text of the license may be found at
-# http://opensource.org/licenses/bsd-license.php
-#
-# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
-# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-#
-#**/
-
-[Defines]
- INF_VERSION = 0x00010005
- BASE_NAME = BeagleBoardSec
- FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
- MODULE_TYPE = SEC
- VERSION_STRING = 1.0
-
-
-[Sources.ARM]
- Arm/ModuleEntryPoint.S | GCC
- Arm/ModuleEntryPoint.asm | RVCT
-
-[Sources.ARM]
- Sec.c
- Cache.c
- PadConfiguration.c
- Clock.c
-
-[Packages]
- MdePkg/MdePkg.dec
- MdeModulePkg/MdeModulePkg.dec
- EmbeddedPkg/EmbeddedPkg.dec
- ArmPkg/ArmPkg.dec
- Omap35xxPkg/Omap35xxPkg.dec
- IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
-
-[LibraryClasses]
- BaseLib
- DebugLib
- ArmLib
- IoLib
- ExtractGuidedSectionLib
- LzmaDecompressLib
- OmapLib
- PeCoffGetEntryPointLib
- DebugAgentLib
- MemoryAllocationLib
- PrePiHobListPointerLib
-
-[FeaturePcd]
- gEmbeddedTokenSpaceGuid.PcdCacheEnable
-
-[FixedPcd]
- gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
- gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
- gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
- gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
- gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
- gEmbeddedTokenSpaceGuid.PcdPrePiStackBase
- gEmbeddedTokenSpaceGuid.PcdMemoryBase
- gEmbeddedTokenSpaceGuid.PcdMemorySize
-
- gOmap35xxTokenSpaceGuid.PcdOmap35xxConsoleUart
- gOmap35xxTokenSpaceGuid.PcdOmap35xxFreeTimer
-
- gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
-
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 19/26] BeagleBoardPkg: remove unused Sec.inf module
2016-08-10 15:17 ` [PATCH 19/26] BeagleBoardPkg: remove unused Sec.inf module Ard Biesheuvel
@ 2016-08-11 8:34 ` Leif Lindholm
0 siblings, 0 replies; 56+ messages in thread
From: Leif Lindholm @ 2016-08-11 8:34 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek, afish
CC:ing Andrew, who wrote it.
On Wed, Aug 10, 2016 at 05:17:55PM +0200, Ard Biesheuvel wrote:
> This module is not referenced anywhere, so remove it.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S | 85 ------
> BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm | 89 ------
> BeagleBoardPkg/Sec/Cache.c | 79 ------
> BeagleBoardPkg/Sec/Clock.c | 70 -----
> BeagleBoardPkg/Sec/LzmaDecompress.h | 103 -------
> BeagleBoardPkg/Sec/PadConfiguration.c | 282 --------------------
> BeagleBoardPkg/Sec/Sec.c | 186 -------------
> BeagleBoardPkg/Sec/Sec.inf | 73 -----
> 8 files changed, 967 deletions(-)
>
> diff --git a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S b/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S
> deleted file mode 100644
> index b656c1e040c5..000000000000
> --- a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S
> +++ /dev/null
> @@ -1,85 +0,0 @@
> -#------------------------------------------------------------------------------
> -#
> -# Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> -#
> -# This program and the accompanying materials
> -# are licensed and made available under the terms and conditions of the BSD License
> -# which accompanies this distribution. The full text of the license may be found at
> -# http://opensource.org/licenses/bsd-license.php
> -#
> -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -#
> -#------------------------------------------------------------------------------
> -
> -#include <AsmMacroIoLib.h>
> -#include <Library/PcdLib.h>
> -
> -.text
> -.align 3
> -
> -.globl ASM_PFX(CEntryPoint)
> -GCC_ASM_EXPORT(_ModuleEntryPoint)
> -
> -ASM_PFX(_ModuleEntryPoint):
> -
> - //Disable L2 cache
> - mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
> - bic r0, r0, #0x00000002 // disable L2 cache
> - mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
> -
> - //Enable Strict alignment checking & Instruction cache
> - mrc p15, 0, r0, c1, c0, 0
> - bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
> - bic r0, r0, #0x00000005 /* clear bits 0, 2 (---- -C-M) */
> - orr r0, r0, #0x00000002 /* set bit 1 (A) Align */
> - orr r0, r0, #0x00001000 /* set bit 12 (I) enable I-Cache */
> - mcr p15, 0, r0, c1, c0, 0
> -
> - // Enable NEON register in case folks want to use them for optimizations (CopyMem)
> - mrc p15, 0, r0, c1, c0, 2
> - orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
> - mcr p15, 0, r0, c1, c0, 2
> - mov r0, #0x40000000 // Set EN bit in FPEXC
> - mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly
> -
> -
> - // Set CPU vectors to start of DRAM
> - LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
> - mcr p15, 0, r0, c12, c0, 0
> - isb // Sync changes to control registers
> -
> - // Fill vector table with branchs to current pc (jmp $)
> - ldr r1, ShouldNeverGetHere
> - movs r2, #0
> -FillVectors:
> - str r1, [r0, r2]
> - adds r2, r2, #4
> - cmp r2, #32
> - bne FillVectors
> -
> - /* before we call C code, lets setup the stack pointer in internal RAM */
> -stack_pointer_setup:
> -
> - //
> - // Set stack based on PCD values. Need to do it this way to make C code work
> - // when it runs from FLASH.
> - //
> - LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) /* stack base arg2 */
> - LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */
> - add r4, r2, r3
> -
> - //Enter SVC mode and set up SVC stack pointer
> - mov r0,#0x13|0x80|0x40
> - msr CPSR_c,r0
> - mov r13,r4
> -
> - // Call C entry point
> - LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) /* memory size arg1 */
> - LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) /* memory size arg0 */
> - blx ASM_PFX(CEntryPoint) /* Assume C code is thumb */
> -
> -ShouldNeverGetHere:
> - /* _CEntryPoint should never return */
> - b ShouldNeverGetHere
> -
> diff --git a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm b/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm
> deleted file mode 100644
> index 63174d4b8437..000000000000
> --- a/BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm
> +++ /dev/null
> @@ -1,89 +0,0 @@
> -//------------------------------------------------------------------------------
> -//
> -// Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> -//
> -// This program and the accompanying materials
> -// are licensed and made available under the terms and conditions of the BSD License
> -// which accompanies this distribution. The full text of the license may be found at
> -// http://opensource.org/licenses/bsd-license.php
> -//
> -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -//
> -//------------------------------------------------------------------------------
> -
> -#include <AsmMacroIoLib.h>
> -#include <Library/PcdLib.h>
> -#include <AutoGen.h>
> - INCLUDE AsmMacroIoLib.inc
> -
> - IMPORT CEntryPoint
> - EXPORT _ModuleEntryPoint
> -
> - PRESERVE8
> - AREA ModuleEntryPoint, CODE, READONLY
> -
> -
> -_ModuleEntryPoint
> -
> - //Disable L2 cache
> - mrc p15, 0, r0, c1, c0, 1 // read Auxiliary Control Register
> - bic r0, r0, #0x00000002 // disable L2 cache
> - mcr p15, 0, r0, c1, c0, 1 // store Auxiliary Control Register
> -
> - //Enable Strict alignment checking & Instruction cache
> - mrc p15, 0, r0, c1, c0, 0
> - bic r0, r0, #0x00002300 /* clear bits 13, 9:8 (--V- --RS) */
> - bic r0, r0, #0x00000005 /* clear bits 0, 2 (---- -C-M) */
> - orr r0, r0, #0x00000002 /* set bit 1 (A) Align */
> - orr r0, r0, #0x00001000 /* set bit 12 (I) enable I-Cache */
> - mcr p15, 0, r0, c1, c0, 0
> -
> - // Enable NEON register in case folks want to use them for optimizations (CopyMem)
> - mrc p15, 0, r0, c1, c0, 2
> - orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions)
> - mcr p15, 0, r0, c1, c0, 2
> - mov r0, #0x40000000 // Set EN bit in FPEXC
> - msr FPEXC,r0
> -
> - // Set CPU vectors to start of DRAM
> - LoadConstantToReg (FixedPcdGet32(PcdCpuVectorBaseAddress) ,r0) // Get vector base
> - mcr p15, 0, r0, c12, c0, 0
> - isb // Sync changes to control registers
> -
> - // Fill vector table with branchs to current pc (jmp $)
> - ldr r1, ShouldNeverGetHere
> - movs r2, #0
> -FillVectors
> - str r1, [r0, r2]
> - adds r2, r2, #4
> - cmp r2, #32
> - bne FillVectors
> -
> - /* before we call C code, lets setup the stack pointer in internal RAM */
> -stack_pointer_setup
> -
> - //
> - // Set stack based on PCD values. Need to do it this way to make C code work
> - // when it runs from FLASH.
> - //
> - LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) // stack base arg2
> - LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) // stack size arg3
> - add r4, r2, r3
> -
> - //Enter SVC mode and set up SVC stack pointer
> - mov r5,#0x13|0x80|0x40
> - msr CPSR_c,r5
> - mov r13,r4
> -
> - // Call C entry point
> - LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) // memory size arg1
> - LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) // memory start arg0
> - blx CEntryPoint // Assume C code is thumb
> -
> -ShouldNeverGetHere
> - /* _CEntryPoint should never return */
> - b ShouldNeverGetHere
> -
> - END
> -
> diff --git a/BeagleBoardPkg/Sec/Cache.c b/BeagleBoardPkg/Sec/Cache.c
> deleted file mode 100644
> index 7399eef5be7c..000000000000
> --- a/BeagleBoardPkg/Sec/Cache.c
> +++ /dev/null
> @@ -1,79 +0,0 @@
> -/** @file
> -
> - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> -
> - This program and the accompanying materials
> - are licensed and made available under the terms and conditions of the BSD License
> - which accompanies this distribution. The full text of the license may be found at
> - http://opensource.org/licenses/bsd-license.php
> -
> - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -**/
> -
> -#include <PiPei.h>
> -
> -#include <Library/ArmLib.h>
> -#include <Library/PrePiLib.h>
> -#include <Library/PcdLib.h>
> -
> -// DDR attributes
> -#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
> -#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
> -
> -// SoC registers. L3 interconnects
> -#define SOC_REGISTERS_L3_PHYSICAL_BASE 0x68000000
> -#define SOC_REGISTERS_L3_PHYSICAL_LENGTH 0x08000000
> -#define SOC_REGISTERS_L3_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
> -
> -// SoC registers. L4 interconnects
> -#define SOC_REGISTERS_L4_PHYSICAL_BASE 0x48000000
> -#define SOC_REGISTERS_L4_PHYSICAL_LENGTH 0x08000000
> -#define SOC_REGISTERS_L4_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
> -
> -VOID
> -InitCache (
> - IN UINT32 MemoryBase,
> - IN UINT32 MemoryLength
> - )
> -{
> - UINT32 CacheAttributes;
> - ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];
> - VOID *TranslationTableBase;
> - UINTN TranslationTableSize;
> -
> - if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
> - CacheAttributes = DDR_ATTRIBUTES_CACHED;
> - } else {
> - CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
> - }
> -
> - // DDR
> - MemoryTable[0].PhysicalBase = MemoryBase;
> - MemoryTable[0].VirtualBase = MemoryBase;
> - MemoryTable[0].Length = MemoryLength;
> - MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
> -
> - // SOC Registers. L3 interconnects
> - MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
> - MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;
> - MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;
> - MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;
> -
> - // SOC Registers. L4 interconnects
> - MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
> - MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;
> - MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;
> - MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;
> -
> - // End of Table
> - MemoryTable[3].PhysicalBase = 0;
> - MemoryTable[3].VirtualBase = 0;
> - MemoryTable[3].Length = 0;
> - MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
> -
> - ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
> -
> - BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
> -}
> diff --git a/BeagleBoardPkg/Sec/Clock.c b/BeagleBoardPkg/Sec/Clock.c
> deleted file mode 100644
> index 24fdc71c420f..000000000000
> --- a/BeagleBoardPkg/Sec/Clock.c
> +++ /dev/null
> @@ -1,70 +0,0 @@
> -/** @file
> -
> - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> -
> - This program and the accompanying materials
> - are licensed and made available under the terms and conditions of the BSD License
> - which accompanies this distribution. The full text of the license may be found at
> - http://opensource.org/licenses/bsd-license.php
> -
> - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -**/
> -
> -#include <Library/IoLib.h>
> -#include <Library/DebugLib.h>
> -
> -#include <Omap3530/Omap3530.h>
> -
> -VOID
> -ClockInit (
> - VOID
> - )
> -{
> - //DPLL1 - DPLL4 are configured part of Configuration header which OMAP3 ROM parses.
> -
> - // Enable PLL5 and set to 120 MHz as a reference clock.
> - MmioWrite32 (CM_CLKSEL4_PLL, CM_CLKSEL_PLL_MULT(120) | CM_CLKSEL_PLL_DIV(13));
> - MmioWrite32 (CM_CLKSEL5_PLL, CM_CLKSEL_DIV_120M(1));
> - MmioWrite32 (CM_CLKEN2_PLL, CM_CLKEN_FREQSEL_075_100 | CM_CLKEN_ENABLE);
> -
> - // Turn on functional & interface clocks to the USBHOST power domain
> - MmioOr32(CM_FCLKEN_USBHOST, CM_FCLKEN_USBHOST_EN_USBHOST2_ENABLE
> - | CM_FCLKEN_USBHOST_EN_USBHOST1_ENABLE);
> - MmioOr32(CM_ICLKEN_USBHOST, CM_ICLKEN_USBHOST_EN_USBHOST_ENABLE);
> -
> - // Turn on functional & interface clocks to the USBTLL block.
> - MmioOr32(CM_FCLKEN3_CORE, CM_FCLKEN3_CORE_EN_USBTLL_ENABLE);
> - MmioOr32(CM_ICLKEN3_CORE, CM_ICLKEN3_CORE_EN_USBTLL_ENABLE);
> -
> - // Turn on functional & interface clocks to MMC1 and I2C1 modules.
> - MmioOr32(CM_FCLKEN1_CORE, CM_FCLKEN1_CORE_EN_MMC1_ENABLE
> - | CM_FCLKEN1_CORE_EN_I2C1_ENABLE);
> - MmioOr32(CM_ICLKEN1_CORE, CM_ICLKEN1_CORE_EN_MMC1_ENABLE
> - | CM_ICLKEN1_CORE_EN_I2C1_ENABLE);
> -
> - // Turn on functional & interface clocks to various Peripherals.
> - MmioOr32(CM_FCLKEN_PER, CM_FCLKEN_PER_EN_UART3_ENABLE
> - | CM_FCLKEN_PER_EN_GPT3_ENABLE
> - | CM_FCLKEN_PER_EN_GPT4_ENABLE
> - | CM_FCLKEN_PER_EN_GPIO2_ENABLE
> - | CM_FCLKEN_PER_EN_GPIO3_ENABLE
> - | CM_FCLKEN_PER_EN_GPIO4_ENABLE
> - | CM_FCLKEN_PER_EN_GPIO5_ENABLE
> - | CM_FCLKEN_PER_EN_GPIO6_ENABLE);
> - MmioOr32(CM_ICLKEN_PER, CM_ICLKEN_PER_EN_UART3_ENABLE
> - | CM_ICLKEN_PER_EN_GPT3_ENABLE
> - | CM_ICLKEN_PER_EN_GPT4_ENABLE
> - | CM_ICLKEN_PER_EN_GPIO2_ENABLE
> - | CM_ICLKEN_PER_EN_GPIO3_ENABLE
> - | CM_ICLKEN_PER_EN_GPIO4_ENABLE
> - | CM_ICLKEN_PER_EN_GPIO5_ENABLE
> - | CM_ICLKEN_PER_EN_GPIO6_ENABLE);
> -
> - // Turn on functional & inteface clocks to various wakeup modules.
> - MmioOr32(CM_FCLKEN_WKUP, CM_FCLKEN_WKUP_EN_GPIO1_ENABLE
> - | CM_FCLKEN_WKUP_EN_WDT2_ENABLE);
> - MmioOr32(CM_ICLKEN_WKUP, CM_ICLKEN_WKUP_EN_GPIO1_ENABLE
> - | CM_ICLKEN_WKUP_EN_WDT2_ENABLE);
> -}
> diff --git a/BeagleBoardPkg/Sec/LzmaDecompress.h b/BeagleBoardPkg/Sec/LzmaDecompress.h
> deleted file mode 100644
> index a79ff343d231..000000000000
> --- a/BeagleBoardPkg/Sec/LzmaDecompress.h
> +++ /dev/null
> @@ -1,103 +0,0 @@
> -/** @file
> - LZMA Decompress Library header file
> -
> - Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
> - This program and the accompanying materials
> - are licensed and made available under the terms and conditions of the BSD License
> - which accompanies this distribution. The full text of the license may be found at
> - http://opensource.org/licenses/bsd-license.php
> -
> - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -**/
> -
> -#ifndef __LZMA_DECOMPRESS_H___
> -#define __LZMA_DECOMPRESS_H___
> -
> -/**
> - Examines a GUIDed section and returns the size of the decoded buffer and the
> - size of an scratch buffer required to actually decode the data in a GUIDed section.
> -
> - Examines a GUIDed section specified by InputSection.
> - If GUID for InputSection does not match the GUID that this handler supports,
> - then RETURN_UNSUPPORTED is returned.
> - If the required information can not be retrieved from InputSection,
> - then RETURN_INVALID_PARAMETER is returned.
> - If the GUID of InputSection does match the GUID that this handler supports,
> - then the size required to hold the decoded buffer is returned in OututBufferSize,
> - the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field
> - from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.
> -
> - If InputSection is NULL, then ASSERT().
> - If OutputBufferSize is NULL, then ASSERT().
> - If ScratchBufferSize is NULL, then ASSERT().
> - If SectionAttribute is NULL, then ASSERT().
> -
> -
> - @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
> - @param[out] OutputBufferSize A pointer to the size, in bytes, of an output buffer required
> - if the buffer specified by InputSection were decoded.
> - @param[out] ScratchBufferSize A pointer to the size, in bytes, required as scratch space
> - if the buffer specified by InputSection were decoded.
> - @param[out] SectionAttribute A pointer to the attributes of the GUIDed section. See the Attributes
> - field of EFI_GUID_DEFINED_SECTION in the PI Specification.
> -
> - @retval RETURN_SUCCESS The information about InputSection was returned.
> - @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
> - @retval RETURN_INVALID_PARAMETER The information can not be retrieved from the section specified by InputSection.
> -
> -**/
> -RETURN_STATUS
> -EFIAPI
> -LzmaGuidedSectionGetInfo (
> - IN CONST VOID *InputSection,
> - OUT UINT32 *OutputBufferSize,
> - OUT UINT32 *ScratchBufferSize,
> - OUT UINT16 *SectionAttribute
> - );
> -
> -/**
> - Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.
> -
> - Decodes the GUIDed section specified by InputSection.
> - If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned.
> - If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.
> - If the GUID of InputSection does match the GUID that this handler supports, then InputSection
> - is decoded into the buffer specified by OutputBuffer and the authentication status of this
> - decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the
> - data in InputSection, then OutputBuffer is set to point at the data in InputSection. Otherwise,
> - the decoded data will be placed in caller allocated buffer specified by OutputBuffer.
> -
> - If InputSection is NULL, then ASSERT().
> - If OutputBuffer is NULL, then ASSERT().
> - If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().
> - If AuthenticationStatus is NULL, then ASSERT().
> -
> -
> - @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.
> - @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation.
> - @param[out] ScratchBuffer A caller allocated buffer that may be required by this function
> - as a scratch buffer to perform the decode operation.
> - @param[out] AuthenticationStatus
> - A pointer to the authentication status of the decoded output buffer.
> - See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI
> - section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must
> - never be set by this handler.
> -
> - @retval RETURN_SUCCESS The buffer specified by InputSection was decoded.
> - @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.
> - @retval RETURN_INVALID_PARAMETER The section specified by InputSection can not be decoded.
> -
> -**/
> -RETURN_STATUS
> -EFIAPI
> -LzmaGuidedSectionExtraction (
> - IN CONST VOID *InputSection,
> - OUT VOID **OutputBuffer,
> - OUT VOID *ScratchBuffer, OPTIONAL
> - OUT UINT32 *AuthenticationStatus
> - );
> -
> -#endif // __LZMADECOMPRESS_H__
> -
> diff --git a/BeagleBoardPkg/Sec/PadConfiguration.c b/BeagleBoardPkg/Sec/PadConfiguration.c
> deleted file mode 100644
> index 2dace3bf38b4..000000000000
> --- a/BeagleBoardPkg/Sec/PadConfiguration.c
> +++ /dev/null
> @@ -1,282 +0,0 @@
> -/** @file
> -
> - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> -
> - This program and the accompanying materials
> - are licensed and made available under the terms and conditions of the BSD License
> - which accompanies this distribution. The full text of the license may be found at
> - http://opensource.org/licenses/bsd-license.php
> -
> - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -**/
> -
> -#include <PiPei.h>
> -#include <Library/IoLib.h>
> -#include <Library/DebugLib.h>
> -#include <Omap3530/Omap3530.h>
> -
> -#define NUM_PINS 238
> -
> -PAD_CONFIGURATION PadConfigurationTable[NUM_PINS] = {
> - //Pin, MuxMode, PullConfig, InputEnable
> - { SDRC_D0, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D1, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D2, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D3, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D4, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D5, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D6, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D7, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D8, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D9, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D10, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D11, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D12, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D13, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D14, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D15, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D16, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D17, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D18, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D19, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D20, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D21, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D22, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D23, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D24, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D25, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D26, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D27, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D28, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D29, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D30, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_D31, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_CLK, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_DQS0, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_CKE0, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { SDRC_CKE1, MUXMODE7, PULL_DISABLED, INPUT },
> - { SDRC_DQS1, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_DQS2, MUXMODE0, PULL_DISABLED, INPUT },
> - { SDRC_DQS3, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_A1, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_A2, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_A3, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_A4, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_A5, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_A6, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_A7, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_A8, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_A9, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_A10, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_D0, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D1, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D2, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D3, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D4, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D5, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D6, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D7, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D8, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D9, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D10, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D11, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D12, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D13, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D14, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_D15, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_NCS0, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_NCS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
> - { GPMC_NCS2, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
> - { GPMC_NCS3, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
> - { GPMC_NCS4, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
> - { GPMC_NCS5, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_NCS6, MUXMODE1, PULL_DISABLED, INPUT },
> - { GPMC_NCS7, MUXMODE1, PULL_UP_SELECTED, INPUT },
> - { GPMC_CLK, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_NADV_ALE, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_NOE, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_NWE, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_NBE0_CLE, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { GPMC_NBE1, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_NWP, MUXMODE0, PULL_DISABLED, INPUT },
> - { GPMC_WAIT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { GPMC_WAIT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { GPMC_WAIT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { GPMC_WAIT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { DSS_PCLK, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_HSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_PSYNC, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_ACBIAS, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA0, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA1, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA2, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA3, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA4, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA5, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA6, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA7, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA8, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA9, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA10, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA11, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA12, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA13, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA14, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA15, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA16, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA17, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA18, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA19, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA20, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA21, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA22, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { DSS_DATA23, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { CAM_HS, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { CAM_VS, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { CAM_XCLKA, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { CAM_PCLK, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { CAM_FLD, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { CAM_D0, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D1, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D2, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D3, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D4, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D5, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D6, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D7, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D8, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D9, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D10, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_D11, MUXMODE0, PULL_DISABLED, INPUT },
> - { CAM_XCLKB, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { CAM_WEN, MUXMODE4, PULL_DISABLED, INPUT },
> - { CAM_STROBE, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { CSI2_DX0, MUXMODE0, PULL_DISABLED, INPUT },
> - { CSI2_DY0, MUXMODE0, PULL_DISABLED, INPUT },
> - { CSI2_DX1, MUXMODE0, PULL_DISABLED, INPUT },
> - { CSI2_DY1, MUXMODE0, PULL_DISABLED, INPUT },
> - { MCBSP2_FSX, MUXMODE0, PULL_DISABLED, INPUT },
> - { MCBSP2_CLKX, MUXMODE0, PULL_DISABLED, INPUT },
> - { MCBSP2_DR, MUXMODE0, PULL_DISABLED, INPUT },
> - { MCBSP2_DX, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { MMC1_CLK, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
> - { MMC1_CMD, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MMC1_DAT0, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MMC1_DAT1, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MMC1_DAT2, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MMC1_DAT3, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MMC1_DAT4, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MMC1_DAT5, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MMC1_DAT6, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MMC1_DAT7, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MMC2_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MMC2_CMD, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MMC2_DAT0, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MMC2_DAT1, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MMC2_DAT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MMC2_DAT3, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MMC2_DAT4, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MMC2_DAT5, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MMC2_DAT6, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MMC2_DAT7, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MCBSP3_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { MCBSP3_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { MCBSP3_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { MCBSP3_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { UART2_CTS, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { UART2_RTS, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { UART2_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { UART2_RX, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { UART1_TX, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { UART1_RTS, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { UART1_CTS, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { UART1_RX, MUXMODE0, PULL_DISABLED, INPUT },
> - { MCBSP4_CLKX, MUXMODE1, PULL_DISABLED, INPUT },
> - { MCBSP4_DR, MUXMODE1, PULL_DISABLED, INPUT },
> - { MCBSP4_DX, MUXMODE1, PULL_DISABLED, INPUT },
> - { MCBSP4_FSX, MUXMODE1, PULL_DISABLED, INPUT },
> - { MCBSP1_CLKR, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { MCBSP1_FSR, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
> - { MCBSP1_DX, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { MCBSP1_DR, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { MCBSP1_CLKS, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MCBSP1_FSX, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { MCBSP1_CLKX, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { UART3_CTS_RCTX,MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { UART3_RTS_SD, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { UART3_RX_IRRX, MUXMODE0, PULL_DISABLED, INPUT },
> - { UART3_TX_IRTX, MUXMODE0, PULL_DISABLED, OUTPUT },
> - { HSUSB0_CLK, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_STP, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
> - { HSUSB0_DIR, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_NXT, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_DATA0, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_DATA1, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_DATA2, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_DATA3, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_DATA4, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_DATA5, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_DATA6, MUXMODE0, PULL_DISABLED, INPUT },
> - { HSUSB0_DATA7, MUXMODE0, PULL_DISABLED, INPUT },
> - { I2C1_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { I2C1_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { I2C2_SCL, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { I2C2_SDA, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { I2C3_SCL, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { I2C3_SDA, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { HDQ_SIO, MUXMODE4, PULL_UP_SELECTED, OUTPUT },
> - { MCSPI1_CLK, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MCSPI1_SIMO, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { MCSPI1_SOMI, MUXMODE0, PULL_DISABLED, INPUT },
> - { MCSPI1_CS0, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { MCSPI1_CS1, MUXMODE0, PULL_UP_SELECTED, OUTPUT },
> - { MCSPI1_CS2, MUXMODE4, PULL_DISABLED, OUTPUT },
> - { MCSPI1_CS3, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { MCSPI2_CLK, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { MCSPI2_SIMO, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { MCSPI2_SOMI, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { MCSPI2_CS0, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { MCSPI2_CS1, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { SYS_NIRQ, MUXMODE0, PULL_UP_SELECTED, INPUT },
> - { SYS_CLKOUT2, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { ETK_CLK, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
> - { ETK_CTL, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
> - { ETK_D0, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D1, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D2, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D3, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D4, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D5, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D6, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D7, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D8, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D9, MUXMODE4, PULL_UP_SELECTED, INPUT },
> - { ETK_D10, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
> - { ETK_D11, MUXMODE3, PULL_UP_SELECTED, OUTPUT },
> - { ETK_D12, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D13, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D14, MUXMODE3, PULL_UP_SELECTED, INPUT },
> - { ETK_D15, MUXMODE3, PULL_UP_SELECTED, INPUT }
> -};
> -
> -VOID
> -PadConfiguration (
> - VOID
> - )
> -{
> - UINTN Index;
> - UINT16 PadConfiguration;
> - UINTN NumPinsToConfigure = sizeof(PadConfigurationTable)/sizeof(PAD_CONFIGURATION);
> -
> - for (Index = 0; Index < NumPinsToConfigure; Index++) {
> - //Set up Pad configuration for particular pin.
> - PadConfiguration = (PadConfigurationTable[Index].MuxMode << MUXMODE_OFFSET);
> - PadConfiguration |= (PadConfigurationTable[Index].PullConfig << PULL_CONFIG_OFFSET);
> - PadConfiguration |= (PadConfigurationTable[Index].InputEnable << INPUTENABLE_OFFSET);
> -
> - //Configure the pin with specific Pad configuration.
> - MmioWrite16(PadConfigurationTable[Index].Pin, PadConfiguration);
> - }
> -}
> diff --git a/BeagleBoardPkg/Sec/Sec.c b/BeagleBoardPkg/Sec/Sec.c
> deleted file mode 100644
> index 0708396d9792..000000000000
> --- a/BeagleBoardPkg/Sec/Sec.c
> +++ /dev/null
> @@ -1,186 +0,0 @@
> -/** @file
> - C Entry point for the SEC. First C code after the reset vector.
> -
> - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
> -
> - This program and the accompanying materials
> - are licensed and made available under the terms and conditions of the BSD License
> - which accompanies this distribution. The full text of the license may be found at
> - http://opensource.org/licenses/bsd-license.php
> -
> - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -
> -**/
> -
> -#include <PiPei.h>
> -
> -#include <Library/DebugLib.h>
> -#include <Library/PrePiLib.h>
> -#include <Library/PcdLib.h>
> -#include <Library/IoLib.h>
> -#include <Library/OmapLib.h>
> -#include <Library/ArmLib.h>
> -#include <Library/PeCoffGetEntryPointLib.h>
> -#include <Library/DebugAgentLib.h>
> -
> -#include <Ppi/GuidedSectionExtraction.h>
> -#include <Guid/LzmaDecompress.h>
> -#include <Omap3530/Omap3530.h>
> -
> -#include "LzmaDecompress.h"
> -
> -VOID
> -PadConfiguration (
> - VOID
> - );
> -
> -VOID
> -ClockInit (
> - VOID
> - );
> -
> -
> -VOID
> -TimerInit (
> - VOID
> - )
> -{
> - UINTN Timer = FixedPcdGet32(PcdOmap35xxFreeTimer);
> - UINT32 TimerBaseAddress = TimerBase(Timer);
> -
> - // Set source clock for GPT3 & GPT4 to SYS_CLK
> - MmioOr32 (CM_CLKSEL_PER, CM_CLKSEL_PER_CLKSEL_GPT3_SYS | CM_CLKSEL_PER_CLKSEL_GPT4_SYS);
> -
> - // Set count & reload registers
> - MmioWrite32 (TimerBaseAddress + GPTIMER_TCRR, 0x00000000);
> - MmioWrite32 (TimerBaseAddress + GPTIMER_TLDR, 0x00000000);
> -
> - // Disable interrupts
> - MmioWrite32 (TimerBaseAddress + GPTIMER_TIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_DISABLE | TIER_MAT_IT_DISABLE);
> -
> - // Start Timer
> - MmioWrite32 (TimerBaseAddress + GPTIMER_TCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);
> -
> - //Disable OMAP Watchdog timer (WDT2)
> - MmioWrite32 (WDTIMER2_BASE + WSPR, 0xAAAA);
> - DEBUG ((EFI_D_ERROR, "Magic delay to disable watchdog timers properly.\n"));
> - MmioWrite32 (WDTIMER2_BASE + WSPR, 0x5555);
> -}
> -
> -VOID
> -UartInit (
> - VOID
> - )
> -{
> - UINTN Uart = FixedPcdGet32(PcdOmap35xxConsoleUart);
> - UINT32 UartBaseAddress = UartBase(Uart);
> -
> - // Set MODE_SELECT=DISABLE before trying to initialize or modify DLL, DLH registers.
> - MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_DISABLE);
> -
> - // Put device in configuration mode.
> - MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_ENABLE);
> -
> - // Programmable divisor N = 48Mhz/16/115200 = 26
> - MmioWrite32 (UartBaseAddress + UART_DLL_REG, 3000000/FixedPcdGet64 (PcdUartDefaultBaudRate)); // low divisor
> - MmioWrite32 (UartBaseAddress + UART_DLH_REG, 0); // high divisor
> -
> - // Enter into UART operational mode.
> - MmioWrite32 (UartBaseAddress + UART_LCR_REG, UART_LCR_DIV_EN_DISABLE | UART_LCR_CHAR_LENGTH_8);
> -
> - // Force DTR and RTS output to active
> - MmioWrite32 (UartBaseAddress + UART_MCR_REG, UART_MCR_RTS_FORCE_ACTIVE | UART_MCR_DTR_FORCE_ACTIVE);
> -
> - // Clear & enable fifos
> - MmioWrite32 (UartBaseAddress + UART_FCR_REG, UART_FCR_TX_FIFO_CLEAR | UART_FCR_RX_FIFO_CLEAR | UART_FCR_FIFO_ENABLE);
> -
> - // Restore MODE_SELECT
> - MmioWrite32 (UartBaseAddress + UART_MDR1_REG, UART_MDR1_MODE_SELECT_UART_16X);
> -}
> -
> -VOID
> -InitCache (
> - IN UINT32 MemoryBase,
> - IN UINT32 MemoryLength
> - );
> -
> -EFI_STATUS
> -EFIAPI
> -ExtractGuidedSectionLibConstructor (
> - VOID
> - );
> -
> -EFI_STATUS
> -EFIAPI
> -LzmaDecompressLibConstructor (
> - VOID
> - );
> -
> -
> -VOID
> -CEntryPoint (
> - IN VOID *MemoryBase,
> - IN UINTN MemorySize,
> - IN VOID *StackBase,
> - IN UINTN StackSize
> - )
> -{
> - VOID *HobBase;
> -
> - // Build a basic HOB list
> - HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));
> - CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);
> -
> - //Set up Pin muxing.
> - PadConfiguration ();
> -
> - // Set up system clocking
> - ClockInit ();
> -
> -
> - // Enable program flow prediction, if supported.
> - ArmEnableBranchPrediction ();
> -
> - // Initialize CPU cache
> - InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);
> -
> - // Add memory allocation hob for relocated FD
> - BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);
> -
> - // Add the FVs to the hob list
> - BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));
> -
> - // Start talking
> - UartInit ();
> -
> - InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
> - SaveAndSetDebugTimerInterrupt (TRUE);
> -
> - DEBUG ((EFI_D_ERROR, "UART Enabled\n"));
> -
> - // Start up a free running timer so that the timer lib will work
> - TimerInit ();
> -
> - // SEC phase needs to run library constructors by hand.
> - ExtractGuidedSectionLibConstructor ();
> - LzmaDecompressLibConstructor ();
> -
> - // Build HOBs to pass up our version of stuff the DXE Core needs to save space
> - BuildPeCoffLoaderHob ();
> - BuildExtractSectionHob (
> - &gLzmaCustomDecompressGuid,
> - LzmaGuidedSectionGetInfo,
> - LzmaGuidedSectionExtraction
> - );
> -
> - // Assume the FV that contains the SEC (our code) also contains a compressed FV.
> - DecompressFirstFv ();
> -
> - // Load the DXE Core and transfer control to it
> - LoadDxeCoreFromFv (NULL, 0);
> -
> - // DXE Core should always load and never return
> - ASSERT (FALSE);
> -}
> -
> diff --git a/BeagleBoardPkg/Sec/Sec.inf b/BeagleBoardPkg/Sec/Sec.inf
> deleted file mode 100644
> index eb6d93c000bb..000000000000
> --- a/BeagleBoardPkg/Sec/Sec.inf
> +++ /dev/null
> @@ -1,73 +0,0 @@
> -
> -#/** @file
> -# SEC - Reset vector code that jumps to C and loads DXE core
> -#
> -# Copyright (c) 2008, Apple Inc. All rights reserved.<BR>
> -# This program and the accompanying materials
> -# are licensed and made available under the terms and conditions of the BSD License
> -# which accompanies this distribution. The full text of the license may be found at
> -# http://opensource.org/licenses/bsd-license.php
> -#
> -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
> -#
> -#**/
> -
> -[Defines]
> - INF_VERSION = 0x00010005
> - BASE_NAME = BeagleBoardSec
> - FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
> - MODULE_TYPE = SEC
> - VERSION_STRING = 1.0
> -
> -
> -[Sources.ARM]
> - Arm/ModuleEntryPoint.S | GCC
> - Arm/ModuleEntryPoint.asm | RVCT
> -
> -[Sources.ARM]
> - Sec.c
> - Cache.c
> - PadConfiguration.c
> - Clock.c
> -
> -[Packages]
> - MdePkg/MdePkg.dec
> - MdeModulePkg/MdeModulePkg.dec
> - EmbeddedPkg/EmbeddedPkg.dec
> - ArmPkg/ArmPkg.dec
> - Omap35xxPkg/Omap35xxPkg.dec
> - IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
> -
> -[LibraryClasses]
> - BaseLib
> - DebugLib
> - ArmLib
> - IoLib
> - ExtractGuidedSectionLib
> - LzmaDecompressLib
> - OmapLib
> - PeCoffGetEntryPointLib
> - DebugAgentLib
> - MemoryAllocationLib
> - PrePiHobListPointerLib
> -
> -[FeaturePcd]
> - gEmbeddedTokenSpaceGuid.PcdCacheEnable
> -
> -[FixedPcd]
> - gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
> - gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
> - gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
> - gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
> - gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
> - gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
> - gEmbeddedTokenSpaceGuid.PcdPrePiStackBase
> - gEmbeddedTokenSpaceGuid.PcdMemoryBase
> - gEmbeddedTokenSpaceGuid.PcdMemorySize
> -
> - gOmap35xxTokenSpaceGuid.PcdOmap35xxConsoleUart
> - gOmap35xxTokenSpaceGuid.PcdOmap35xxFreeTimer
> -
> - gArmTokenSpaceGuid.PcdCpuVectorBaseAddress
> -
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 20/26] BeagleBoardPkg: add missing ArmMmuLib resolution
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (18 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 19/26] BeagleBoardPkg: remove unused Sec.inf module Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-10 15:17 ` [PATCH 21/26] ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macro Ard Biesheuvel
` (6 subsequent siblings)
26 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
BeagleBoardPkg/BeagleBoardPkg.dsc | 1 +
1 file changed, 1 insertion(+)
diff --git a/BeagleBoardPkg/BeagleBoardPkg.dsc b/BeagleBoardPkg/BeagleBoardPkg.dsc
index aedaf4e042ec..b4a645ba9149 100644
--- a/BeagleBoardPkg/BeagleBoardPkg.dsc
+++ b/BeagleBoardPkg/BeagleBoardPkg.dsc
@@ -33,6 +33,7 @@ [Defines]
[LibraryClasses.common]
ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+ ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf
ArmPlatformLib|BeagleBoardPkg/Library/BeagleBoardLib/BeagleBoardLib.inf
ArmCpuLib|ArmPkg/Drivers/ArmCpuLib/ArmCortexA8Lib/ArmCortexA8Lib.inf
ArmPlatformStackLib|ArmPlatformPkg/Library/ArmPlatformStackLib/ArmPlatformStackLib.inf
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 21/26] ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (19 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 20/26] BeagleBoardPkg: add missing ArmMmuLib resolution Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-11 8:37 ` Leif Lindholm
2016-08-10 15:17 ` [PATCH 22/26] ArmPlatformPkg/PrePi: " Ard Biesheuvel
` (5 subsequent siblings)
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S | 37 ++++++--------------
ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S | 36 ++++++-------------
2 files changed, 21 insertions(+), 52 deletions(-)
diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S
index 73b249ca5ffd..4bdf08d1a98a 100644
--- a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S
+++ b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S
@@ -15,25 +15,12 @@
#include <AsmMacroIoLibV8.h>
#include <Library/ArmLib.h>
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
-
-PrimaryCoreMpid: .word 0x0
-
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 2) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #7
@@ -43,33 +30,29 @@ ASM_PFX(ArmPlatformGetCorePosition):
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- ldr x0, =PrimaryCoreMpid
- ldrh w0, [x0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ ldr w0, PrimaryCoreMpid
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
- ldrh w1, [x1]
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and x0, x0, x1
- ldr x1, =PrimaryCoreMpid
- ldrh w1, [x1]
+ ldr w1, PrimaryCoreMpid
cmp w0, w1
- mov x0, #1
- mov x1, #0
- csel x0, x0, x1, eq
+ cset x0, eq
ret
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
// The trusted firmware passes the primary CPU MPID through x0 register.
// Save it in a variable.
- ldr x1, =PrimaryCoreMpid
+ adr x1, PrimaryCoreMpid
str w0, [x1]
ret
+PrimaryCoreMpid: .word 0x0
diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S
index 2efb5451b88b..a7e904eac697 100644
--- a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S
+++ b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S
@@ -12,22 +12,9 @@
*
**/
-#include <AsmMacroIoLibV8.h>
+#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
-
-PrimaryCoreMpid: .word 0x0
-
//
// Return the core position from the value of its MpId register
//
@@ -41,7 +28,7 @@ PrimaryCoreMpid: .word 0x0
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 2) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #7
@@ -59,9 +46,8 @@ ASM_PFX(ArmPlatformGetCorePosition):
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- ldr r0, =PrimaryCoreMpid
- ldr r0, [r0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ LDRL (r0, PrimaryCoreMpid)
bx lr
//
@@ -77,13 +63,11 @@ ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and r0, r0, r1
- ldr r1, =PrimaryCoreMpid
- ldr r1, [r1]
+ LDRL (r1, PrimaryCoreMpid)
cmp r0, r1
moveq r0, #1
@@ -97,9 +81,11 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
// or PrePeiCore modules. It allows to retrieve arguments passed to
// the UEFI firmware through the CPU registers.
//
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
// The trusted firmware passes the primary CPU MPID through r0 register.
// Save it in a variable.
- ldr r1, =PrimaryCoreMpid
+ adr r1, PrimaryCoreMpid
str r0, [r1]
bx lr
+
+PrimaryCoreMpid: .word 0x0
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 21/26] ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 ` [PATCH 21/26] ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macro Ard Biesheuvel
@ 2016-08-11 8:37 ` Leif Lindholm
0 siblings, 0 replies; 56+ messages in thread
From: Leif Lindholm @ 2016-08-11 8:37 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
On Wed, Aug 10, 2016 at 05:17:57PM +0200, Ard Biesheuvel wrote:
> Annotate functions with ASM_FUNC() so that they are emitted into
> separate sections.
Also replacing LoadConstantToReg. Add that to commit message and:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S | 37 ++++++--------------
> ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S | 36 ++++++-------------
> 2 files changed, 21 insertions(+), 52 deletions(-)
>
> diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S
> index 73b249ca5ffd..4bdf08d1a98a 100644
> --- a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S
> +++ b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S
> @@ -15,25 +15,12 @@
> #include <AsmMacroIoLibV8.h>
> #include <Library/ArmLib.h>
>
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> -
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
> -
> -
> -PrimaryCoreMpid: .word 0x0
> -
> //UINTN
> //ArmPlatformGetCorePosition (
> // IN UINTN MpId
> // );
> // With this function: CorePos = (ClusterId * 2) + CoreId
> -ASM_PFX(ArmPlatformGetCorePosition):
> +ASM_FUNC(ArmPlatformGetCorePosition)
> and x1, x0, #ARM_CORE_MASK
> and x0, x0, #ARM_CLUSTER_MASK
> add x0, x1, x0, LSR #7
> @@ -43,33 +30,29 @@ ASM_PFX(ArmPlatformGetCorePosition):
> //ArmPlatformGetPrimaryCoreMpId (
> // VOID
> // );
> -ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> - ldr x0, =PrimaryCoreMpid
> - ldrh w0, [x0]
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> + ldr w0, PrimaryCoreMpid
> ret
>
> //UINTN
> //ArmPlatformIsPrimaryCore (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformIsPrimaryCore):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
> - ldrh w1, [x1]
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
> and x0, x0, x1
>
> - ldr x1, =PrimaryCoreMpid
> - ldrh w1, [x1]
> + ldr w1, PrimaryCoreMpid
>
> cmp w0, w1
> - mov x0, #1
> - mov x1, #0
> - csel x0, x0, x1, eq
> + cset x0, eq
> ret
>
> -ASM_PFX(ArmPlatformPeiBootAction):
> +ASM_FUNC(ArmPlatformPeiBootAction)
> // The trusted firmware passes the primary CPU MPID through x0 register.
> // Save it in a variable.
> - ldr x1, =PrimaryCoreMpid
> + adr x1, PrimaryCoreMpid
> str w0, [x1]
> ret
>
> +PrimaryCoreMpid: .word 0x0
> diff --git a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S
> index 2efb5451b88b..a7e904eac697 100644
> --- a/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S
> +++ b/ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S
> @@ -12,22 +12,9 @@
> *
> **/
>
> -#include <AsmMacroIoLibV8.h>
> +#include <AsmMacroIoLib.h>
> #include <Library/ArmLib.h>
>
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> -
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
> -
> -
> -PrimaryCoreMpid: .word 0x0
> -
> //
> // Return the core position from the value of its MpId register
> //
> @@ -41,7 +28,7 @@ PrimaryCoreMpid: .word 0x0
> // IN UINTN MpId
> // );
> // With this function: CorePos = (ClusterId * 2) + CoreId
> -ASM_PFX(ArmPlatformGetCorePosition):
> +ASM_FUNC(ArmPlatformGetCorePosition)
> and r1, r0, #ARM_CORE_MASK
> and r0, r0, #ARM_CLUSTER_MASK
> add r0, r1, r0, LSR #7
> @@ -59,9 +46,8 @@ ASM_PFX(ArmPlatformGetCorePosition):
> //ArmPlatformGetPrimaryCoreMpId (
> // VOID
> // );
> -ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> - ldr r0, =PrimaryCoreMpid
> - ldr r0, [r0]
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> + LDRL (r0, PrimaryCoreMpid)
> bx lr
>
> //
> @@ -77,13 +63,11 @@ ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> //ArmPlatformIsPrimaryCore (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformIsPrimaryCore):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
> - ldr r1, [r1]
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
> and r0, r0, r1
>
> - ldr r1, =PrimaryCoreMpid
> - ldr r1, [r1]
> + LDRL (r1, PrimaryCoreMpid)
>
> cmp r0, r1
> moveq r0, #1
> @@ -97,9 +81,11 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
> // or PrePeiCore modules. It allows to retrieve arguments passed to
> // the UEFI firmware through the CPU registers.
> //
> -ASM_PFX(ArmPlatformPeiBootAction):
> +ASM_FUNC(ArmPlatformPeiBootAction)
> // The trusted firmware passes the primary CPU MPID through r0 register.
> // Save it in a variable.
> - ldr r1, =PrimaryCoreMpid
> + adr r1, PrimaryCoreMpid
> str r0, [r1]
> bx lr
> +
> +PrimaryCoreMpid: .word 0x0
> --
> 2.7.4
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (20 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 21/26] ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macro Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-11 8:38 ` Leif Lindholm
2016-08-10 15:17 ` [PATCH 23/26] ArmPlatformPkg/PrePeiCore: " Ard Biesheuvel
` (4 subsequent siblings)
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49 ++++++-------------
ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50 ++++++--------------
2 files changed, 29 insertions(+), 70 deletions(-)
diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
index 9538c70a237c..d0530a874726 100644
--- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
@@ -12,24 +12,10 @@
//
#include <AsmMacroIoLibV8.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-
-.text
-.align 3
-
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_IMPORT(ArmReadMpidr)
-GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
-GCC_ASM_IMPORT(ArmPlatformStackSet)
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
-StartupAddr: .8byte ASM_PFX(CEntryPoint)
-ASM_PFX(mSystemMemoryEnd): .8byte 0
+ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
-ASM_PFX(_ModuleEntryPoint):
+ASM_FUNC(_ModuleEntryPoint)
// Do early platform specific actions
bl ASM_PFX(ArmPlatformPeiBootAction)
@@ -49,10 +35,8 @@ _SystemMemoryEndInit:
cmp x1, #0
bne _SetupStackPosition
- LoadConstantToReg (FixedPcdGet64(PcdSystemMemoryBase), x1)
- LoadConstantToReg (FixedPcdGet64(PcdSystemMemorySize), x2)
- sub x2, x2, #1
- add x1, x1, x2
+ MOV64 (x1, FixedPcdGet64(PcdSystemMemoryBase) + FixedPcdGet64(PcdSystemMemorySize) - 1)
+
// Update the global variable
adr x2, mSystemMemoryEnd
str x1, [x2]
@@ -61,13 +45,13 @@ _SetupStackPosition:
// r1 = SystemMemoryTop
// Calculate Top of the Firmware Device
- LoadConstantToReg (FixedPcdGet64(PcdFdBaseAddress), x2)
- LoadConstantToReg (FixedPcdGet32(PcdFdSize), x3)
+ MOV64 (x2, FixedPcdGet64(PcdFdBaseAddress))
+ MOV32 (x3, FixedPcdGet32(PcdFdSize) - 1)
sub x3, x3, #1
add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
// UEFI Memory Size (stacks are allocated in this region)
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), x4)
+ MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
//
// Reserve the memory for the UEFI region (contain stacks on its top)
@@ -98,9 +82,7 @@ _SetupAlignedStack:
_SetupOverflowStack:
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
// aligned (4KB)
- LoadConstantToReg (EFI_PAGE_MASK, x11)
- and x11, x11, x1
- sub x1, x1, x11
+ and x1, x1, ~EFI_PAGE_MASK
_GetBaseUefiMemory:
// Calculate the Base of the UEFI Memory
@@ -109,22 +91,19 @@ _GetBaseUefiMemory:
_GetStackBase:
// r1 = The top of the Mpcore Stacks
// Stack for the primary core = PrimaryCoreStack
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
+ MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
sub x12, x1, x2
// Stack for the secondary core = Number of Cores - 1
- LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
- sub x0, x0, #1
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
- mul x1, x1, x0
+ MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
sub x12, x12, x1
// x12 = The base of the MpCore Stacks (primary stack & secondary stacks)
mov x0, x12
mov x1, x10
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
+ MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
+ MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
bl ASM_PFX(ArmPlatformStackSet)
// Is it the Primary Core ?
@@ -140,7 +119,7 @@ _PrepareArguments:
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
- ldr x4, StartupAddr
+ ldr x4, =ASM_PFX(CEntryPoint)
// Jump to PrePiCore C code
// x0 = MpId
@@ -150,3 +129,5 @@ _PrepareArguments:
_NeverReturn:
b _NeverReturn
+
+ASM_PFX(mSystemMemoryEnd): .8byte 0
diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
index 1311efc5cb2c..b7127ce9fb4c 100644
--- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
@@ -12,28 +12,12 @@
//
#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
#include <Chipset/ArmV7.h>
-.text
-.align 3
-
-GCC_ASM_IMPORT(CEntryPoint)
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_IMPORT(ArmReadMpidr)
-GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
-GCC_ASM_IMPORT(ArmPlatformStackSet)
-GCC_ASM_EXPORT(_ModuleEntryPoint)
GCC_ASM_EXPORT(mSystemMemoryEnd)
-StartupAddr: .word CEntryPoint
-mSystemMemoryEnd: .8byte 0
-
-
-ASM_PFX(_ModuleEntryPoint):
+ASM_FUNC(_ModuleEntryPoint)
// Do early platform specific actions
bl ASM_PFX(ArmPlatformPeiBootAction)
@@ -57,10 +41,8 @@ _SystemMemoryEndInit:
cmp r1, #0
bne _SetupStackPosition
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
- sub r2, r2, #1
- add r1, r1, r2
+ MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) + FixedPcdGet32(PcdSystemMemorySize) - 1)
+
// Update the global variable
adr r2, mSystemMemoryEnd
str r1, [r2]
@@ -69,13 +51,12 @@ _SetupStackPosition:
// r1 = SystemMemoryTop
// Calculate Top of the Firmware Device
- LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
- LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
- sub r3, r3, #1
+ MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))
+ MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)
add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
// UEFI Memory Size (stacks are allocated in this region)
- LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
+ MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
//
// Reserve the memory for the UEFI region (contain stacks on its top)
@@ -106,9 +87,8 @@ _SetupAlignedStack:
_SetupOverflowStack:
// Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
// aligned (4KB)
- LoadConstantToReg (EFI_PAGE_MASK, r9)
- and r9, r9, r1
- sub r1, r1, r9
+ MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)
+ and r1, r1, r9
_GetBaseUefiMemory:
// Calculate the Base of the UEFI Memory
@@ -117,22 +97,19 @@ _GetBaseUefiMemory:
_GetStackBase:
// r1 = The top of the Mpcore Stacks
// Stack for the primary core = PrimaryCoreStack
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
+ MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
sub r10, r1, r2
// Stack for the secondary core = Number of Cores - 1
- LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
- sub r0, r0, #1
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
- mul r1, r1, r0
+ MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
sub r10, r10, r1
// r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
mov r0, r10
mov r1, r8
//ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
+ MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
+ MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
bl ASM_PFX(ArmPlatformStackSet)
// Is it the Primary Core ?
@@ -149,7 +126,7 @@ _PrepareArguments:
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
- ldr r4, StartupAddr
+ ldr r4, =ASM_PFX(CEntryPoint)
// Jump to PrePiCore C code
// r0 = MpId
@@ -160,3 +137,4 @@ _PrepareArguments:
_NeverReturn:
b _NeverReturn
+ASM_PFX(mSystemMemoryEnd): .8byte 0
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-10 15:17 ` [PATCH 22/26] ArmPlatformPkg/PrePi: " Ard Biesheuvel
@ 2016-08-11 8:38 ` Leif Lindholm
2016-08-31 4:33 ` Michael Zimmermann
0 siblings, 1 reply; 56+ messages in thread
From: Leif Lindholm @ 2016-08-11 8:38 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
On Wed, Aug 10, 2016 at 05:17:58PM +0200, Ard Biesheuvel wrote:
> Annotate functions with ASM_FUNC() so that they are emitted into
> separate sections.
Also replacing LoadConstantToReg. Add that to commit message and:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49 ++++++-------------
> ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50 ++++++--------------
> 2 files changed, 29 insertions(+), 70 deletions(-)
>
> diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> index 9538c70a237c..d0530a874726 100644
> --- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> +++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> @@ -12,24 +12,10 @@
> //
>
> #include <AsmMacroIoLibV8.h>
> -#include <Base.h>
> -#include <Library/PcdLib.h>
> -#include <AutoGen.h>
> -
> -.text
> -.align 3
> -
> -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_IMPORT(ArmReadMpidr)
> -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_IMPORT(ArmPlatformStackSet)
> -GCC_ASM_EXPORT(_ModuleEntryPoint)
> -ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>
> -StartupAddr: .8byte ASM_PFX(CEntryPoint)
> -ASM_PFX(mSystemMemoryEnd): .8byte 0
> +ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>
> -ASM_PFX(_ModuleEntryPoint):
> +ASM_FUNC(_ModuleEntryPoint)
> // Do early platform specific actions
> bl ASM_PFX(ArmPlatformPeiBootAction)
>
> @@ -49,10 +35,8 @@ _SystemMemoryEndInit:
> cmp x1, #0
> bne _SetupStackPosition
>
> - LoadConstantToReg (FixedPcdGet64(PcdSystemMemoryBase), x1)
> - LoadConstantToReg (FixedPcdGet64(PcdSystemMemorySize), x2)
> - sub x2, x2, #1
> - add x1, x1, x2
> + MOV64 (x1, FixedPcdGet64(PcdSystemMemoryBase) + FixedPcdGet64(PcdSystemMemorySize) - 1)
> +
> // Update the global variable
> adr x2, mSystemMemoryEnd
> str x1, [x2]
> @@ -61,13 +45,13 @@ _SetupStackPosition:
> // r1 = SystemMemoryTop
>
> // Calculate Top of the Firmware Device
> - LoadConstantToReg (FixedPcdGet64(PcdFdBaseAddress), x2)
> - LoadConstantToReg (FixedPcdGet32(PcdFdSize), x3)
> + MOV64 (x2, FixedPcdGet64(PcdFdBaseAddress))
> + MOV32 (x3, FixedPcdGet32(PcdFdSize) - 1)
> sub x3, x3, #1
> add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
>
> // UEFI Memory Size (stacks are allocated in this region)
> - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), x4)
> + MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>
> //
> // Reserve the memory for the UEFI region (contain stacks on its top)
> @@ -98,9 +82,7 @@ _SetupAlignedStack:
> _SetupOverflowStack:
> // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
> // aligned (4KB)
> - LoadConstantToReg (EFI_PAGE_MASK, x11)
> - and x11, x11, x1
> - sub x1, x1, x11
> + and x1, x1, ~EFI_PAGE_MASK
>
> _GetBaseUefiMemory:
> // Calculate the Base of the UEFI Memory
> @@ -109,22 +91,19 @@ _GetBaseUefiMemory:
> _GetStackBase:
> // r1 = The top of the Mpcore Stacks
> // Stack for the primary core = PrimaryCoreStack
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
> + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> sub x12, x1, x2
>
> // Stack for the secondary core = Number of Cores - 1
> - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
> - sub x0, x0, #1
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
> - mul x1, x1, x0
> + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> sub x12, x12, x1
>
> // x12 = The base of the MpCore Stacks (primary stack & secondary stacks)
> mov x0, x12
> mov x1, x10
> //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
> + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> + MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> bl ASM_PFX(ArmPlatformStackSet)
>
> // Is it the Primary Core ?
> @@ -140,7 +119,7 @@ _PrepareArguments:
>
> // Move sec startup address into a data register
> // Ensure we're jumping to FV version of the code (not boot remapped alias)
> - ldr x4, StartupAddr
> + ldr x4, =ASM_PFX(CEntryPoint)
>
> // Jump to PrePiCore C code
> // x0 = MpId
> @@ -150,3 +129,5 @@ _PrepareArguments:
>
> _NeverReturn:
> b _NeverReturn
> +
> +ASM_PFX(mSystemMemoryEnd): .8byte 0
> diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> index 1311efc5cb2c..b7127ce9fb4c 100644
> --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> @@ -12,28 +12,12 @@
> //
>
> #include <AsmMacroIoLib.h>
> -#include <Base.h>
> -#include <Library/PcdLib.h>
> -#include <AutoGen.h>
>
> #include <Chipset/ArmV7.h>
>
> -.text
> -.align 3
> -
> -GCC_ASM_IMPORT(CEntryPoint)
> -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_IMPORT(ArmReadMpidr)
> -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_IMPORT(ArmPlatformStackSet)
> -GCC_ASM_EXPORT(_ModuleEntryPoint)
> GCC_ASM_EXPORT(mSystemMemoryEnd)
>
> -StartupAddr: .word CEntryPoint
> -mSystemMemoryEnd: .8byte 0
> -
> -
> -ASM_PFX(_ModuleEntryPoint):
> +ASM_FUNC(_ModuleEntryPoint)
> // Do early platform specific actions
> bl ASM_PFX(ArmPlatformPeiBootAction)
>
> @@ -57,10 +41,8 @@ _SystemMemoryEndInit:
> cmp r1, #0
> bne _SetupStackPosition
>
> - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
> - LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
> - sub r2, r2, #1
> - add r1, r1, r2
> + MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) + FixedPcdGet32(PcdSystemMemorySize) - 1)
> +
> // Update the global variable
> adr r2, mSystemMemoryEnd
> str r1, [r2]
> @@ -69,13 +51,12 @@ _SetupStackPosition:
> // r1 = SystemMemoryTop
>
> // Calculate Top of the Firmware Device
> - LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
> - LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
> - sub r3, r3, #1
> + MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))
> + MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)
> add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
>
> // UEFI Memory Size (stacks are allocated in this region)
> - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
> + MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>
> //
> // Reserve the memory for the UEFI region (contain stacks on its top)
> @@ -106,9 +87,8 @@ _SetupAlignedStack:
> _SetupOverflowStack:
> // Case memory at the top of the address space. Ensure the top of the stack is EFI_PAGE_SIZE
> // aligned (4KB)
> - LoadConstantToReg (EFI_PAGE_MASK, r9)
> - and r9, r9, r1
> - sub r1, r1, r9
> + MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)
> + and r1, r1, r9
>
> _GetBaseUefiMemory:
> // Calculate the Base of the UEFI Memory
> @@ -117,22 +97,19 @@ _GetBaseUefiMemory:
> _GetStackBase:
> // r1 = The top of the Mpcore Stacks
> // Stack for the primary core = PrimaryCoreStack
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
> + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> sub r10, r1, r2
>
> // Stack for the secondary core = Number of Cores - 1
> - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
> - sub r0, r0, #1
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
> - mul r1, r1, r0
> + MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> sub r10, r10, r1
>
> // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
> mov r0, r10
> mov r1, r8
> //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize, SecondaryStackSize)
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
> + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> + MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> bl ASM_PFX(ArmPlatformStackSet)
>
> // Is it the Primary Core ?
> @@ -149,7 +126,7 @@ _PrepareArguments:
>
> // Move sec startup address into a data register
> // Ensure we're jumping to FV version of the code (not boot remapped alias)
> - ldr r4, StartupAddr
> + ldr r4, =ASM_PFX(CEntryPoint)
>
> // Jump to PrePiCore C code
> // r0 = MpId
> @@ -160,3 +137,4 @@ _PrepareArguments:
> _NeverReturn:
> b _NeverReturn
>
> +ASM_PFX(mSystemMemoryEnd): .8byte 0
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-11 8:38 ` Leif Lindholm
@ 2016-08-31 4:33 ` Michael Zimmermann
2016-08-31 9:14 ` Ard Biesheuvel
` (2 more replies)
0 siblings, 3 replies; 56+ messages in thread
From: Michael Zimmermann @ 2016-08-31 4:33 UTC (permalink / raw)
To: Leif Lindholm
Cc: Ard Biesheuvel, edk2-devel@lists.01.org, Laszlo Ersek,
Cohen, Eugene
reviewed should mean tested ;)
took me some time to find out why my system currently doesn't boot anymore
but here's the fix for this commit:
diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
index b7127ce..39030da 100644
--- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
+++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
@@ -101,7 +101,7 @@ _GetStackBase:
sub r10, r1, r2
// Stack for the secondary core = Number of Cores - 1
- MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
+ MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) *
FixedPcdGet32(PcdCPUCoreSecondaryStackSize))^M
sub r10, r10, r1
// r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
On Thu, Aug 11, 2016 at 10:38 AM, Leif Lindholm <leif.lindholm@linaro.org>
wrote:
> On Wed, Aug 10, 2016 at 05:17:58PM +0200, Ard Biesheuvel wrote:
> > Annotate functions with ASM_FUNC() so that they are emitted into
> > separate sections.
>
> Also replacing LoadConstantToReg. Add that to commit message and:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
> > Contributed-under: TianoCore Contribution Agreement 1.0
> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> > ---
> > ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49
> ++++++-------------
> > ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50
> ++++++--------------
> > 2 files changed, 29 insertions(+), 70 deletions(-)
> >
> > diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> > index 9538c70a237c..d0530a874726 100644
> > --- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> > +++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> > @@ -12,24 +12,10 @@
> > //
> >
> > #include <AsmMacroIoLibV8.h>
> > -#include <Base.h>
> > -#include <Library/PcdLib.h>
> > -#include <AutoGen.h>
> > -
> > -.text
> > -.align 3
> > -
> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> > -GCC_ASM_IMPORT(ArmReadMpidr)
> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
> > -ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
> >
> > -StartupAddr: .8byte ASM_PFX(CEntryPoint)
> > -ASM_PFX(mSystemMemoryEnd): .8byte 0
> > +ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
> >
> > -ASM_PFX(_ModuleEntryPoint):
> > +ASM_FUNC(_ModuleEntryPoint)
> > // Do early platform specific actions
> > bl ASM_PFX(ArmPlatformPeiBootAction)
> >
> > @@ -49,10 +35,8 @@ _SystemMemoryEndInit:
> > cmp x1, #0
> > bne _SetupStackPosition
> >
> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemoryBase), x1)
> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemorySize), x2)
> > - sub x2, x2, #1
> > - add x1, x1, x2
> > + MOV64 (x1, FixedPcdGet64(PcdSystemMemoryBase) + FixedPcdGet64(PcdSystemMemorySize)
> - 1)
> > +
> > // Update the global variable
> > adr x2, mSystemMemoryEnd
> > str x1, [x2]
> > @@ -61,13 +45,13 @@ _SetupStackPosition:
> > // r1 = SystemMemoryTop
> >
> > // Calculate Top of the Firmware Device
> > - LoadConstantToReg (FixedPcdGet64(PcdFdBaseAddress), x2)
> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), x3)
> > + MOV64 (x2, FixedPcdGet64(PcdFdBaseAddress))
> > + MOV32 (x3, FixedPcdGet32(PcdFdSize) - 1)
> > sub x3, x3, #1
> > add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
> >
> > // UEFI Memory Size (stacks are allocated in this region)
> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), x4)
> > + MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
> >
> > //
> > // Reserve the memory for the UEFI region (contain stacks on its top)
> > @@ -98,9 +82,7 @@ _SetupAlignedStack:
> > _SetupOverflowStack:
> > // Case memory at the top of the address space. Ensure the top of the
> stack is EFI_PAGE_SIZE
> > // aligned (4KB)
> > - LoadConstantToReg (EFI_PAGE_MASK, x11)
> > - and x11, x11, x1
> > - sub x1, x1, x11
> > + and x1, x1, ~EFI_PAGE_MASK
> >
> > _GetBaseUefiMemory:
> > // Calculate the Base of the UEFI Memory
> > @@ -109,22 +91,19 @@ _GetBaseUefiMemory:
> > _GetStackBase:
> > // r1 = The top of the Mpcore Stacks
> > // Stack for the primary core = PrimaryCoreStack
> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> > sub x12, x1, x2
> >
> > // Stack for the secondary core = Number of Cores - 1
> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
> > - sub x0, x0, #1
> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
> > - mul x1, x1, x0
> > + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(
> PcdCPUCoreSecondaryStackSize))
> > sub x12, x12, x1
> >
> > // x12 = The base of the MpCore Stacks (primary stack & secondary
> stacks)
> > mov x0, x12
> > mov x1, x10
> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
> SecondaryStackSize)
> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> > + MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> > bl ASM_PFX(ArmPlatformStackSet)
> >
> > // Is it the Primary Core ?
> > @@ -140,7 +119,7 @@ _PrepareArguments:
> >
> > // Move sec startup address into a data register
> > // Ensure we're jumping to FV version of the code (not boot remapped
> alias)
> > - ldr x4, StartupAddr
> > + ldr x4, =ASM_PFX(CEntryPoint)
> >
> > // Jump to PrePiCore C code
> > // x0 = MpId
> > @@ -150,3 +129,5 @@ _PrepareArguments:
> >
> > _NeverReturn:
> > b _NeverReturn
> > +
> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
> > diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> > index 1311efc5cb2c..b7127ce9fb4c 100644
> > --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> > +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> > @@ -12,28 +12,12 @@
> > //
> >
> > #include <AsmMacroIoLib.h>
> > -#include <Base.h>
> > -#include <Library/PcdLib.h>
> > -#include <AutoGen.h>
> >
> > #include <Chipset/ArmV7.h>
> >
> > -.text
> > -.align 3
> > -
> > -GCC_ASM_IMPORT(CEntryPoint)
> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> > -GCC_ASM_IMPORT(ArmReadMpidr)
> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
> > GCC_ASM_EXPORT(mSystemMemoryEnd)
> >
> > -StartupAddr: .word CEntryPoint
> > -mSystemMemoryEnd: .8byte 0
> > -
> > -
> > -ASM_PFX(_ModuleEntryPoint):
> > +ASM_FUNC(_ModuleEntryPoint)
> > // Do early platform specific actions
> > bl ASM_PFX(ArmPlatformPeiBootAction)
> >
> > @@ -57,10 +41,8 @@ _SystemMemoryEndInit:
> > cmp r1, #0
> > bne _SetupStackPosition
> >
> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
> > - sub r2, r2, #1
> > - add r1, r1, r2
> > + MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) + FixedPcdGet32(PcdSystemMemorySize)
> - 1)
> > +
> > // Update the global variable
> > adr r2, mSystemMemoryEnd
> > str r1, [r2]
> > @@ -69,13 +51,12 @@ _SetupStackPosition:
> > // r1 = SystemMemoryTop
> >
> > // Calculate Top of the Firmware Device
> > - LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
> > - sub r3, r3, #1
> > + MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))
> > + MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)
> > add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
> >
> > // UEFI Memory Size (stacks are allocated in this region)
> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
> > + MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
> >
> > //
> > // Reserve the memory for the UEFI region (contain stacks on its top)
> > @@ -106,9 +87,8 @@ _SetupAlignedStack:
> > _SetupOverflowStack:
> > // Case memory at the top of the address space. Ensure the top of the
> stack is EFI_PAGE_SIZE
> > // aligned (4KB)
> > - LoadConstantToReg (EFI_PAGE_MASK, r9)
> > - and r9, r9, r1
> > - sub r1, r1, r9
> > + MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)
> > + and r1, r1, r9
> >
> > _GetBaseUefiMemory:
> > // Calculate the Base of the UEFI Memory
> > @@ -117,22 +97,19 @@ _GetBaseUefiMemory:
> > _GetStackBase:
> > // r1 = The top of the Mpcore Stacks
> > // Stack for the primary core = PrimaryCoreStack
> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> > sub r10, r1, r2
> >
> > // Stack for the secondary core = Number of Cores - 1
> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
> > - sub r0, r0, #1
> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
> > - mul r1, r1, r0
> > + MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(
> PcdCPUCoreSecondaryStackSize))
> > sub r10, r10, r1
> >
> > // r10 = The base of the MpCore Stacks (primary stack & secondary
> stacks)
> > mov r0, r10
> > mov r1, r8
> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
> SecondaryStackSize)
> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> > + MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> > bl ASM_PFX(ArmPlatformStackSet)
> >
> > // Is it the Primary Core ?
> > @@ -149,7 +126,7 @@ _PrepareArguments:
> >
> > // Move sec startup address into a data register
> > // Ensure we're jumping to FV version of the code (not boot remapped
> alias)
> > - ldr r4, StartupAddr
> > + ldr r4, =ASM_PFX(CEntryPoint)
> >
> > // Jump to PrePiCore C code
> > // r0 = MpId
> > @@ -160,3 +137,4 @@ _PrepareArguments:
> > _NeverReturn:
> > b _NeverReturn
> >
> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
> > --
> > 2.7.4
> >
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
>
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-31 4:33 ` Michael Zimmermann
@ 2016-08-31 9:14 ` Ard Biesheuvel
2016-08-31 9:43 ` Michael Zimmermann
2016-08-31 9:47 ` Evan Lloyd
2016-09-07 11:10 ` Ryan Harkin
2 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-31 9:14 UTC (permalink / raw)
To: Michael Zimmermann
Cc: Leif Lindholm, edk2-devel@lists.01.org, Laszlo Ersek,
Cohen, Eugene
On 31 August 2016 at 05:33, Michael Zimmermann <sigmaepsilon92@gmail.com> wrote:
> reviewed should mean tested ;)
>
Apologies for the breakage. As it turns out, ArmVirtQemuKernel does
work even with this bug, probably due to the fact that its
PcdCoreCount == 1 (or simply that it uses the UniCore flavor rather
than the MPCore flavor of PrePi)
In any case, thanks for tracking this down, and for proposing a fix.
> took me some time to find out why my system currently doesn't boot anymore
> but here's the fix for this commit:
>
> diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> index b7127ce..39030da 100644
> --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> @@ -101,7 +101,7 @@ _GetStackBase:
> sub r10, r1, r2
>
> // Stack for the secondary core = Number of Cores - 1
> - MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
> FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> + MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) *
> FixedPcdGet32(PcdCPUCoreSecondaryStackSize))^M
> sub r10, r10, r1
>
> // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
>
> On Thu, Aug 11, 2016 at 10:38 AM, Leif Lindholm <leif.lindholm@linaro.org>
> wrote:
>>
>> On Wed, Aug 10, 2016 at 05:17:58PM +0200, Ard Biesheuvel wrote:
>> > Annotate functions with ASM_FUNC() so that they are emitted into
>> > separate sections.
>>
>> Also replacing LoadConstantToReg. Add that to commit message and:
>> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>>
>> > Contributed-under: TianoCore Contribution Agreement 1.0
>> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> > ---
>> > ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49
>> > ++++++-------------
>> > ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50
>> > ++++++--------------
>> > 2 files changed, 29 insertions(+), 70 deletions(-)
>> >
>> > diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> > b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> > index 9538c70a237c..d0530a874726 100644
>> > --- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> > +++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> > @@ -12,24 +12,10 @@
>> > //
>> >
>> > #include <AsmMacroIoLibV8.h>
>> > -#include <Base.h>
>> > -#include <Library/PcdLib.h>
>> > -#include <AutoGen.h>
>> > -
>> > -.text
>> > -.align 3
>> > -
>> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>> > -GCC_ASM_IMPORT(ArmReadMpidr)
>> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>> > -ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>> >
>> > -StartupAddr: .8byte ASM_PFX(CEntryPoint)
>> > -ASM_PFX(mSystemMemoryEnd): .8byte 0
>> > +ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>> >
>> > -ASM_PFX(_ModuleEntryPoint):
>> > +ASM_FUNC(_ModuleEntryPoint)
>> > // Do early platform specific actions
>> > bl ASM_PFX(ArmPlatformPeiBootAction)
>> >
>> > @@ -49,10 +35,8 @@ _SystemMemoryEndInit:
>> > cmp x1, #0
>> > bne _SetupStackPosition
>> >
>> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemoryBase), x1)
>> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemorySize), x2)
>> > - sub x2, x2, #1
>> > - add x1, x1, x2
>> > + MOV64 (x1, FixedPcdGet64(PcdSystemMemoryBase) +
>> > FixedPcdGet64(PcdSystemMemorySize) - 1)
>> > +
>> > // Update the global variable
>> > adr x2, mSystemMemoryEnd
>> > str x1, [x2]
>> > @@ -61,13 +45,13 @@ _SetupStackPosition:
>> > // r1 = SystemMemoryTop
>> >
>> > // Calculate Top of the Firmware Device
>> > - LoadConstantToReg (FixedPcdGet64(PcdFdBaseAddress), x2)
>> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), x3)
>> > + MOV64 (x2, FixedPcdGet64(PcdFdBaseAddress))
>> > + MOV32 (x3, FixedPcdGet32(PcdFdSize) - 1)
>> > sub x3, x3, #1
>> > add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
>> >
>> > // UEFI Memory Size (stacks are allocated in this region)
>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), x4)
>> > + MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>> >
>> > //
>> > // Reserve the memory for the UEFI region (contain stacks on its top)
>> > @@ -98,9 +82,7 @@ _SetupAlignedStack:
>> > _SetupOverflowStack:
>> > // Case memory at the top of the address space. Ensure the top of the
>> > stack is EFI_PAGE_SIZE
>> > // aligned (4KB)
>> > - LoadConstantToReg (EFI_PAGE_MASK, x11)
>> > - and x11, x11, x1
>> > - sub x1, x1, x11
>> > + and x1, x1, ~EFI_PAGE_MASK
>> >
>> > _GetBaseUefiMemory:
>> > // Calculate the Base of the UEFI Memory
>> > @@ -109,22 +91,19 @@ _GetBaseUefiMemory:
>> > _GetStackBase:
>> > // r1 = The top of the Mpcore Stacks
>> > // Stack for the primary core = PrimaryCoreStack
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> > sub x12, x1, x2
>> >
>> > // Stack for the secondary core = Number of Cores - 1
>> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
>> > - sub x0, x0, #1
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
>> > - mul x1, x1, x0
>> > + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) *
>> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> > sub x12, x12, x1
>> >
>> > // x12 = The base of the MpCore Stacks (primary stack & secondary
>> > stacks)
>> > mov x0, x12
>> > mov x1, x10
>> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>> > SecondaryStackSize)
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
>> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> > + MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> > bl ASM_PFX(ArmPlatformStackSet)
>> >
>> > // Is it the Primary Core ?
>> > @@ -140,7 +119,7 @@ _PrepareArguments:
>> >
>> > // Move sec startup address into a data register
>> > // Ensure we're jumping to FV version of the code (not boot remapped
>> > alias)
>> > - ldr x4, StartupAddr
>> > + ldr x4, =ASM_PFX(CEntryPoint)
>> >
>> > // Jump to PrePiCore C code
>> > // x0 = MpId
>> > @@ -150,3 +129,5 @@ _PrepareArguments:
>> >
>> > _NeverReturn:
>> > b _NeverReturn
>> > +
>> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>> > diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > index 1311efc5cb2c..b7127ce9fb4c 100644
>> > --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > @@ -12,28 +12,12 @@
>> > //
>> >
>> > #include <AsmMacroIoLib.h>
>> > -#include <Base.h>
>> > -#include <Library/PcdLib.h>
>> > -#include <AutoGen.h>
>> >
>> > #include <Chipset/ArmV7.h>
>> >
>> > -.text
>> > -.align 3
>> > -
>> > -GCC_ASM_IMPORT(CEntryPoint)
>> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>> > -GCC_ASM_IMPORT(ArmReadMpidr)
>> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>> > GCC_ASM_EXPORT(mSystemMemoryEnd)
>> >
>> > -StartupAddr: .word CEntryPoint
>> > -mSystemMemoryEnd: .8byte 0
>> > -
>> > -
>> > -ASM_PFX(_ModuleEntryPoint):
>> > +ASM_FUNC(_ModuleEntryPoint)
>> > // Do early platform specific actions
>> > bl ASM_PFX(ArmPlatformPeiBootAction)
>> >
>> > @@ -57,10 +41,8 @@ _SystemMemoryEndInit:
>> > cmp r1, #0
>> > bne _SetupStackPosition
>> >
>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
>> > - sub r2, r2, #1
>> > - add r1, r1, r2
>> > + MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) +
>> > FixedPcdGet32(PcdSystemMemorySize) - 1)
>> > +
>> > // Update the global variable
>> > adr r2, mSystemMemoryEnd
>> > str r1, [r2]
>> > @@ -69,13 +51,12 @@ _SetupStackPosition:
>> > // r1 = SystemMemoryTop
>> >
>> > // Calculate Top of the Firmware Device
>> > - LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
>> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
>> > - sub r3, r3, #1
>> > + MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))
>> > + MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)
>> > add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
>> >
>> > // UEFI Memory Size (stacks are allocated in this region)
>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
>> > + MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>> >
>> > //
>> > // Reserve the memory for the UEFI region (contain stacks on its top)
>> > @@ -106,9 +87,8 @@ _SetupAlignedStack:
>> > _SetupOverflowStack:
>> > // Case memory at the top of the address space. Ensure the top of the
>> > stack is EFI_PAGE_SIZE
>> > // aligned (4KB)
>> > - LoadConstantToReg (EFI_PAGE_MASK, r9)
>> > - and r9, r9, r1
>> > - sub r1, r1, r9
>> > + MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)
>> > + and r1, r1, r9
>> >
>> > _GetBaseUefiMemory:
>> > // Calculate the Base of the UEFI Memory
>> > @@ -117,22 +97,19 @@ _GetBaseUefiMemory:
>> > _GetStackBase:
>> > // r1 = The top of the Mpcore Stacks
>> > // Stack for the primary core = PrimaryCoreStack
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> > sub r10, r1, r2
>> >
>> > // Stack for the secondary core = Number of Cores - 1
>> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
>> > - sub r0, r0, #1
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
>> > - mul r1, r1, r0
>> > + MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
>> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> > sub r10, r10, r1
>> >
>> > // r10 = The base of the MpCore Stacks (primary stack & secondary
>> > stacks)
>> > mov r0, r10
>> > mov r1, r8
>> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>> > SecondaryStackSize)
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
>> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> > + MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> > bl ASM_PFX(ArmPlatformStackSet)
>> >
>> > // Is it the Primary Core ?
>> > @@ -149,7 +126,7 @@ _PrepareArguments:
>> >
>> > // Move sec startup address into a data register
>> > // Ensure we're jumping to FV version of the code (not boot remapped
>> > alias)
>> > - ldr r4, StartupAddr
>> > + ldr r4, =ASM_PFX(CEntryPoint)
>> >
>> > // Jump to PrePiCore C code
>> > // r0 = MpId
>> > @@ -160,3 +137,4 @@ _PrepareArguments:
>> > _NeverReturn:
>> > b _NeverReturn
>> >
>> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>> > --
>> > 2.7.4
>> >
>> _______________________________________________
>> edk2-devel mailing list
>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel
>
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-31 9:14 ` Ard Biesheuvel
@ 2016-08-31 9:43 ` Michael Zimmermann
2016-08-31 9:45 ` Ard Biesheuvel
0 siblings, 1 reply; 56+ messages in thread
From: Michael Zimmermann @ 2016-08-31 9:43 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: Leif Lindholm, edk2-devel@lists.01.org, Laszlo Ersek,
Cohen, Eugene
ArmVirtQemuKernel uses ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S which is not
affected by this bug.
as it turns out, only BeagleBoardPkg uses the generic PrePi code.
On Wed, Aug 31, 2016 at 11:14 AM, Ard Biesheuvel <ard.biesheuvel@linaro.org>
wrote:
> On 31 August 2016 at 05:33, Michael Zimmermann <sigmaepsilon92@gmail.com>
> wrote:
> > reviewed should mean tested ;)
> >
>
> Apologies for the breakage. As it turns out, ArmVirtQemuKernel does
> work even with this bug, probably due to the fact that its
> PcdCoreCount == 1 (or simply that it uses the UniCore flavor rather
> than the MPCore flavor of PrePi)
>
> In any case, thanks for tracking this down, and for proposing a fix.
>
> > took me some time to find out why my system currently doesn't boot
> anymore
> > but here's the fix for this commit:
> >
> > diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> > b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> > index b7127ce..39030da 100644
> > --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> > +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> > @@ -101,7 +101,7 @@ _GetStackBase:
> > sub r10, r1, r2
> >
> > // Stack for the secondary core = Number of Cores - 1
> > - MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> > + MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) *
> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))^M
> > sub r10, r10, r1
> >
> > // r10 = The base of the MpCore Stacks (primary stack & secondary
> stacks)
> >
> > On Thu, Aug 11, 2016 at 10:38 AM, Leif Lindholm <
> leif.lindholm@linaro.org>
> > wrote:
> >>
> >> On Wed, Aug 10, 2016 at 05:17:58PM +0200, Ard Biesheuvel wrote:
> >> > Annotate functions with ASM_FUNC() so that they are emitted into
> >> > separate sections.
> >>
> >> Also replacing LoadConstantToReg. Add that to commit message and:
> >> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> >>
> >> > Contributed-under: TianoCore Contribution Agreement 1.0
> >> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> >> > ---
> >> > ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49
> >> > ++++++-------------
> >> > ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50
> >> > ++++++--------------
> >> > 2 files changed, 29 insertions(+), 70 deletions(-)
> >> >
> >> > diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> >> > b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> >> > index 9538c70a237c..d0530a874726 100644
> >> > --- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> >> > +++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
> >> > @@ -12,24 +12,10 @@
> >> > //
> >> >
> >> > #include <AsmMacroIoLibV8.h>
> >> > -#include <Base.h>
> >> > -#include <Library/PcdLib.h>
> >> > -#include <AutoGen.h>
> >> > -
> >> > -.text
> >> > -.align 3
> >> > -
> >> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> >> > -GCC_ASM_IMPORT(ArmReadMpidr)
> >> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
> >> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
> >> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
> >> > -ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
> >> >
> >> > -StartupAddr: .8byte ASM_PFX(CEntryPoint)
> >> > -ASM_PFX(mSystemMemoryEnd): .8byte 0
> >> > +ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
> >> >
> >> > -ASM_PFX(_ModuleEntryPoint):
> >> > +ASM_FUNC(_ModuleEntryPoint)
> >> > // Do early platform specific actions
> >> > bl ASM_PFX(ArmPlatformPeiBootAction)
> >> >
> >> > @@ -49,10 +35,8 @@ _SystemMemoryEndInit:
> >> > cmp x1, #0
> >> > bne _SetupStackPosition
> >> >
> >> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemoryBase), x1)
> >> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemorySize), x2)
> >> > - sub x2, x2, #1
> >> > - add x1, x1, x2
> >> > + MOV64 (x1, FixedPcdGet64(PcdSystemMemoryBase) +
> >> > FixedPcdGet64(PcdSystemMemorySize) - 1)
> >> > +
> >> > // Update the global variable
> >> > adr x2, mSystemMemoryEnd
> >> > str x1, [x2]
> >> > @@ -61,13 +45,13 @@ _SetupStackPosition:
> >> > // r1 = SystemMemoryTop
> >> >
> >> > // Calculate Top of the Firmware Device
> >> > - LoadConstantToReg (FixedPcdGet64(PcdFdBaseAddress), x2)
> >> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), x3)
> >> > + MOV64 (x2, FixedPcdGet64(PcdFdBaseAddress))
> >> > + MOV32 (x3, FixedPcdGet32(PcdFdSize) - 1)
> >> > sub x3, x3, #1
> >> > add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
> >> >
> >> > // UEFI Memory Size (stacks are allocated in this region)
> >> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize),
> x4)
> >> > + MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
> >> >
> >> > //
> >> > // Reserve the memory for the UEFI region (contain stacks on its
> top)
> >> > @@ -98,9 +82,7 @@ _SetupAlignedStack:
> >> > _SetupOverflowStack:
> >> > // Case memory at the top of the address space. Ensure the top of
> the
> >> > stack is EFI_PAGE_SIZE
> >> > // aligned (4KB)
> >> > - LoadConstantToReg (EFI_PAGE_MASK, x11)
> >> > - and x11, x11, x1
> >> > - sub x1, x1, x11
> >> > + and x1, x1, ~EFI_PAGE_MASK
> >> >
> >> > _GetBaseUefiMemory:
> >> > // Calculate the Base of the UEFI Memory
> >> > @@ -109,22 +91,19 @@ _GetBaseUefiMemory:
> >> > _GetStackBase:
> >> > // r1 = The top of the Mpcore Stacks
> >> > // Stack for the primary core = PrimaryCoreStack
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
> >> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> >> > sub x12, x1, x2
> >> >
> >> > // Stack for the secondary core = Number of Cores - 1
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
> >> > - sub x0, x0, #1
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize),
> x1)
> >> > - mul x1, x1, x0
> >> > + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) *
> >> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> >> > sub x12, x12, x1
> >> >
> >> > // x12 = The base of the MpCore Stacks (primary stack & secondary
> >> > stacks)
> >> > mov x0, x12
> >> > mov x1, x10
> >> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
> >> > SecondaryStackSize)
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize),
> x3)
> >> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> >> > + MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> >> > bl ASM_PFX(ArmPlatformStackSet)
> >> >
> >> > // Is it the Primary Core ?
> >> > @@ -140,7 +119,7 @@ _PrepareArguments:
> >> >
> >> > // Move sec startup address into a data register
> >> > // Ensure we're jumping to FV version of the code (not boot
> remapped
> >> > alias)
> >> > - ldr x4, StartupAddr
> >> > + ldr x4, =ASM_PFX(CEntryPoint)
> >> >
> >> > // Jump to PrePiCore C code
> >> > // x0 = MpId
> >> > @@ -150,3 +129,5 @@ _PrepareArguments:
> >> >
> >> > _NeverReturn:
> >> > b _NeverReturn
> >> > +
> >> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
> >> > diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> >> > b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> >> > index 1311efc5cb2c..b7127ce9fb4c 100644
> >> > --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> >> > +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> >> > @@ -12,28 +12,12 @@
> >> > //
> >> >
> >> > #include <AsmMacroIoLib.h>
> >> > -#include <Base.h>
> >> > -#include <Library/PcdLib.h>
> >> > -#include <AutoGen.h>
> >> >
> >> > #include <Chipset/ArmV7.h>
> >> >
> >> > -.text
> >> > -.align 3
> >> > -
> >> > -GCC_ASM_IMPORT(CEntryPoint)
> >> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> >> > -GCC_ASM_IMPORT(ArmReadMpidr)
> >> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
> >> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
> >> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
> >> > GCC_ASM_EXPORT(mSystemMemoryEnd)
> >> >
> >> > -StartupAddr: .word CEntryPoint
> >> > -mSystemMemoryEnd: .8byte 0
> >> > -
> >> > -
> >> > -ASM_PFX(_ModuleEntryPoint):
> >> > +ASM_FUNC(_ModuleEntryPoint)
> >> > // Do early platform specific actions
> >> > bl ASM_PFX(ArmPlatformPeiBootAction)
> >> >
> >> > @@ -57,10 +41,8 @@ _SystemMemoryEndInit:
> >> > cmp r1, #0
> >> > bne _SetupStackPosition
> >> >
> >> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
> >> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
> >> > - sub r2, r2, #1
> >> > - add r1, r1, r2
> >> > + MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) +
> >> > FixedPcdGet32(PcdSystemMemorySize) - 1)
> >> > +
> >> > // Update the global variable
> >> > adr r2, mSystemMemoryEnd
> >> > str r1, [r2]
> >> > @@ -69,13 +51,12 @@ _SetupStackPosition:
> >> > // r1 = SystemMemoryTop
> >> >
> >> > // Calculate Top of the Firmware Device
> >> > - LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
> >> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
> >> > - sub r3, r3, #1
> >> > + MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))
> >> > + MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)
> >> > add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
> >> >
> >> > // UEFI Memory Size (stacks are allocated in this region)
> >> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize),
> r4)
> >> > + MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
> >> >
> >> > //
> >> > // Reserve the memory for the UEFI region (contain stacks on its
> top)
> >> > @@ -106,9 +87,8 @@ _SetupAlignedStack:
> >> > _SetupOverflowStack:
> >> > // Case memory at the top of the address space. Ensure the top of
> the
> >> > stack is EFI_PAGE_SIZE
> >> > // aligned (4KB)
> >> > - LoadConstantToReg (EFI_PAGE_MASK, r9)
> >> > - and r9, r9, r1
> >> > - sub r1, r1, r9
> >> > + MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)
> >> > + and r1, r1, r9
> >> >
> >> > _GetBaseUefiMemory:
> >> > // Calculate the Base of the UEFI Memory
> >> > @@ -117,22 +97,19 @@ _GetBaseUefiMemory:
> >> > _GetStackBase:
> >> > // r1 = The top of the Mpcore Stacks
> >> > // Stack for the primary core = PrimaryCoreStack
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
> >> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> >> > sub r10, r1, r2
> >> >
> >> > // Stack for the secondary core = Number of Cores - 1
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
> >> > - sub r0, r0, #1
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize),
> r1)
> >> > - mul r1, r1, r0
> >> > + MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
> >> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> >> > sub r10, r10, r1
> >> >
> >> > // r10 = The base of the MpCore Stacks (primary stack & secondary
> >> > stacks)
> >> > mov r0, r10
> >> > mov r1, r8
> >> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
> >> > SecondaryStackSize)
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize),
> r3)
> >> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
> >> > + MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> >> > bl ASM_PFX(ArmPlatformStackSet)
> >> >
> >> > // Is it the Primary Core ?
> >> > @@ -149,7 +126,7 @@ _PrepareArguments:
> >> >
> >> > // Move sec startup address into a data register
> >> > // Ensure we're jumping to FV version of the code (not boot
> remapped
> >> > alias)
> >> > - ldr r4, StartupAddr
> >> > + ldr r4, =ASM_PFX(CEntryPoint)
> >> >
> >> > // Jump to PrePiCore C code
> >> > // r0 = MpId
> >> > @@ -160,3 +137,4 @@ _PrepareArguments:
> >> > _NeverReturn:
> >> > b _NeverReturn
> >> >
> >> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
> >> > --
> >> > 2.7.4
> >> >
> >> _______________________________________________
> >> edk2-devel mailing list
> >> edk2-devel@lists.01.org
> >> https://lists.01.org/mailman/listinfo/edk2-devel
> >
> >
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-31 9:43 ` Michael Zimmermann
@ 2016-08-31 9:45 ` Ard Biesheuvel
0 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-31 9:45 UTC (permalink / raw)
To: Michael Zimmermann
Cc: Leif Lindholm, edk2-devel@lists.01.org, Laszlo Ersek,
Cohen, Eugene
On 31 August 2016 at 10:43, Michael Zimmermann <sigmaepsilon92@gmail.com> wrote:
> ArmVirtQemuKernel uses ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S which is not
> affected by this bug.
>
Ah, of course. It does highlight why having so many copies of
essentially the same code is a bad idea, but it is a difficult pattern
to get rid of in Tianocore.
> as it turns out, only BeagleBoardPkg uses the generic PrePi code.
>
Thanks,
Ard.
> On Wed, Aug 31, 2016 at 11:14 AM, Ard Biesheuvel <ard.biesheuvel@linaro.org>
> wrote:
>>
>> On 31 August 2016 at 05:33, Michael Zimmermann <sigmaepsilon92@gmail.com>
>> wrote:
>> > reviewed should mean tested ;)
>> >
>>
>> Apologies for the breakage. As it turns out, ArmVirtQemuKernel does
>> work even with this bug, probably due to the fact that its
>> PcdCoreCount == 1 (or simply that it uses the UniCore flavor rather
>> than the MPCore flavor of PrePi)
>>
>> In any case, thanks for tracking this down, and for proposing a fix.
>>
>> > took me some time to find out why my system currently doesn't boot
>> > anymore
>> > but here's the fix for this commit:
>> >
>> > diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > index b7127ce..39030da 100644
>> > --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > @@ -101,7 +101,7 @@ _GetStackBase:
>> > sub r10, r1, r2
>> >
>> > // Stack for the secondary core = Number of Cores - 1
>> > - MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
>> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> > + MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) *
>> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))^M
>> > sub r10, r10, r1
>> >
>> > // r10 = The base of the MpCore Stacks (primary stack & secondary
>> > stacks)
>> >
>> > On Thu, Aug 11, 2016 at 10:38 AM, Leif Lindholm
>> > <leif.lindholm@linaro.org>
>> > wrote:
>> >>
>> >> On Wed, Aug 10, 2016 at 05:17:58PM +0200, Ard Biesheuvel wrote:
>> >> > Annotate functions with ASM_FUNC() so that they are emitted into
>> >> > separate sections.
>> >>
>> >> Also replacing LoadConstantToReg. Add that to commit message and:
>> >> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>> >>
>> >> > Contributed-under: TianoCore Contribution Agreement 1.0
>> >> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> >> > ---
>> >> > ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49
>> >> > ++++++-------------
>> >> > ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50
>> >> > ++++++--------------
>> >> > 2 files changed, 29 insertions(+), 70 deletions(-)
>> >> >
>> >> > diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> >> > b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> >> > index 9538c70a237c..d0530a874726 100644
>> >> > --- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> >> > +++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> >> > @@ -12,24 +12,10 @@
>> >> > //
>> >> >
>> >> > #include <AsmMacroIoLibV8.h>
>> >> > -#include <Base.h>
>> >> > -#include <Library/PcdLib.h>
>> >> > -#include <AutoGen.h>
>> >> > -
>> >> > -.text
>> >> > -.align 3
>> >> > -
>> >> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>> >> > -GCC_ASM_IMPORT(ArmReadMpidr)
>> >> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>> >> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>> >> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>> >> > -ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>> >> >
>> >> > -StartupAddr: .8byte ASM_PFX(CEntryPoint)
>> >> > -ASM_PFX(mSystemMemoryEnd): .8byte 0
>> >> > +ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>> >> >
>> >> > -ASM_PFX(_ModuleEntryPoint):
>> >> > +ASM_FUNC(_ModuleEntryPoint)
>> >> > // Do early platform specific actions
>> >> > bl ASM_PFX(ArmPlatformPeiBootAction)
>> >> >
>> >> > @@ -49,10 +35,8 @@ _SystemMemoryEndInit:
>> >> > cmp x1, #0
>> >> > bne _SetupStackPosition
>> >> >
>> >> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemoryBase), x1)
>> >> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemorySize), x2)
>> >> > - sub x2, x2, #1
>> >> > - add x1, x1, x2
>> >> > + MOV64 (x1, FixedPcdGet64(PcdSystemMemoryBase) +
>> >> > FixedPcdGet64(PcdSystemMemorySize) - 1)
>> >> > +
>> >> > // Update the global variable
>> >> > adr x2, mSystemMemoryEnd
>> >> > str x1, [x2]
>> >> > @@ -61,13 +45,13 @@ _SetupStackPosition:
>> >> > // r1 = SystemMemoryTop
>> >> >
>> >> > // Calculate Top of the Firmware Device
>> >> > - LoadConstantToReg (FixedPcdGet64(PcdFdBaseAddress), x2)
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), x3)
>> >> > + MOV64 (x2, FixedPcdGet64(PcdFdBaseAddress))
>> >> > + MOV32 (x3, FixedPcdGet32(PcdFdSize) - 1)
>> >> > sub x3, x3, #1
>> >> > add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
>> >> >
>> >> > // UEFI Memory Size (stacks are allocated in this region)
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize),
>> >> > x4)
>> >> > + MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>> >> >
>> >> > //
>> >> > // Reserve the memory for the UEFI region (contain stacks on its
>> >> > top)
>> >> > @@ -98,9 +82,7 @@ _SetupAlignedStack:
>> >> > _SetupOverflowStack:
>> >> > // Case memory at the top of the address space. Ensure the top of
>> >> > the
>> >> > stack is EFI_PAGE_SIZE
>> >> > // aligned (4KB)
>> >> > - LoadConstantToReg (EFI_PAGE_MASK, x11)
>> >> > - and x11, x11, x1
>> >> > - sub x1, x1, x11
>> >> > + and x1, x1, ~EFI_PAGE_MASK
>> >> >
>> >> > _GetBaseUefiMemory:
>> >> > // Calculate the Base of the UEFI Memory
>> >> > @@ -109,22 +91,19 @@ _GetBaseUefiMemory:
>> >> > _GetStackBase:
>> >> > // r1 = The top of the Mpcore Stacks
>> >> > // Stack for the primary core = PrimaryCoreStack
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>> >> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> >> > sub x12, x1, x2
>> >> >
>> >> > // Stack for the secondary core = Number of Cores - 1
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
>> >> > - sub x0, x0, #1
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize),
>> >> > x1)
>> >> > - mul x1, x1, x0
>> >> > + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) *
>> >> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> >> > sub x12, x12, x1
>> >> >
>> >> > // x12 = The base of the MpCore Stacks (primary stack & secondary
>> >> > stacks)
>> >> > mov x0, x12
>> >> > mov x1, x10
>> >> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>> >> > SecondaryStackSize)
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize),
>> >> > x3)
>> >> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> >> > + MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> >> > bl ASM_PFX(ArmPlatformStackSet)
>> >> >
>> >> > // Is it the Primary Core ?
>> >> > @@ -140,7 +119,7 @@ _PrepareArguments:
>> >> >
>> >> > // Move sec startup address into a data register
>> >> > // Ensure we're jumping to FV version of the code (not boot
>> >> > remapped
>> >> > alias)
>> >> > - ldr x4, StartupAddr
>> >> > + ldr x4, =ASM_PFX(CEntryPoint)
>> >> >
>> >> > // Jump to PrePiCore C code
>> >> > // x0 = MpId
>> >> > @@ -150,3 +129,5 @@ _PrepareArguments:
>> >> >
>> >> > _NeverReturn:
>> >> > b _NeverReturn
>> >> > +
>> >> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>> >> > diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> >> > b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> >> > index 1311efc5cb2c..b7127ce9fb4c 100644
>> >> > --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> >> > +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> >> > @@ -12,28 +12,12 @@
>> >> > //
>> >> >
>> >> > #include <AsmMacroIoLib.h>
>> >> > -#include <Base.h>
>> >> > -#include <Library/PcdLib.h>
>> >> > -#include <AutoGen.h>
>> >> >
>> >> > #include <Chipset/ArmV7.h>
>> >> >
>> >> > -.text
>> >> > -.align 3
>> >> > -
>> >> > -GCC_ASM_IMPORT(CEntryPoint)
>> >> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>> >> > -GCC_ASM_IMPORT(ArmReadMpidr)
>> >> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>> >> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>> >> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>> >> > GCC_ASM_EXPORT(mSystemMemoryEnd)
>> >> >
>> >> > -StartupAddr: .word CEntryPoint
>> >> > -mSystemMemoryEnd: .8byte 0
>> >> > -
>> >> > -
>> >> > -ASM_PFX(_ModuleEntryPoint):
>> >> > +ASM_FUNC(_ModuleEntryPoint)
>> >> > // Do early platform specific actions
>> >> > bl ASM_PFX(ArmPlatformPeiBootAction)
>> >> >
>> >> > @@ -57,10 +41,8 @@ _SystemMemoryEndInit:
>> >> > cmp r1, #0
>> >> > bne _SetupStackPosition
>> >> >
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
>> >> > - sub r2, r2, #1
>> >> > - add r1, r1, r2
>> >> > + MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) +
>> >> > FixedPcdGet32(PcdSystemMemorySize) - 1)
>> >> > +
>> >> > // Update the global variable
>> >> > adr r2, mSystemMemoryEnd
>> >> > str r1, [r2]
>> >> > @@ -69,13 +51,12 @@ _SetupStackPosition:
>> >> > // r1 = SystemMemoryTop
>> >> >
>> >> > // Calculate Top of the Firmware Device
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
>> >> > - sub r3, r3, #1
>> >> > + MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))
>> >> > + MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)
>> >> > add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
>> >> >
>> >> > // UEFI Memory Size (stacks are allocated in this region)
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize),
>> >> > r4)
>> >> > + MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>> >> >
>> >> > //
>> >> > // Reserve the memory for the UEFI region (contain stacks on its
>> >> > top)
>> >> > @@ -106,9 +87,8 @@ _SetupAlignedStack:
>> >> > _SetupOverflowStack:
>> >> > // Case memory at the top of the address space. Ensure the top of
>> >> > the
>> >> > stack is EFI_PAGE_SIZE
>> >> > // aligned (4KB)
>> >> > - LoadConstantToReg (EFI_PAGE_MASK, r9)
>> >> > - and r9, r9, r1
>> >> > - sub r1, r1, r9
>> >> > + MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)
>> >> > + and r1, r1, r9
>> >> >
>> >> > _GetBaseUefiMemory:
>> >> > // Calculate the Base of the UEFI Memory
>> >> > @@ -117,22 +97,19 @@ _GetBaseUefiMemory:
>> >> > _GetStackBase:
>> >> > // r1 = The top of the Mpcore Stacks
>> >> > // Stack for the primary core = PrimaryCoreStack
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>> >> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> >> > sub r10, r1, r2
>> >> >
>> >> > // Stack for the secondary core = Number of Cores - 1
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
>> >> > - sub r0, r0, #1
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize),
>> >> > r1)
>> >> > - mul r1, r1, r0
>> >> > + MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
>> >> > FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> >> > sub r10, r10, r1
>> >> >
>> >> > // r10 = The base of the MpCore Stacks (primary stack & secondary
>> >> > stacks)
>> >> > mov r0, r10
>> >> > mov r1, r8
>> >> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>> >> > SecondaryStackSize)
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>> >> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize),
>> >> > r3)
>> >> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> >> > + MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> >> > bl ASM_PFX(ArmPlatformStackSet)
>> >> >
>> >> > // Is it the Primary Core ?
>> >> > @@ -149,7 +126,7 @@ _PrepareArguments:
>> >> >
>> >> > // Move sec startup address into a data register
>> >> > // Ensure we're jumping to FV version of the code (not boot
>> >> > remapped
>> >> > alias)
>> >> > - ldr r4, StartupAddr
>> >> > + ldr r4, =ASM_PFX(CEntryPoint)
>> >> >
>> >> > // Jump to PrePiCore C code
>> >> > // r0 = MpId
>> >> > @@ -160,3 +137,4 @@ _PrepareArguments:
>> >> > _NeverReturn:
>> >> > b _NeverReturn
>> >> >
>> >> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>> >> > --
>> >> > 2.7.4
>> >> >
>> >> _______________________________________________
>> >> edk2-devel mailing list
>> >> edk2-devel@lists.01.org
>> >> https://lists.01.org/mailman/listinfo/edk2-devel
>> >
>> >
>
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-31 4:33 ` Michael Zimmermann
2016-08-31 9:14 ` Ard Biesheuvel
@ 2016-08-31 9:47 ` Evan Lloyd
2016-08-31 9:52 ` Michael Zimmermann
2016-09-07 11:10 ` Ryan Harkin
2 siblings, 1 reply; 56+ messages in thread
From: Evan Lloyd @ 2016-08-31 9:47 UTC (permalink / raw)
To: Michael Zimmermann, Leif Lindholm
Cc: edk2-devel@lists.01.org, Cohen, Eugene, Laszlo Ersek,
ard.biesheuvel@linaro.org
>-----Original Message-----
>From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
>Michael Zimmermann
>Sent: 31 August 2016 05:33
>To: Leif Lindholm
>Cc: edk2-devel@lists.01.org; Cohen, Eugene; Laszlo Ersek;
>ard.biesheuvel@linaro.org
>Subject: Re: [edk2] [PATCH 22/26] ArmPlatformPkg/PrePi: switch to
>ASM_FUNC() asm macro
>
>reviewed should mean tested ;)
>
Sorry to be pedantic, but shouldn't "Reviewed-by" mean code reviewed, and "Tested-by" mean tested?
Evan
...
IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you.
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-31 9:47 ` Evan Lloyd
@ 2016-08-31 9:52 ` Michael Zimmermann
2016-08-31 9:53 ` Ard Biesheuvel
0 siblings, 1 reply; 56+ messages in thread
From: Michael Zimmermann @ 2016-08-31 9:52 UTC (permalink / raw)
To: Evan Lloyd
Cc: Leif Lindholm, edk2-devel@lists.01.org, Cohen, Eugene,
Laszlo Ersek, ard.biesheuvel@linaro.org
>Sorry to be pedantic, but shouldn't "Reviewed-by" mean code reviewed, and
"Tested-by" > mean tested?
Yes you're right, sorry. I guess I just had too much hope in reviewers
actually testing the changes :D
On Wed, Aug 31, 2016 at 11:47 AM, Evan Lloyd <Evan.Lloyd@arm.com> wrote:
> >-----Original Message-----
> >From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
> >Michael Zimmermann
> >Sent: 31 August 2016 05:33
> >To: Leif Lindholm
> >Cc: edk2-devel@lists.01.org; Cohen, Eugene; Laszlo Ersek;
> >ard.biesheuvel@linaro.org
> >Subject: Re: [edk2] [PATCH 22/26] ArmPlatformPkg/PrePi: switch to
> >ASM_FUNC() asm macro
> >
> >reviewed should mean tested ;)
> >
> Sorry to be pedantic, but shouldn't "Reviewed-by" mean code reviewed, and
> "Tested-by" mean tested?
>
> Evan
> ...
>
> IMPORTANT NOTICE: The contents of this email and any attachments are
> confidential and may also be privileged. If you are not the intended
> recipient, please notify the sender immediately and do not disclose the
> contents to any other person, use it for any purpose, or store or copy the
> information in any medium. Thank you.
>
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-31 9:52 ` Michael Zimmermann
@ 2016-08-31 9:53 ` Ard Biesheuvel
0 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-31 9:53 UTC (permalink / raw)
To: Michael Zimmermann
Cc: Evan Lloyd, Leif Lindholm, edk2-devel@lists.01.org, Cohen, Eugene,
Laszlo Ersek
On 31 August 2016 at 10:52, Michael Zimmermann <sigmaepsilon92@gmail.com> wrote:
>>Sorry to be pedantic, but shouldn't "Reviewed-by" mean code reviewed, and
>> "Tested-by" > mean tested?
> Yes you're right, sorry. I guess I just had too much hope in reviewers
> actually testing the changes :D
>
You mean those reviewers that actually own a BeagleBoard?
> On Wed, Aug 31, 2016 at 11:47 AM, Evan Lloyd <Evan.Lloyd@arm.com> wrote:
>>
>> >-----Original Message-----
>> >From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of
>> >Michael Zimmermann
>> >Sent: 31 August 2016 05:33
>> >To: Leif Lindholm
>> >Cc: edk2-devel@lists.01.org; Cohen, Eugene; Laszlo Ersek;
>> >ard.biesheuvel@linaro.org
>> >Subject: Re: [edk2] [PATCH 22/26] ArmPlatformPkg/PrePi: switch to
>> >ASM_FUNC() asm macro
>> >
>> >reviewed should mean tested ;)
>> >
>> Sorry to be pedantic, but shouldn't "Reviewed-by" mean code reviewed, and
>> "Tested-by" mean tested?
>>
>> Evan
>> ...
>>
>> IMPORTANT NOTICE: The contents of this email and any attachments are
>> confidential and may also be privileged. If you are not the intended
>> recipient, please notify the sender immediately and do not disclose the
>> contents to any other person, use it for any purpose, or store or copy the
>> information in any medium. Thank you.
>>
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-08-31 4:33 ` Michael Zimmermann
2016-08-31 9:14 ` Ard Biesheuvel
2016-08-31 9:47 ` Evan Lloyd
@ 2016-09-07 11:10 ` Ryan Harkin
2016-09-07 11:59 ` Ard Biesheuvel
2 siblings, 1 reply; 56+ messages in thread
From: Ryan Harkin @ 2016-09-07 11:10 UTC (permalink / raw)
To: Michael Zimmermann
Cc: Leif Lindholm, edk2-devel@lists.01.org, Cohen, Eugene,
Laszlo Ersek, Ard Biesheuvel
On 31 August 2016 at 05:33, Michael Zimmermann <sigmaepsilon92@gmail.com> wrote:
> reviewed should mean tested ;)
>
> took me some time to find out why my system currently doesn't boot anymore
I have just bisected my TC2 boot failure down to this patch too.
> but here's the fix for this commit:
>
> diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> index b7127ce..39030da 100644
> --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
> @@ -101,7 +101,7 @@ _GetStackBase:
> sub r10, r1, r2
>
> // Stack for the secondary core = Number of Cores - 1
> - MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
> FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> + MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) *
> FixedPcdGet32(PcdCPUCoreSecondaryStackSize))^M
> sub r10, r10, r1
>
> // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
And this fix works for me on TC2 also.
Michael/Ard, has one of you already or does one of you intend to
submit the fix for this?
>
> On Thu, Aug 11, 2016 at 10:38 AM, Leif Lindholm <leif.lindholm@linaro.org>
> wrote:
>
>> On Wed, Aug 10, 2016 at 05:17:58PM +0200, Ard Biesheuvel wrote:
>> > Annotate functions with ASM_FUNC() so that they are emitted into
>> > separate sections.
>>
>> Also replacing LoadConstantToReg. Add that to commit message and:
>> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>>
>> > Contributed-under: TianoCore Contribution Agreement 1.0
>> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>> > ---
>> > ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49
>> ++++++-------------
>> > ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50
>> ++++++--------------
>> > 2 files changed, 29 insertions(+), 70 deletions(-)
>> >
>> > diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> > index 9538c70a237c..d0530a874726 100644
>> > --- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> > +++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>> > @@ -12,24 +12,10 @@
>> > //
>> >
>> > #include <AsmMacroIoLibV8.h>
>> > -#include <Base.h>
>> > -#include <Library/PcdLib.h>
>> > -#include <AutoGen.h>
>> > -
>> > -.text
>> > -.align 3
>> > -
>> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>> > -GCC_ASM_IMPORT(ArmReadMpidr)
>> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>> > -ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>> >
>> > -StartupAddr: .8byte ASM_PFX(CEntryPoint)
>> > -ASM_PFX(mSystemMemoryEnd): .8byte 0
>> > +ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>> >
>> > -ASM_PFX(_ModuleEntryPoint):
>> > +ASM_FUNC(_ModuleEntryPoint)
>> > // Do early platform specific actions
>> > bl ASM_PFX(ArmPlatformPeiBootAction)
>> >
>> > @@ -49,10 +35,8 @@ _SystemMemoryEndInit:
>> > cmp x1, #0
>> > bne _SetupStackPosition
>> >
>> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemoryBase), x1)
>> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemorySize), x2)
>> > - sub x2, x2, #1
>> > - add x1, x1, x2
>> > + MOV64 (x1, FixedPcdGet64(PcdSystemMemoryBase) + FixedPcdGet64(PcdSystemMemorySize)
>> - 1)
>> > +
>> > // Update the global variable
>> > adr x2, mSystemMemoryEnd
>> > str x1, [x2]
>> > @@ -61,13 +45,13 @@ _SetupStackPosition:
>> > // r1 = SystemMemoryTop
>> >
>> > // Calculate Top of the Firmware Device
>> > - LoadConstantToReg (FixedPcdGet64(PcdFdBaseAddress), x2)
>> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), x3)
>> > + MOV64 (x2, FixedPcdGet64(PcdFdBaseAddress))
>> > + MOV32 (x3, FixedPcdGet32(PcdFdSize) - 1)
>> > sub x3, x3, #1
>> > add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
>> >
>> > // UEFI Memory Size (stacks are allocated in this region)
>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), x4)
>> > + MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>> >
>> > //
>> > // Reserve the memory for the UEFI region (contain stacks on its top)
>> > @@ -98,9 +82,7 @@ _SetupAlignedStack:
>> > _SetupOverflowStack:
>> > // Case memory at the top of the address space. Ensure the top of the
>> stack is EFI_PAGE_SIZE
>> > // aligned (4KB)
>> > - LoadConstantToReg (EFI_PAGE_MASK, x11)
>> > - and x11, x11, x1
>> > - sub x1, x1, x11
>> > + and x1, x1, ~EFI_PAGE_MASK
>> >
>> > _GetBaseUefiMemory:
>> > // Calculate the Base of the UEFI Memory
>> > @@ -109,22 +91,19 @@ _GetBaseUefiMemory:
>> > _GetStackBase:
>> > // r1 = The top of the Mpcore Stacks
>> > // Stack for the primary core = PrimaryCoreStack
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> > sub x12, x1, x2
>> >
>> > // Stack for the secondary core = Number of Cores - 1
>> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
>> > - sub x0, x0, #1
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
>> > - mul x1, x1, x0
>> > + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(
>> PcdCPUCoreSecondaryStackSize))
>> > sub x12, x12, x1
>> >
>> > // x12 = The base of the MpCore Stacks (primary stack & secondary
>> stacks)
>> > mov x0, x12
>> > mov x1, x10
>> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>> SecondaryStackSize)
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
>> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> > + MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> > bl ASM_PFX(ArmPlatformStackSet)
>> >
>> > // Is it the Primary Core ?
>> > @@ -140,7 +119,7 @@ _PrepareArguments:
>> >
>> > // Move sec startup address into a data register
>> > // Ensure we're jumping to FV version of the code (not boot remapped
>> alias)
>> > - ldr x4, StartupAddr
>> > + ldr x4, =ASM_PFX(CEntryPoint)
>> >
>> > // Jump to PrePiCore C code
>> > // x0 = MpId
>> > @@ -150,3 +129,5 @@ _PrepareArguments:
>> >
>> > _NeverReturn:
>> > b _NeverReturn
>> > +
>> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>> > diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > index 1311efc5cb2c..b7127ce9fb4c 100644
>> > --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> > @@ -12,28 +12,12 @@
>> > //
>> >
>> > #include <AsmMacroIoLib.h>
>> > -#include <Base.h>
>> > -#include <Library/PcdLib.h>
>> > -#include <AutoGen.h>
>> >
>> > #include <Chipset/ArmV7.h>
>> >
>> > -.text
>> > -.align 3
>> > -
>> > -GCC_ASM_IMPORT(CEntryPoint)
>> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>> > -GCC_ASM_IMPORT(ArmReadMpidr)
>> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>> > GCC_ASM_EXPORT(mSystemMemoryEnd)
>> >
>> > -StartupAddr: .word CEntryPoint
>> > -mSystemMemoryEnd: .8byte 0
>> > -
>> > -
>> > -ASM_PFX(_ModuleEntryPoint):
>> > +ASM_FUNC(_ModuleEntryPoint)
>> > // Do early platform specific actions
>> > bl ASM_PFX(ArmPlatformPeiBootAction)
>> >
>> > @@ -57,10 +41,8 @@ _SystemMemoryEndInit:
>> > cmp r1, #0
>> > bne _SetupStackPosition
>> >
>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
>> > - sub r2, r2, #1
>> > - add r1, r1, r2
>> > + MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) + FixedPcdGet32(PcdSystemMemorySize)
>> - 1)
>> > +
>> > // Update the global variable
>> > adr r2, mSystemMemoryEnd
>> > str r1, [r2]
>> > @@ -69,13 +51,12 @@ _SetupStackPosition:
>> > // r1 = SystemMemoryTop
>> >
>> > // Calculate Top of the Firmware Device
>> > - LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
>> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
>> > - sub r3, r3, #1
>> > + MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))
>> > + MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)
>> > add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
>> >
>> > // UEFI Memory Size (stacks are allocated in this region)
>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
>> > + MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>> >
>> > //
>> > // Reserve the memory for the UEFI region (contain stacks on its top)
>> > @@ -106,9 +87,8 @@ _SetupAlignedStack:
>> > _SetupOverflowStack:
>> > // Case memory at the top of the address space. Ensure the top of the
>> stack is EFI_PAGE_SIZE
>> > // aligned (4KB)
>> > - LoadConstantToReg (EFI_PAGE_MASK, r9)
>> > - and r9, r9, r1
>> > - sub r1, r1, r9
>> > + MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)
>> > + and r1, r1, r9
>> >
>> > _GetBaseUefiMemory:
>> > // Calculate the Base of the UEFI Memory
>> > @@ -117,22 +97,19 @@ _GetBaseUefiMemory:
>> > _GetStackBase:
>> > // r1 = The top of the Mpcore Stacks
>> > // Stack for the primary core = PrimaryCoreStack
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> > sub r10, r1, r2
>> >
>> > // Stack for the secondary core = Number of Cores - 1
>> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
>> > - sub r0, r0, #1
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
>> > - mul r1, r1, r0
>> > + MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(
>> PcdCPUCoreSecondaryStackSize))
>> > sub r10, r10, r1
>> >
>> > // r10 = The base of the MpCore Stacks (primary stack & secondary
>> stacks)
>> > mov r0, r10
>> > mov r1, r8
>> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>> SecondaryStackSize)
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
>> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>> > + MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> > bl ASM_PFX(ArmPlatformStackSet)
>> >
>> > // Is it the Primary Core ?
>> > @@ -149,7 +126,7 @@ _PrepareArguments:
>> >
>> > // Move sec startup address into a data register
>> > // Ensure we're jumping to FV version of the code (not boot remapped
>> alias)
>> > - ldr r4, StartupAddr
>> > + ldr r4, =ASM_PFX(CEntryPoint)
>> >
>> > // Jump to PrePiCore C code
>> > // r0 = MpId
>> > @@ -160,3 +137,4 @@ _PrepareArguments:
>> > _NeverReturn:
>> > b _NeverReturn
>> >
>> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>> > --
>> > 2.7.4
>> >
>> _______________________________________________
>> edk2-devel mailing list
>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel
>>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-09-07 11:10 ` Ryan Harkin
@ 2016-09-07 11:59 ` Ard Biesheuvel
2016-09-07 12:18 ` Ryan Harkin
0 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-09-07 11:59 UTC (permalink / raw)
To: Ryan Harkin
Cc: Michael Zimmermann, Leif Lindholm, edk2-devel@lists.01.org,
Cohen, Eugene, Laszlo Ersek
On 7 September 2016 at 12:10, Ryan Harkin <ryan.harkin@linaro.org> wrote:
> On 31 August 2016 at 05:33, Michael Zimmermann <sigmaepsilon92@gmail.com> wrote:
>> reviewed should mean tested ;)
>>
>> took me some time to find out why my system currently doesn't boot anymore
>
> I have just bisected my TC2 boot failure down to this patch too.
>
>> but here's the fix for this commit:
>>
>> diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> index b7127ce..39030da 100644
>> --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>> @@ -101,7 +101,7 @@ _GetStackBase:
>> sub r10, r1, r2
>>
>> // Stack for the secondary core = Number of Cores - 1
>> - MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
>> FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>> + MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) *
>> FixedPcdGet32(PcdCPUCoreSecondaryStackSize))^M
>> sub r10, r10, r1
>>
>> // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
>
> And this fix works for me on TC2 also.
>
May we take that as a tested-by?
> Michael/Ard, has one of you already or does one of you intend to
> submit the fix for this?
>
Michael: care to send it as a proper patch, please?
>
>>
>> On Thu, Aug 11, 2016 at 10:38 AM, Leif Lindholm <leif.lindholm@linaro.org>
>> wrote:
>>
>>> On Wed, Aug 10, 2016 at 05:17:58PM +0200, Ard Biesheuvel wrote:
>>> > Annotate functions with ASM_FUNC() so that they are emitted into
>>> > separate sections.
>>>
>>> Also replacing LoadConstantToReg. Add that to commit message and:
>>> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>>>
>>> > Contributed-under: TianoCore Contribution Agreement 1.0
>>> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>>> > ---
>>> > ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49
>>> ++++++-------------
>>> > ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50
>>> ++++++--------------
>>> > 2 files changed, 29 insertions(+), 70 deletions(-)
>>> >
>>> > diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>>> b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>>> > index 9538c70a237c..d0530a874726 100644
>>> > --- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>>> > +++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>>> > @@ -12,24 +12,10 @@
>>> > //
>>> >
>>> > #include <AsmMacroIoLibV8.h>
>>> > -#include <Base.h>
>>> > -#include <Library/PcdLib.h>
>>> > -#include <AutoGen.h>
>>> > -
>>> > -.text
>>> > -.align 3
>>> > -
>>> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>>> > -GCC_ASM_IMPORT(ArmReadMpidr)
>>> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>>> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>>> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>>> > -ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>>> >
>>> > -StartupAddr: .8byte ASM_PFX(CEntryPoint)
>>> > -ASM_PFX(mSystemMemoryEnd): .8byte 0
>>> > +ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>>> >
>>> > -ASM_PFX(_ModuleEntryPoint):
>>> > +ASM_FUNC(_ModuleEntryPoint)
>>> > // Do early platform specific actions
>>> > bl ASM_PFX(ArmPlatformPeiBootAction)
>>> >
>>> > @@ -49,10 +35,8 @@ _SystemMemoryEndInit:
>>> > cmp x1, #0
>>> > bne _SetupStackPosition
>>> >
>>> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemoryBase), x1)
>>> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemorySize), x2)
>>> > - sub x2, x2, #1
>>> > - add x1, x1, x2
>>> > + MOV64 (x1, FixedPcdGet64(PcdSystemMemoryBase) + FixedPcdGet64(PcdSystemMemorySize)
>>> - 1)
>>> > +
>>> > // Update the global variable
>>> > adr x2, mSystemMemoryEnd
>>> > str x1, [x2]
>>> > @@ -61,13 +45,13 @@ _SetupStackPosition:
>>> > // r1 = SystemMemoryTop
>>> >
>>> > // Calculate Top of the Firmware Device
>>> > - LoadConstantToReg (FixedPcdGet64(PcdFdBaseAddress), x2)
>>> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), x3)
>>> > + MOV64 (x2, FixedPcdGet64(PcdFdBaseAddress))
>>> > + MOV32 (x3, FixedPcdGet32(PcdFdSize) - 1)
>>> > sub x3, x3, #1
>>> > add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
>>> >
>>> > // UEFI Memory Size (stacks are allocated in this region)
>>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), x4)
>>> > + MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>>> >
>>> > //
>>> > // Reserve the memory for the UEFI region (contain stacks on its top)
>>> > @@ -98,9 +82,7 @@ _SetupAlignedStack:
>>> > _SetupOverflowStack:
>>> > // Case memory at the top of the address space. Ensure the top of the
>>> stack is EFI_PAGE_SIZE
>>> > // aligned (4KB)
>>> > - LoadConstantToReg (EFI_PAGE_MASK, x11)
>>> > - and x11, x11, x1
>>> > - sub x1, x1, x11
>>> > + and x1, x1, ~EFI_PAGE_MASK
>>> >
>>> > _GetBaseUefiMemory:
>>> > // Calculate the Base of the UEFI Memory
>>> > @@ -109,22 +91,19 @@ _GetBaseUefiMemory:
>>> > _GetStackBase:
>>> > // r1 = The top of the Mpcore Stacks
>>> > // Stack for the primary core = PrimaryCoreStack
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>>> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>>> > sub x12, x1, x2
>>> >
>>> > // Stack for the secondary core = Number of Cores - 1
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
>>> > - sub x0, x0, #1
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
>>> > - mul x1, x1, x0
>>> > + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(
>>> PcdCPUCoreSecondaryStackSize))
>>> > sub x12, x12, x1
>>> >
>>> > // x12 = The base of the MpCore Stacks (primary stack & secondary
>>> stacks)
>>> > mov x0, x12
>>> > mov x1, x10
>>> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>>> SecondaryStackSize)
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
>>> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>>> > + MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>>> > bl ASM_PFX(ArmPlatformStackSet)
>>> >
>>> > // Is it the Primary Core ?
>>> > @@ -140,7 +119,7 @@ _PrepareArguments:
>>> >
>>> > // Move sec startup address into a data register
>>> > // Ensure we're jumping to FV version of the code (not boot remapped
>>> alias)
>>> > - ldr x4, StartupAddr
>>> > + ldr x4, =ASM_PFX(CEntryPoint)
>>> >
>>> > // Jump to PrePiCore C code
>>> > // x0 = MpId
>>> > @@ -150,3 +129,5 @@ _PrepareArguments:
>>> >
>>> > _NeverReturn:
>>> > b _NeverReturn
>>> > +
>>> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>>> > diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>> b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>> > index 1311efc5cb2c..b7127ce9fb4c 100644
>>> > --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>> > +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>> > @@ -12,28 +12,12 @@
>>> > //
>>> >
>>> > #include <AsmMacroIoLib.h>
>>> > -#include <Base.h>
>>> > -#include <Library/PcdLib.h>
>>> > -#include <AutoGen.h>
>>> >
>>> > #include <Chipset/ArmV7.h>
>>> >
>>> > -.text
>>> > -.align 3
>>> > -
>>> > -GCC_ASM_IMPORT(CEntryPoint)
>>> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>>> > -GCC_ASM_IMPORT(ArmReadMpidr)
>>> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>>> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>>> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>>> > GCC_ASM_EXPORT(mSystemMemoryEnd)
>>> >
>>> > -StartupAddr: .word CEntryPoint
>>> > -mSystemMemoryEnd: .8byte 0
>>> > -
>>> > -
>>> > -ASM_PFX(_ModuleEntryPoint):
>>> > +ASM_FUNC(_ModuleEntryPoint)
>>> > // Do early platform specific actions
>>> > bl ASM_PFX(ArmPlatformPeiBootAction)
>>> >
>>> > @@ -57,10 +41,8 @@ _SystemMemoryEndInit:
>>> > cmp r1, #0
>>> > bne _SetupStackPosition
>>> >
>>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
>>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
>>> > - sub r2, r2, #1
>>> > - add r1, r1, r2
>>> > + MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) + FixedPcdGet32(PcdSystemMemorySize)
>>> - 1)
>>> > +
>>> > // Update the global variable
>>> > adr r2, mSystemMemoryEnd
>>> > str r1, [r2]
>>> > @@ -69,13 +51,12 @@ _SetupStackPosition:
>>> > // r1 = SystemMemoryTop
>>> >
>>> > // Calculate Top of the Firmware Device
>>> > - LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
>>> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
>>> > - sub r3, r3, #1
>>> > + MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))
>>> > + MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)
>>> > add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
>>> >
>>> > // UEFI Memory Size (stacks are allocated in this region)
>>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
>>> > + MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>>> >
>>> > //
>>> > // Reserve the memory for the UEFI region (contain stacks on its top)
>>> > @@ -106,9 +87,8 @@ _SetupAlignedStack:
>>> > _SetupOverflowStack:
>>> > // Case memory at the top of the address space. Ensure the top of the
>>> stack is EFI_PAGE_SIZE
>>> > // aligned (4KB)
>>> > - LoadConstantToReg (EFI_PAGE_MASK, r9)
>>> > - and r9, r9, r1
>>> > - sub r1, r1, r9
>>> > + MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)
>>> > + and r1, r1, r9
>>> >
>>> > _GetBaseUefiMemory:
>>> > // Calculate the Base of the UEFI Memory
>>> > @@ -117,22 +97,19 @@ _GetBaseUefiMemory:
>>> > _GetStackBase:
>>> > // r1 = The top of the Mpcore Stacks
>>> > // Stack for the primary core = PrimaryCoreStack
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>>> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>>> > sub r10, r1, r2
>>> >
>>> > // Stack for the secondary core = Number of Cores - 1
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
>>> > - sub r0, r0, #1
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
>>> > - mul r1, r1, r0
>>> > + MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(
>>> PcdCPUCoreSecondaryStackSize))
>>> > sub r10, r10, r1
>>> >
>>> > // r10 = The base of the MpCore Stacks (primary stack & secondary
>>> stacks)
>>> > mov r0, r10
>>> > mov r1, r8
>>> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>>> SecondaryStackSize)
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
>>> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>>> > + MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>>> > bl ASM_PFX(ArmPlatformStackSet)
>>> >
>>> > // Is it the Primary Core ?
>>> > @@ -149,7 +126,7 @@ _PrepareArguments:
>>> >
>>> > // Move sec startup address into a data register
>>> > // Ensure we're jumping to FV version of the code (not boot remapped
>>> alias)
>>> > - ldr r4, StartupAddr
>>> > + ldr r4, =ASM_PFX(CEntryPoint)
>>> >
>>> > // Jump to PrePiCore C code
>>> > // r0 = MpId
>>> > @@ -160,3 +137,4 @@ _PrepareArguments:
>>> > _NeverReturn:
>>> > b _NeverReturn
>>> >
>>> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>>> > --
>>> > 2.7.4
>>> >
>>> _______________________________________________
>>> edk2-devel mailing list
>>> edk2-devel@lists.01.org
>>> https://lists.01.org/mailman/listinfo/edk2-devel
>>>
>> _______________________________________________
>> edk2-devel mailing list
>> edk2-devel@lists.01.org
>> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 22/26] ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
2016-09-07 11:59 ` Ard Biesheuvel
@ 2016-09-07 12:18 ` Ryan Harkin
0 siblings, 0 replies; 56+ messages in thread
From: Ryan Harkin @ 2016-09-07 12:18 UTC (permalink / raw)
To: Ard Biesheuvel
Cc: Michael Zimmermann, Leif Lindholm, edk2-devel@lists.01.org,
Cohen, Eugene, Laszlo Ersek
On 7 September 2016 at 12:59, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> On 7 September 2016 at 12:10, Ryan Harkin <ryan.harkin@linaro.org> wrote:
>> On 31 August 2016 at 05:33, Michael Zimmermann <sigmaepsilon92@gmail.com> wrote:
>>> reviewed should mean tested ;)
>>>
>>> took me some time to find out why my system currently doesn't boot anymore
>>
>> I have just bisected my TC2 boot failure down to this patch too.
>>
>>> but here's the fix for this commit:
>>>
>>> diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>> b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>> index b7127ce..39030da 100644
>>> --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>> +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>> @@ -101,7 +101,7 @@ _GetStackBase:
>>> sub r10, r1, r2
>>>
>>> // Stack for the secondary core = Number of Cores - 1
>>> - MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) *
>>> FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>>> + MOV32 (r1, (FixedPcdGet32(PcdCoreCount) - 1) *
>>> FixedPcdGet32(PcdCPUCoreSecondaryStackSize))^M
>>> sub r10, r10, r1
>>>
>>> // r10 = The base of the MpCore Stacks (primary stack & secondary stacks)
>>
>> And this fix works for me on TC2 also.
>>
>
> May we take that as a tested-by?
>
Oh yes! :-)
You can even have some tested text too:
Tested-by: Ryan Harkin <ryan.harkin@linaro.org>
But I'll be happy to report that if Michael (or someone else) posts a patch.
>> Michael/Ard, has one of you already or does one of you intend to
>> submit the fix for this?
>>
>
> Michael: care to send it as a proper patch, please?
>
>
>>
>>>
>>> On Thu, Aug 11, 2016 at 10:38 AM, Leif Lindholm <leif.lindholm@linaro.org>
>>> wrote:
>>>
>>>> On Wed, Aug 10, 2016 at 05:17:58PM +0200, Ard Biesheuvel wrote:
>>>> > Annotate functions with ASM_FUNC() so that they are emitted into
>>>> > separate sections.
>>>>
>>>> Also replacing LoadConstantToReg. Add that to commit message and:
>>>> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>>>>
>>>> > Contributed-under: TianoCore Contribution Agreement 1.0
>>>> > Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
>>>> > ---
>>>> > ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49
>>>> ++++++-------------
>>>> > ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50
>>>> ++++++--------------
>>>> > 2 files changed, 29 insertions(+), 70 deletions(-)
>>>> >
>>>> > diff --git a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>>>> b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>>>> > index 9538c70a237c..d0530a874726 100644
>>>> > --- a/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>>>> > +++ b/ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S
>>>> > @@ -12,24 +12,10 @@
>>>> > //
>>>> >
>>>> > #include <AsmMacroIoLibV8.h>
>>>> > -#include <Base.h>
>>>> > -#include <Library/PcdLib.h>
>>>> > -#include <AutoGen.h>
>>>> > -
>>>> > -.text
>>>> > -.align 3
>>>> > -
>>>> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>>>> > -GCC_ASM_IMPORT(ArmReadMpidr)
>>>> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>>>> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>>>> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>>>> > -ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>>>> >
>>>> > -StartupAddr: .8byte ASM_PFX(CEntryPoint)
>>>> > -ASM_PFX(mSystemMemoryEnd): .8byte 0
>>>> > +ASM_GLOBAL ASM_PFX(mSystemMemoryEnd)
>>>> >
>>>> > -ASM_PFX(_ModuleEntryPoint):
>>>> > +ASM_FUNC(_ModuleEntryPoint)
>>>> > // Do early platform specific actions
>>>> > bl ASM_PFX(ArmPlatformPeiBootAction)
>>>> >
>>>> > @@ -49,10 +35,8 @@ _SystemMemoryEndInit:
>>>> > cmp x1, #0
>>>> > bne _SetupStackPosition
>>>> >
>>>> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemoryBase), x1)
>>>> > - LoadConstantToReg (FixedPcdGet64(PcdSystemMemorySize), x2)
>>>> > - sub x2, x2, #1
>>>> > - add x1, x1, x2
>>>> > + MOV64 (x1, FixedPcdGet64(PcdSystemMemoryBase) + FixedPcdGet64(PcdSystemMemorySize)
>>>> - 1)
>>>> > +
>>>> > // Update the global variable
>>>> > adr x2, mSystemMemoryEnd
>>>> > str x1, [x2]
>>>> > @@ -61,13 +45,13 @@ _SetupStackPosition:
>>>> > // r1 = SystemMemoryTop
>>>> >
>>>> > // Calculate Top of the Firmware Device
>>>> > - LoadConstantToReg (FixedPcdGet64(PcdFdBaseAddress), x2)
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), x3)
>>>> > + MOV64 (x2, FixedPcdGet64(PcdFdBaseAddress))
>>>> > + MOV32 (x3, FixedPcdGet32(PcdFdSize) - 1)
>>>> > sub x3, x3, #1
>>>> > add x3, x3, x2 // x3 = FdTop = PcdFdBaseAddress + PcdFdSize
>>>> >
>>>> > // UEFI Memory Size (stacks are allocated in this region)
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), x4)
>>>> > + MOV32 (x4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>>>> >
>>>> > //
>>>> > // Reserve the memory for the UEFI region (contain stacks on its top)
>>>> > @@ -98,9 +82,7 @@ _SetupAlignedStack:
>>>> > _SetupOverflowStack:
>>>> > // Case memory at the top of the address space. Ensure the top of the
>>>> stack is EFI_PAGE_SIZE
>>>> > // aligned (4KB)
>>>> > - LoadConstantToReg (EFI_PAGE_MASK, x11)
>>>> > - and x11, x11, x1
>>>> > - sub x1, x1, x11
>>>> > + and x1, x1, ~EFI_PAGE_MASK
>>>> >
>>>> > _GetBaseUefiMemory:
>>>> > // Calculate the Base of the UEFI Memory
>>>> > @@ -109,22 +91,19 @@ _GetBaseUefiMemory:
>>>> > _GetStackBase:
>>>> > // r1 = The top of the Mpcore Stacks
>>>> > // Stack for the primary core = PrimaryCoreStack
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>>>> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>>>> > sub x12, x1, x2
>>>> >
>>>> > // Stack for the secondary core = Number of Cores - 1
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
>>>> > - sub x0, x0, #1
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
>>>> > - mul x1, x1, x0
>>>> > + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(
>>>> PcdCPUCoreSecondaryStackSize))
>>>> > sub x12, x12, x1
>>>> >
>>>> > // x12 = The base of the MpCore Stacks (primary stack & secondary
>>>> stacks)
>>>> > mov x0, x12
>>>> > mov x1, x10
>>>> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>>>> SecondaryStackSize)
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x3)
>>>> > + MOV32 (x2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>>>> > + MOV32 (x3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>>>> > bl ASM_PFX(ArmPlatformStackSet)
>>>> >
>>>> > // Is it the Primary Core ?
>>>> > @@ -140,7 +119,7 @@ _PrepareArguments:
>>>> >
>>>> > // Move sec startup address into a data register
>>>> > // Ensure we're jumping to FV version of the code (not boot remapped
>>>> alias)
>>>> > - ldr x4, StartupAddr
>>>> > + ldr x4, =ASM_PFX(CEntryPoint)
>>>> >
>>>> > // Jump to PrePiCore C code
>>>> > // x0 = MpId
>>>> > @@ -150,3 +129,5 @@ _PrepareArguments:
>>>> >
>>>> > _NeverReturn:
>>>> > b _NeverReturn
>>>> > +
>>>> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>>>> > diff --git a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>>> b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>>> > index 1311efc5cb2c..b7127ce9fb4c 100644
>>>> > --- a/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>>> > +++ b/ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S
>>>> > @@ -12,28 +12,12 @@
>>>> > //
>>>> >
>>>> > #include <AsmMacroIoLib.h>
>>>> > -#include <Base.h>
>>>> > -#include <Library/PcdLib.h>
>>>> > -#include <AutoGen.h>
>>>> >
>>>> > #include <Chipset/ArmV7.h>
>>>> >
>>>> > -.text
>>>> > -.align 3
>>>> > -
>>>> > -GCC_ASM_IMPORT(CEntryPoint)
>>>> > -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
>>>> > -GCC_ASM_IMPORT(ArmReadMpidr)
>>>> > -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
>>>> > -GCC_ASM_IMPORT(ArmPlatformStackSet)
>>>> > -GCC_ASM_EXPORT(_ModuleEntryPoint)
>>>> > GCC_ASM_EXPORT(mSystemMemoryEnd)
>>>> >
>>>> > -StartupAddr: .word CEntryPoint
>>>> > -mSystemMemoryEnd: .8byte 0
>>>> > -
>>>> > -
>>>> > -ASM_PFX(_ModuleEntryPoint):
>>>> > +ASM_FUNC(_ModuleEntryPoint)
>>>> > // Do early platform specific actions
>>>> > bl ASM_PFX(ArmPlatformPeiBootAction)
>>>> >
>>>> > @@ -57,10 +41,8 @@ _SystemMemoryEndInit:
>>>> > cmp r1, #0
>>>> > bne _SetupStackPosition
>>>> >
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
>>>> > - sub r2, r2, #1
>>>> > - add r1, r1, r2
>>>> > + MOV32 (r1, FixedPcdGet32(PcdSystemMemoryBase) + FixedPcdGet32(PcdSystemMemorySize)
>>>> - 1)
>>>> > +
>>>> > // Update the global variable
>>>> > adr r2, mSystemMemoryEnd
>>>> > str r1, [r2]
>>>> > @@ -69,13 +51,12 @@ _SetupStackPosition:
>>>> > // r1 = SystemMemoryTop
>>>> >
>>>> > // Calculate Top of the Firmware Device
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdFdBaseAddress), r2)
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdFdSize), r3)
>>>> > - sub r3, r3, #1
>>>> > + MOV32 (r2, FixedPcdGet32(PcdFdBaseAddress))
>>>> > + MOV32 (r3, FixedPcdGet32(PcdFdSize) - 1)
>>>> > add r3, r3, r2 // r3 = FdTop = PcdFdBaseAddress + PcdFdSize
>>>> >
>>>> > // UEFI Memory Size (stacks are allocated in this region)
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
>>>> > + MOV32 (r4, FixedPcdGet32(PcdSystemMemoryUefiRegionSize))
>>>> >
>>>> > //
>>>> > // Reserve the memory for the UEFI region (contain stacks on its top)
>>>> > @@ -106,9 +87,8 @@ _SetupAlignedStack:
>>>> > _SetupOverflowStack:
>>>> > // Case memory at the top of the address space. Ensure the top of the
>>>> stack is EFI_PAGE_SIZE
>>>> > // aligned (4KB)
>>>> > - LoadConstantToReg (EFI_PAGE_MASK, r9)
>>>> > - and r9, r9, r1
>>>> > - sub r1, r1, r9
>>>> > + MOV32 (r9, ~EFI_PAGE_MASK & 0xFFFFFFFF)
>>>> > + and r1, r1, r9
>>>> >
>>>> > _GetBaseUefiMemory:
>>>> > // Calculate the Base of the UEFI Memory
>>>> > @@ -117,22 +97,19 @@ _GetBaseUefiMemory:
>>>> > _GetStackBase:
>>>> > // r1 = The top of the Mpcore Stacks
>>>> > // Stack for the primary core = PrimaryCoreStack
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>>>> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>>>> > sub r10, r1, r2
>>>> >
>>>> > // Stack for the secondary core = Number of Cores - 1
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), r0)
>>>> > - sub r0, r0, #1
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
>>>> > - mul r1, r1, r0
>>>> > + MOV32 (r0, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(
>>>> PcdCPUCoreSecondaryStackSize))
>>>> > sub r10, r10, r1
>>>> >
>>>> > // r10 = The base of the MpCore Stacks (primary stack & secondary
>>>> stacks)
>>>> > mov r0, r10
>>>> > mov r1, r8
>>>> > //ArmPlatformStackSet(StackBase, MpId, PrimaryStackSize,
>>>> SecondaryStackSize)
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>>>> > - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
>>>> > + MOV32 (r2, FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>>>> > + MOV32 (r3, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>>>> > bl ASM_PFX(ArmPlatformStackSet)
>>>> >
>>>> > // Is it the Primary Core ?
>>>> > @@ -149,7 +126,7 @@ _PrepareArguments:
>>>> >
>>>> > // Move sec startup address into a data register
>>>> > // Ensure we're jumping to FV version of the code (not boot remapped
>>>> alias)
>>>> > - ldr r4, StartupAddr
>>>> > + ldr r4, =ASM_PFX(CEntryPoint)
>>>> >
>>>> > // Jump to PrePiCore C code
>>>> > // r0 = MpId
>>>> > @@ -160,3 +137,4 @@ _PrepareArguments:
>>>> > _NeverReturn:
>>>> > b _NeverReturn
>>>> >
>>>> > +ASM_PFX(mSystemMemoryEnd): .8byte 0
>>>> > --
>>>> > 2.7.4
>>>> >
>>>> _______________________________________________
>>>> edk2-devel mailing list
>>>> edk2-devel@lists.01.org
>>>> https://lists.01.org/mailman/listinfo/edk2-devel
>>>>
>>> _______________________________________________
>>> edk2-devel mailing list
>>> edk2-devel@lists.01.org
>>> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 23/26] ArmPlatformPkg/PrePeiCore: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (21 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 22/26] ArmPlatformPkg/PrePi: " Ard Biesheuvel
@ 2016-08-10 15:17 ` Ard Biesheuvel
2016-08-11 8:38 ` Leif Lindholm
2016-08-10 15:18 ` [PATCH 24/26] ArmPlatformPkg/ArmVExpressPkg: " Ard Biesheuvel
` (3 subsequent siblings)
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:17 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPlatformPkg/PrePeiCore/AArch64/Helper.S | 11 ++-----
ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 30 ++++----------------
ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S | 9 ++----
ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S | 30 ++++----------------
ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S | 9 ++----
5 files changed, 18 insertions(+), 71 deletions(-)
diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
index 8e23b0389653..5f35484b1259 100644
--- a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
+++ b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
@@ -14,15 +14,8 @@
#include <AsmMacroIoLibV8.h>
#include <Chipset/AArch64.h>
-#start of the code section
-.text
-.align 3
-
-GCC_ASM_EXPORT(SetupExceptionLevel1)
-GCC_ASM_EXPORT(SetupExceptionLevel2)
-
// Setup EL1 while in EL1
-ASM_PFX(SetupExceptionLevel1):
+ASM_FUNC(SetupExceptionLevel1)
mov x5, x30 // Save LR
mov x0, #CPACR_CP_FULL_ACCESS
@@ -31,7 +24,7 @@ ASM_PFX(SetupExceptionLevel1):
ret x5
// Setup EL2 while in EL2
-ASM_PFX(SetupExceptionLevel2):
+ASM_FUNC(SetupExceptionLevel2)
msr sctlr_el2, xzr
mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register
diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S
index 34bf3a4e6831..aab5edab0c42 100644
--- a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S
+++ b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S
@@ -12,23 +12,8 @@
//
#include <AsmMacroIoLibV8.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-.text
-.align 3
-
-GCC_ASM_IMPORT(CEntryPoint)
-GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_IMPORT(ArmReadMpidr)
-GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-
-StartupAddr: .8byte CEntryPoint
-
-ASM_PFX(_ModuleEntryPoint):
+ASM_FUNC(_ModuleEntryPoint)
// Do early platform specific actions
bl ASM_PFX(ArmPlatformPeiBootAction)
@@ -60,9 +45,7 @@ ASM_PFX(MainEntryPoint):
bl ASM_PFX(ArmPlatformIsPrimaryCore)
// Get the top of the primary stacks (and the base of the secondary stacks)
- LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), x1)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
- add x1, x1, x2
+ MOV64 (x1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
// x0 is equal to 1 if I am the primary core
cmp x0, #1
@@ -79,20 +62,19 @@ _SetupSecondaryCoreStack:
add x0, x0, #1
// StackOffset = CorePos * StackSize
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x2)
+ MOV32 (x2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
mul x0, x0, x2
// SP = StackBase + StackOffset
add sp, x6, x0
_PrepareArguments:
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
- LoadConstantToReg (FixedPcdGet64(PcdFvBaseAddress), x2)
- add x2, x2, #8
- ldr x1, [x2]
+ MOV64 (x2, FixedPcdGet64(PcdFvBaseAddress))
+ ldr x1, [x2, #8]
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
- ldr x3, StartupAddr
+ ldr x3, =ASM_PFX(CEntryPoint)
// Jump to PrePeiCore C code
// x0 = mp_id
diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S b/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S
index 8d83510517b4..89b98e630f5c 100644
--- a/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S
+++ b/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S
@@ -14,12 +14,7 @@
#
#------------------------------------------------------------------------------
-.text
-.align 3
-
-GCC_ASM_EXPORT(SecSwitchStack)
-
-
+#include <AsmMacroIoLibV8.h>
#/**
# This allows the caller to switch the stack and return
@@ -35,7 +30,7 @@ GCC_ASM_EXPORT(SecSwitchStack)
# VOID *StackDelta
# )#
#
-ASM_PFX(SecSwitchStack):
+ASM_FUNC(SecSwitchStack)
mov x1, sp
add x1, x0, x1
mov sp, x1
diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S
index 1693f52e26c8..14344425ad4c 100644
--- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S
+++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S
@@ -12,23 +12,8 @@
//
#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-.text
-.align 3
-
-GCC_ASM_IMPORT(CEntryPoint)
-GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_IMPORT(ArmReadMpidr)
-GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(_ModuleEntryPoint)
-
-StartupAddr: .word CEntryPoint
-
-ASM_PFX(_ModuleEntryPoint):
+ASM_FUNC(_ModuleEntryPoint)
// Do early platform specific actions
bl ASM_PFX(ArmPlatformPeiBootAction)
@@ -41,9 +26,7 @@ ASM_PFX(_ModuleEntryPoint):
bl ASM_PFX(ArmPlatformIsPrimaryCore)
// Get the top of the primary stacks (and the base of the secondary stacks)
- LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)
- LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
- add r1, r1, r2
+ MOV32 (r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
// r0 is equal to 1 if I am the primary core
cmp r0, #1
@@ -60,20 +43,19 @@ _SetupSecondaryCoreStack:
add r0, r0, #1
// StackOffset = CorePos * StackSize
- LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
+ MOV32 (r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
mul r0, r0, r2
// SP = StackBase + StackOffset
add sp, r6, r0
_PrepareArguments:
// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
- LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
- add r2, r2, #4
- ldr r1, [r2]
+ MOV32 (r2, FixedPcdGet32(PcdFvBaseAddress))
+ ldr r1, [r2, #4]
// Move sec startup address into a data register
// Ensure we're jumping to FV version of the code (not boot remapped alias)
- ldr r3, StartupAddr
+ ldr r3, =ASM_PFX(CEntryPoint)
// Jump to PrePeiCore C code
// r0 = mp_id
diff --git a/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S b/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S
index 509dc205d992..c419463b4f94 100644
--- a/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S
+++ b/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S
@@ -12,12 +12,7 @@
#
#------------------------------------------------------------------------------
-.text
-.align 3
-
-GCC_ASM_EXPORT(SecSwitchStack)
-
-
+#include <AsmMacroIoLib.h>
#/**
# This allows the caller to switch the stack and return
@@ -33,7 +28,7 @@ GCC_ASM_EXPORT(SecSwitchStack)
# VOID *StackDelta
# )#
#
-ASM_PFX(SecSwitchStack):
+ASM_FUNC(SecSwitchStack)
mov R1, R13
add R1, R0, R1
mov R13, R1
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 23/26] ArmPlatformPkg/PrePeiCore: switch to ASM_FUNC() asm macro
2016-08-10 15:17 ` [PATCH 23/26] ArmPlatformPkg/PrePeiCore: " Ard Biesheuvel
@ 2016-08-11 8:38 ` Leif Lindholm
0 siblings, 0 replies; 56+ messages in thread
From: Leif Lindholm @ 2016-08-11 8:38 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
On Wed, Aug 10, 2016 at 05:17:59PM +0200, Ard Biesheuvel wrote:
> Annotate functions with ASM_FUNC() so that they are emitted into
> separate sections.
Also replacing LoadConstantToReg. Add that to commit message and:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> ArmPlatformPkg/PrePeiCore/AArch64/Helper.S | 11 ++-----
> ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 30 ++++----------------
> ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S | 9 ++----
> ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S | 30 ++++----------------
> ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S | 9 ++----
> 5 files changed, 18 insertions(+), 71 deletions(-)
>
> diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
> index 8e23b0389653..5f35484b1259 100644
> --- a/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
> +++ b/ArmPlatformPkg/PrePeiCore/AArch64/Helper.S
> @@ -14,15 +14,8 @@
> #include <AsmMacroIoLibV8.h>
> #include <Chipset/AArch64.h>
>
> -#start of the code section
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT(SetupExceptionLevel1)
> -GCC_ASM_EXPORT(SetupExceptionLevel2)
> -
> // Setup EL1 while in EL1
> -ASM_PFX(SetupExceptionLevel1):
> +ASM_FUNC(SetupExceptionLevel1)
> mov x5, x30 // Save LR
>
> mov x0, #CPACR_CP_FULL_ACCESS
> @@ -31,7 +24,7 @@ ASM_PFX(SetupExceptionLevel1):
> ret x5
>
> // Setup EL2 while in EL2
> -ASM_PFX(SetupExceptionLevel2):
> +ASM_FUNC(SetupExceptionLevel2)
> msr sctlr_el2, xzr
> mrs x0, hcr_el2 // Read EL2 Hypervisor configuration Register
>
> diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S
> index 34bf3a4e6831..aab5edab0c42 100644
> --- a/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S
> +++ b/ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S
> @@ -12,23 +12,8 @@
> //
>
> #include <AsmMacroIoLibV8.h>
> -#include <Base.h>
> -#include <Library/PcdLib.h>
> -#include <AutoGen.h>
>
> -.text
> -.align 3
> -
> -GCC_ASM_IMPORT(CEntryPoint)
> -GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_IMPORT(ArmReadMpidr)
> -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(_ModuleEntryPoint)
> -
> -StartupAddr: .8byte CEntryPoint
> -
> -ASM_PFX(_ModuleEntryPoint):
> +ASM_FUNC(_ModuleEntryPoint)
> // Do early platform specific actions
> bl ASM_PFX(ArmPlatformPeiBootAction)
>
> @@ -60,9 +45,7 @@ ASM_PFX(MainEntryPoint):
> bl ASM_PFX(ArmPlatformIsPrimaryCore)
>
> // Get the top of the primary stacks (and the base of the secondary stacks)
> - LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), x1)
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
> - add x1, x1, x2
> + MOV64 (x1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>
> // x0 is equal to 1 if I am the primary core
> cmp x0, #1
> @@ -79,20 +62,19 @@ _SetupSecondaryCoreStack:
> add x0, x0, #1
>
> // StackOffset = CorePos * StackSize
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x2)
> + MOV32 (x2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> mul x0, x0, x2
> // SP = StackBase + StackOffset
> add sp, x6, x0
>
> _PrepareArguments:
> // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
> - LoadConstantToReg (FixedPcdGet64(PcdFvBaseAddress), x2)
> - add x2, x2, #8
> - ldr x1, [x2]
> + MOV64 (x2, FixedPcdGet64(PcdFvBaseAddress))
> + ldr x1, [x2, #8]
>
> // Move sec startup address into a data register
> // Ensure we're jumping to FV version of the code (not boot remapped alias)
> - ldr x3, StartupAddr
> + ldr x3, =ASM_PFX(CEntryPoint)
>
> // Jump to PrePeiCore C code
> // x0 = mp_id
> diff --git a/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S b/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S
> index 8d83510517b4..89b98e630f5c 100644
> --- a/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S
> +++ b/ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S
> @@ -14,12 +14,7 @@
> #
> #------------------------------------------------------------------------------
>
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT(SecSwitchStack)
> -
> -
> +#include <AsmMacroIoLibV8.h>
>
> #/**
> # This allows the caller to switch the stack and return
> @@ -35,7 +30,7 @@ GCC_ASM_EXPORT(SecSwitchStack)
> # VOID *StackDelta
> # )#
> #
> -ASM_PFX(SecSwitchStack):
> +ASM_FUNC(SecSwitchStack)
> mov x1, sp
> add x1, x0, x1
> mov sp, x1
> diff --git a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S
> index 1693f52e26c8..14344425ad4c 100644
> --- a/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S
> +++ b/ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S
> @@ -12,23 +12,8 @@
> //
>
> #include <AsmMacroIoLib.h>
> -#include <Base.h>
> -#include <Library/PcdLib.h>
> -#include <AutoGen.h>
>
> -.text
> -.align 3
> -
> -GCC_ASM_IMPORT(CEntryPoint)
> -GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_IMPORT(ArmReadMpidr)
> -GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(_ModuleEntryPoint)
> -
> -StartupAddr: .word CEntryPoint
> -
> -ASM_PFX(_ModuleEntryPoint):
> +ASM_FUNC(_ModuleEntryPoint)
> // Do early platform specific actions
> bl ASM_PFX(ArmPlatformPeiBootAction)
>
> @@ -41,9 +26,7 @@ ASM_PFX(_ModuleEntryPoint):
> bl ASM_PFX(ArmPlatformIsPrimaryCore)
>
> // Get the top of the primary stacks (and the base of the secondary stacks)
> - LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
> - add r1, r1, r2
> + MOV32 (r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>
> // r0 is equal to 1 if I am the primary core
> cmp r0, #1
> @@ -60,20 +43,19 @@ _SetupSecondaryCoreStack:
> add r0, r0, #1
>
> // StackOffset = CorePos * StackSize
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r2)
> + MOV32 (r2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
> mul r0, r0, r2
> // SP = StackBase + StackOffset
> add sp, r6, r0
>
> _PrepareArguments:
> // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
> - LoadConstantToReg (FixedPcdGet32(PcdFvBaseAddress), r2)
> - add r2, r2, #4
> - ldr r1, [r2]
> + MOV32 (r2, FixedPcdGet32(PcdFvBaseAddress))
> + ldr r1, [r2, #4]
>
> // Move sec startup address into a data register
> // Ensure we're jumping to FV version of the code (not boot remapped alias)
> - ldr r3, StartupAddr
> + ldr r3, =ASM_PFX(CEntryPoint)
>
> // Jump to PrePeiCore C code
> // r0 = mp_id
> diff --git a/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S b/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S
> index 509dc205d992..c419463b4f94 100644
> --- a/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S
> +++ b/ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S
> @@ -12,12 +12,7 @@
> #
> #------------------------------------------------------------------------------
>
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT(SecSwitchStack)
> -
> -
> +#include <AsmMacroIoLib.h>
>
> #/**
> # This allows the caller to switch the stack and return
> @@ -33,7 +28,7 @@ GCC_ASM_EXPORT(SecSwitchStack)
> # VOID *StackDelta
> # )#
> #
> -ASM_PFX(SecSwitchStack):
> +ASM_FUNC(SecSwitchStack)
> mov R1, R13
> add R1, R0, R1
> mov R13, R1
> --
> 2.7.4
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 24/26] ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (22 preceding siblings ...)
2016-08-10 15:17 ` [PATCH 23/26] ArmPlatformPkg/PrePeiCore: " Ard Biesheuvel
@ 2016-08-10 15:18 ` Ard Biesheuvel
2016-08-11 8:39 ` Leif Lindholm
2016-08-10 15:18 ` [PATCH 25/26] ArmPlatformPkg/ArmPlatformLibNull: " Ard Biesheuvel
` (2 subsequent siblings)
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:18 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S | 22 ++++-------
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S | 28 ++++---------
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S | 38 +++++-------------
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S | 41 ++++++--------------
ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S | 23 ++++-------
5 files changed, 41 insertions(+), 111 deletions(-)
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S
index 20bfe52610e3..3719a5ace604 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S
@@ -16,22 +16,14 @@
#include <ArmPlatform.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
bx lr
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #7
@@ -41,10 +33,10 @@ ASM_PFX(ArmPlatformGetCorePosition):
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
+ASM_FUNC(ArmPlatformIsPrimaryCore)
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
+ MOV32 (r1, ARM_CTA15A7_SCC_CFGREG48)
ldr r1, [r1]
lsr r1, #24
@@ -58,7 +50,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
orr r1, r1, r2
// Keep the Cluster ID and Core ID from the MPID
- LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)
+ MOV32 (r2, ARM_CLUSTER_MASK | ARM_CORE_MASK)
and r0, r0, r2
// Compare mpid and boot cpu from ARM_SCC_CFGREG48
@@ -71,10 +63,10 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
// Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
// with cpu_id[0:3] and cluster_id[4:7]
- LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
+ MOV32 (r0, ARM_CTA15A7_SCC_CFGREG48)
ldr r0, [r0]
lsr r0, #24
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
index c4aee741a602..f95d2f43d665 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
@@ -14,36 +14,22 @@
#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
- ldr r1, [r1]
+ MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore))
cmp r0, r1
moveq r0, #1
movne r0, #0
@@ -53,11 +39,11 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and r0, r0, #ARM_CORE_MASK
bx lr
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
bx lr
ASM_FUNCTION_REMOVE_IF_UNREFERENCED
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S
index 50ff71391700..db6d83c3cce9 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S
@@ -12,53 +12,33 @@
#
#include <AsmMacroIoLibV8.h>
-#include <Base.h>
#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
-
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
ret
//UINTN
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
- ldrh w0, [x0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
ret
# IN None
# OUT x0 = number of cores present in the system
-ASM_PFX(ArmGetCpuCountPerCluster):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x0)
- ldrh w0, [x0]
+ASM_FUNC(ArmGetCpuCountPerCluster)
+ MOV32 (w0, FixedPcdGet32 (PcdCoreCount))
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
- ldrh w1, [x1]
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and x0, x0, x1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1)
- ldrh w1, [x1]
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
cmp w0, w1
b.ne 1f
mov x0, #1
@@ -72,7 +52,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #6
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
index e739050b0db5..35743b08dc88 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
@@ -12,32 +12,16 @@
#
#include <AsmMacroIoLib.h>
-#include <Base.h>
#include <Library/ArmLib.h>
-#include <Library/PcdLib.h>
-#include <AutoGen.h>
-#include "AsmMacroIoLib.inc"
#include <Chipset/ArmCortexA9.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
bx lr
# IN None
# OUT r0 = SCU Base Address
-ASM_PFX(ArmGetScuBaseAddress):
+ASM_FUNC(ArmGetScuBaseAddress)
# Read Configuration Base Address Register. ArmCBar cannot be called to get
# the Configuration BAR as a stack is not necessary setup. The SCU is at the
# offset 0x0000 from the Private Memory Region.
@@ -48,14 +32,13 @@ ASM_PFX(ArmGetScuBaseAddress):
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
bx lr
# IN None
# OUT r0 = number of cores present in the system
-ASM_PFX(ArmGetCpuCountPerCluster):
+ASM_FUNC(ArmGetCpuCountPerCluster)
stmfd SP!, {r1-r2}
# Read CP15 MIDR
@@ -63,10 +46,10 @@ ASM_PFX(ArmGetCpuCountPerCluster):
# Check if the CPU is A15
mov r1, r1, LSR #4
- LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)
+ MOV32 (r0, ARM_CPU_TYPE_MASK)
and r1, r1, r0
- LoadConstantToReg (ARM_CPU_TYPE_A15, r0)
+ MOV32 (r0, ARM_CPU_TYPE_A15)
cmp r1, r0
beq _Read_cp15_reg
@@ -92,12 +75,10 @@ _Return:
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
- ldr r1, [r1]
+ MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore))
cmp r0, r1
moveq r0, #1
movne r0, #0
@@ -107,7 +88,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #7
diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S
index c14c986ccfcc..1579c99ce787 100644
--- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S
+++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S
@@ -12,18 +12,9 @@
//
#include <AsmMacroIoLib.h>
-#include <Base.h>
#include <Library/ArmPlatformLib.h>
#include <Drivers/PL35xSmc.h>
#include <ArmPlatform.h>
-#include <AutoGen.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformSecBootAction)
-GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
-GCC_ASM_IMPORT(PL35xSmcInitialize)
//
// For each Chip Select: ChipSelect / SetCycle / SetOpMode
@@ -69,7 +60,7 @@ VersatileExpressSmcConfigurationEnd:
Note: This function must be implemented in assembler as there is no stack set up yet
**/
-ASM_PFX(ArmPlatformSecBootAction):
+ASM_FUNC(ArmPlatformSecBootAction)
bx lr
/**
@@ -82,21 +73,21 @@ ASM_PFX(ArmPlatformSecBootAction):
pointer is not used (probably required to use assembly language)
**/
-ASM_PFX(ArmPlatformSecBootMemoryInit):
+ASM_FUNC(ArmPlatformSecBootMemoryInit)
mov r5, lr
//
// Initialize PL354 SMC
//
- LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
- LoadConstantToReg (VersatileExpressSmcConfiguration, r2)
- LoadConstantToReg (VersatileExpressSmcConfigurationEnd, r3)
+ MOV32 (r1, ARM_VE_SMC_CTRL_BASE)
+ MOV32 (r2, VersatileExpressSmcConfiguration)
+ MOV32 (r3, VersatileExpressSmcConfigurationEnd)
blx ASM_PFX(PL35xSmcInitialize)
//
// Page mode setup for VRAM
//
- LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
+ MOV32 (r2, VRAM_MOTHERBOARD_BASE)
// Read current state
ldr r0, [r2, #0]
@@ -110,7 +101,7 @@ ASM_PFX(ArmPlatformSecBootMemoryInit):
ldr r0, [r2, #0]
ldr r0, = 0x00000000
str r0, [r2, #0]
- LoadConstantToReg (0x00900090, r0)
+ ldr r0, = 0x00900090
str r0, [r2, #0]
// Confirm page mode enabled
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 24/26] ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macro
2016-08-10 15:18 ` [PATCH 24/26] ArmPlatformPkg/ArmVExpressPkg: " Ard Biesheuvel
@ 2016-08-11 8:39 ` Leif Lindholm
0 siblings, 0 replies; 56+ messages in thread
From: Leif Lindholm @ 2016-08-11 8:39 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
On Wed, Aug 10, 2016 at 05:18:00PM +0200, Ard Biesheuvel wrote:
> Annotate functions with ASM_FUNC() so that they are emitted into
> separate sections.
Also replacing LoadConstantToReg. Add that to commit message and:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S | 22 ++++-------
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S | 28 ++++---------
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S | 38 +++++-------------
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S | 41 ++++++--------------
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S | 23 ++++-------
> 5 files changed, 41 insertions(+), 111 deletions(-)
>
> diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S
> index 20bfe52610e3..3719a5ace604 100644
> --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S
> +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S
> @@ -16,22 +16,14 @@
>
> #include <ArmPlatform.h>
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> -
> -ASM_PFX(ArmPlatformPeiBootAction):
> +ASM_FUNC(ArmPlatformPeiBootAction)
> bx lr
>
> //UINTN
> //ArmPlatformGetCorePosition (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformGetCorePosition):
> +ASM_FUNC(ArmPlatformGetCorePosition)
> and r1, r0, #ARM_CORE_MASK
> and r0, r0, #ARM_CLUSTER_MASK
> add r0, r1, r0, LSR #7
> @@ -41,10 +33,10 @@ ASM_PFX(ArmPlatformGetCorePosition):
> //ArmPlatformIsPrimaryCore (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformIsPrimaryCore):
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
> // with cpu_id[0:3] and cluster_id[4:7]
> - LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r1)
> + MOV32 (r1, ARM_CTA15A7_SCC_CFGREG48)
> ldr r1, [r1]
> lsr r1, #24
>
> @@ -58,7 +50,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
> orr r1, r1, r2
>
> // Keep the Cluster ID and Core ID from the MPID
> - LoadConstantToReg (ARM_CLUSTER_MASK | ARM_CORE_MASK, r2)
> + MOV32 (r2, ARM_CLUSTER_MASK | ARM_CORE_MASK)
> and r0, r0, r2
>
> // Compare mpid and boot cpu from ARM_SCC_CFGREG48
> @@ -71,10 +63,10 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
> //ArmPlatformGetPrimaryCoreMpId (
> // VOID
> // );
> -ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> // Extract cpu_id and cluster_id from ARM_SCC_CFGREG48
> // with cpu_id[0:3] and cluster_id[4:7]
> - LoadConstantToReg (ARM_CTA15A7_SCC_CFGREG48, r0)
> + MOV32 (r0, ARM_CTA15A7_SCC_CFGREG48)
> ldr r0, [r0]
> lsr r0, #24
>
> diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
> index c4aee741a602..f95d2f43d665 100644
> --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
> +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S
> @@ -14,36 +14,22 @@
> #include <AsmMacroIoLib.h>
> #include <Library/ArmLib.h>
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> -GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> -
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
> -
> //UINTN
> //ArmPlatformGetPrimaryCoreMpId (
> // VOID
> // );
> -ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
> - ldr r0, [r0]
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> + MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
> bx lr
>
> //UINTN
> //ArmPlatformIsPrimaryCore (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformIsPrimaryCore):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
> - ldr r1, [r1]
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
> and r0, r0, r1
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
> - ldr r1, [r1]
> + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore))
> cmp r0, r1
> moveq r0, #1
> movne r0, #0
> @@ -53,11 +39,11 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
> //ArmPlatformGetCorePosition (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformGetCorePosition):
> +ASM_FUNC(ArmPlatformGetCorePosition)
> and r0, r0, #ARM_CORE_MASK
> bx lr
>
> -ASM_PFX(ArmPlatformPeiBootAction):
> +ASM_FUNC(ArmPlatformPeiBootAction)
> bx lr
>
> ASM_FUNCTION_REMOVE_IF_UNREFERENCED
> diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S
> index 50ff71391700..db6d83c3cce9 100644
> --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S
> +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S
> @@ -12,53 +12,33 @@
> #
>
> #include <AsmMacroIoLibV8.h>
> -#include <Base.h>
> #include <Library/ArmLib.h>
> -#include <Library/PcdLib.h>
> -#include <AutoGen.h>
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> -GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
> -
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
> -
> -ASM_PFX(ArmPlatformPeiBootAction):
> +ASM_FUNC(ArmPlatformPeiBootAction)
> ret
>
> //UINTN
> //ArmPlatformGetPrimaryCoreMpId (
> // VOID
> // );
> -ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
> - ldrh w0, [x0]
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
> ret
>
> # IN None
> # OUT x0 = number of cores present in the system
> -ASM_PFX(ArmGetCpuCountPerCluster):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x0)
> - ldrh w0, [x0]
> +ASM_FUNC(ArmGetCpuCountPerCluster)
> + MOV32 (w0, FixedPcdGet32 (PcdCoreCount))
> ret
>
> //UINTN
> //ArmPlatformIsPrimaryCore (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformIsPrimaryCore):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
> - ldrh w1, [x1]
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
> and x0, x0, x1
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1)
> - ldrh w1, [x1]
> + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
> cmp w0, w1
> b.ne 1f
> mov x0, #1
> @@ -72,7 +52,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
> // IN UINTN MpId
> // );
> // With this function: CorePos = (ClusterId * 4) + CoreId
> -ASM_PFX(ArmPlatformGetCorePosition):
> +ASM_FUNC(ArmPlatformGetCorePosition)
> and x1, x0, #ARM_CORE_MASK
> and x0, x0, #ARM_CLUSTER_MASK
> add x0, x1, x0, LSR #6
> diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
> index e739050b0db5..35743b08dc88 100644
> --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
> +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S
> @@ -12,32 +12,16 @@
> #
>
> #include <AsmMacroIoLib.h>
> -#include <Base.h>
> #include <Library/ArmLib.h>
> -#include <Library/PcdLib.h>
> -#include <AutoGen.h>
> -#include "AsmMacroIoLib.inc"
>
> #include <Chipset/ArmCortexA9.h>
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(ArmGetCpuCountPerCluster)
> -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> -GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> -
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
> -
> -ASM_PFX(ArmPlatformPeiBootAction):
> +ASM_FUNC(ArmPlatformPeiBootAction)
> bx lr
>
> # IN None
> # OUT r0 = SCU Base Address
> -ASM_PFX(ArmGetScuBaseAddress):
> +ASM_FUNC(ArmGetScuBaseAddress)
> # Read Configuration Base Address Register. ArmCBar cannot be called to get
> # the Configuration BAR as a stack is not necessary setup. The SCU is at the
> # offset 0x0000 from the Private Memory Region.
> @@ -48,14 +32,13 @@ ASM_PFX(ArmGetScuBaseAddress):
> //ArmPlatformGetPrimaryCoreMpId (
> // VOID
> // );
> -ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
> - ldr r0, [r0]
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> + MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
> bx lr
>
> # IN None
> # OUT r0 = number of cores present in the system
> -ASM_PFX(ArmGetCpuCountPerCluster):
> +ASM_FUNC(ArmGetCpuCountPerCluster)
> stmfd SP!, {r1-r2}
>
> # Read CP15 MIDR
> @@ -63,10 +46,10 @@ ASM_PFX(ArmGetCpuCountPerCluster):
>
> # Check if the CPU is A15
> mov r1, r1, LSR #4
> - LoadConstantToReg (ARM_CPU_TYPE_MASK, r0)
> + MOV32 (r0, ARM_CPU_TYPE_MASK)
> and r1, r1, r0
>
> - LoadConstantToReg (ARM_CPU_TYPE_A15, r0)
> + MOV32 (r0, ARM_CPU_TYPE_A15)
> cmp r1, r0
> beq _Read_cp15_reg
>
> @@ -92,12 +75,10 @@ _Return:
> //ArmPlatformIsPrimaryCore (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformIsPrimaryCore):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
> - ldr r1, [r1]
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
> and r0, r0, r1
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
> - ldr r1, [r1]
> + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore))
> cmp r0, r1
> moveq r0, #1
> movne r0, #0
> @@ -107,7 +88,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore):
> //ArmPlatformGetCorePosition (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformGetCorePosition):
> +ASM_FUNC(ArmPlatformGetCorePosition)
> and r1, r0, #ARM_CORE_MASK
> and r0, r0, #ARM_CLUSTER_MASK
> add r0, r1, r0, LSR #7
> diff --git a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S
> index c14c986ccfcc..1579c99ce787 100644
> --- a/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S
> +++ b/ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S
> @@ -12,18 +12,9 @@
> //
>
> #include <AsmMacroIoLib.h>
> -#include <Base.h>
> #include <Library/ArmPlatformLib.h>
> #include <Drivers/PL35xSmc.h>
> #include <ArmPlatform.h>
> -#include <AutoGen.h>
> -
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT(ArmPlatformSecBootAction)
> -GCC_ASM_EXPORT(ArmPlatformSecBootMemoryInit)
> -GCC_ASM_IMPORT(PL35xSmcInitialize)
>
> //
> // For each Chip Select: ChipSelect / SetCycle / SetOpMode
> @@ -69,7 +60,7 @@ VersatileExpressSmcConfigurationEnd:
> Note: This function must be implemented in assembler as there is no stack set up yet
>
> **/
> -ASM_PFX(ArmPlatformSecBootAction):
> +ASM_FUNC(ArmPlatformSecBootAction)
> bx lr
>
> /**
> @@ -82,21 +73,21 @@ ASM_PFX(ArmPlatformSecBootAction):
> pointer is not used (probably required to use assembly language)
>
> **/
> -ASM_PFX(ArmPlatformSecBootMemoryInit):
> +ASM_FUNC(ArmPlatformSecBootMemoryInit)
> mov r5, lr
>
> //
> // Initialize PL354 SMC
> //
> - LoadConstantToReg (ARM_VE_SMC_CTRL_BASE, r1)
> - LoadConstantToReg (VersatileExpressSmcConfiguration, r2)
> - LoadConstantToReg (VersatileExpressSmcConfigurationEnd, r3)
> + MOV32 (r1, ARM_VE_SMC_CTRL_BASE)
> + MOV32 (r2, VersatileExpressSmcConfiguration)
> + MOV32 (r3, VersatileExpressSmcConfigurationEnd)
> blx ASM_PFX(PL35xSmcInitialize)
>
> //
> // Page mode setup for VRAM
> //
> - LoadConstantToReg (VRAM_MOTHERBOARD_BASE, r2)
> + MOV32 (r2, VRAM_MOTHERBOARD_BASE)
>
> // Read current state
> ldr r0, [r2, #0]
> @@ -110,7 +101,7 @@ ASM_PFX(ArmPlatformSecBootMemoryInit):
> ldr r0, [r2, #0]
> ldr r0, = 0x00000000
> str r0, [r2, #0]
> - LoadConstantToReg (0x00900090, r0)
> + ldr r0, = 0x00900090
> str r0, [r2, #0]
>
> // Confirm page mode enabled
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 25/26] ArmPlatformPkg/ArmPlatformLibNull: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (23 preceding siblings ...)
2016-08-10 15:18 ` [PATCH 24/26] ArmPlatformPkg/ArmVExpressPkg: " Ard Biesheuvel
@ 2016-08-10 15:18 ` Ard Biesheuvel
2016-08-11 8:39 ` Leif Lindholm
2016-08-10 15:18 ` [PATCH 26/26] ArmPlatformPkg/ArmPlatformStackLib: " Ard Biesheuvel
2016-08-11 10:18 ` [PATCH 00/26] ARM assembler cleanup series Leif Lindholm
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:18 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S | 28 +++++---------------
ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S | 28 +++++---------------
2 files changed, 14 insertions(+), 42 deletions(-)
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S b/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S
index 8c099b469e0e..2f4cf95cbf13 100644
--- a/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S
+++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S
@@ -14,18 +14,7 @@
#include <AsmMacroIoLibV8.h>
#include <Library/ArmLib.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
ret
//UINTN
@@ -33,7 +22,7 @@ ASM_PFX(ArmPlatformPeiBootAction):
// IN UINTN MpId
// );
// With this function: CorePos = (ClusterId * 4) + CoreId
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and x1, x0, #ARM_CORE_MASK
and x0, x0, #ARM_CLUSTER_MASK
add x0, x1, x0, LSR #6
@@ -43,21 +32,18 @@ ASM_PFX(ArmPlatformGetCorePosition):
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
- ldrh w0, [x0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
ret
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
- ldrh w1, [x1]
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and x0, x0, x1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1)
- ldrh w1, [x1]
+ MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
cmp w0, w1
mov x0, #1
mov x1, #0
diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S
index e52ea5afa2cb..bd517e6e16c1 100644
--- a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S
+++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S
@@ -14,25 +14,14 @@
#include <AsmMacroIoLib.h>
#include <Library/ArmLib.h>
-.text
-.align 2
-
-GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
-GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
-GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
-GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
-
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
-GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
-
-ASM_PFX(ArmPlatformPeiBootAction):
+ASM_FUNC(ArmPlatformPeiBootAction)
bx lr
//UINTN
//ArmPlatformGetCorePosition (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformGetCorePosition):
+ASM_FUNC(ArmPlatformGetCorePosition)
and r1, r0, #ARM_CORE_MASK
and r0, r0, #ARM_CLUSTER_MASK
add r0, r1, r0, LSR #7
@@ -42,21 +31,18 @@ ASM_PFX(ArmPlatformGetCorePosition):
//ArmPlatformGetPrimaryCoreMpId (
// VOID
// );
-ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
- ldr r0, [r0]
+ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
+ MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
bx lr
//UINTN
//ArmPlatformIsPrimaryCore (
// IN UINTN MpId
// );
-ASM_PFX(ArmPlatformIsPrimaryCore):
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
- ldr r1, [r1]
+ASM_FUNC(ArmPlatformIsPrimaryCore)
+ MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
and r0, r0, r1
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
- ldr r1, [r1]
+ MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore))
cmp r0, r1
moveq r0, #1
movne r0, #0
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 25/26] ArmPlatformPkg/ArmPlatformLibNull: switch to ASM_FUNC() asm macro
2016-08-10 15:18 ` [PATCH 25/26] ArmPlatformPkg/ArmPlatformLibNull: " Ard Biesheuvel
@ 2016-08-11 8:39 ` Leif Lindholm
0 siblings, 0 replies; 56+ messages in thread
From: Leif Lindholm @ 2016-08-11 8:39 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
On Wed, Aug 10, 2016 at 05:18:01PM +0200, Ard Biesheuvel wrote:
> Annotate functions with ASM_FUNC() so that they are emitted into
> separate sections.
Also replacing LoadConstantToReg. Add that to commit message and:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S | 28 +++++---------------
> ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S | 28 +++++---------------
> 2 files changed, 14 insertions(+), 42 deletions(-)
>
> diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S b/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S
> index 8c099b469e0e..2f4cf95cbf13 100644
> --- a/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S
> +++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S
> @@ -14,18 +14,7 @@
> #include <AsmMacroIoLibV8.h>
> #include <Library/ArmLib.h>
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> -
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
> -
> -ASM_PFX(ArmPlatformPeiBootAction):
> +ASM_FUNC(ArmPlatformPeiBootAction)
> ret
>
> //UINTN
> @@ -33,7 +22,7 @@ ASM_PFX(ArmPlatformPeiBootAction):
> // IN UINTN MpId
> // );
> // With this function: CorePos = (ClusterId * 4) + CoreId
> -ASM_PFX(ArmPlatformGetCorePosition):
> +ASM_FUNC(ArmPlatformGetCorePosition)
> and x1, x0, #ARM_CORE_MASK
> and x0, x0, #ARM_CLUSTER_MASK
> add x0, x1, x0, LSR #6
> @@ -43,21 +32,18 @@ ASM_PFX(ArmPlatformGetCorePosition):
> //ArmPlatformGetPrimaryCoreMpId (
> // VOID
> // );
> -ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
> - ldrh w0, [x0]
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> + MOV32 (w0, FixedPcdGet32 (PcdArmPrimaryCore))
> ret
>
> //UINTN
> //ArmPlatformIsPrimaryCore (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformIsPrimaryCore):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1)
> - ldrh w1, [x1]
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
> and x0, x0, x1
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x1)
> - ldrh w1, [x1]
> + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCore))
> cmp w0, w1
> mov x0, #1
> mov x1, #0
> diff --git a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S
> index e52ea5afa2cb..bd517e6e16c1 100644
> --- a/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S
> +++ b/ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S
> @@ -14,25 +14,14 @@
> #include <AsmMacroIoLib.h>
> #include <Library/ArmLib.h>
>
> -.text
> -.align 2
> -
> -GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
> -GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
> -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
> -
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
> -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
> -
> -ASM_PFX(ArmPlatformPeiBootAction):
> +ASM_FUNC(ArmPlatformPeiBootAction)
> bx lr
>
> //UINTN
> //ArmPlatformGetCorePosition (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformGetCorePosition):
> +ASM_FUNC(ArmPlatformGetCorePosition)
> and r1, r0, #ARM_CORE_MASK
> and r0, r0, #ARM_CLUSTER_MASK
> add r0, r1, r0, LSR #7
> @@ -42,21 +31,18 @@ ASM_PFX(ArmPlatformGetCorePosition):
> //ArmPlatformGetPrimaryCoreMpId (
> // VOID
> // );
> -ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r0)
> - ldr r0, [r0]
> +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
> + MOV32 (r0, FixedPcdGet32 (PcdArmPrimaryCore))
> bx lr
>
> //UINTN
> //ArmPlatformIsPrimaryCore (
> // IN UINTN MpId
> // );
> -ASM_PFX(ArmPlatformIsPrimaryCore):
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, r1)
> - ldr r1, [r1]
> +ASM_FUNC(ArmPlatformIsPrimaryCore)
> + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCoreMask))
> and r0, r0, r1
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, r1)
> - ldr r1, [r1]
> + MOV32 (r1, FixedPcdGet32 (PcdArmPrimaryCore))
> cmp r0, r1
> moveq r0, #1
> movne r0, #0
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 26/26] ArmPlatformPkg/ArmPlatformStackLib: switch to ASM_FUNC() asm macro
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (24 preceding siblings ...)
2016-08-10 15:18 ` [PATCH 25/26] ArmPlatformPkg/ArmPlatformLibNull: " Ard Biesheuvel
@ 2016-08-10 15:18 ` Ard Biesheuvel
2016-08-11 8:42 ` Leif Lindholm
2016-08-11 10:18 ` [PATCH 00/26] ARM assembler cleanup series Leif Lindholm
26 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-10 15:18 UTC (permalink / raw)
To: edk2-devel, leif.lindholm, eugene; +Cc: lersek, Ard Biesheuvel
Annotate functions with ASM_FUNC() so that they are emitted into
separate sections.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
---
ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S | 35 +++++---------------
ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S | 25 +++-----------
2 files changed, 12 insertions(+), 48 deletions(-)
diff --git a/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S b/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S
index 485017f62013..65d7d6c6d686 100644
--- a/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S
+++ b/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S
@@ -12,21 +12,6 @@
//
#include <AsmMacroIoLibV8.h>
-#include <Base.h>
-#include <AutoGen.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformStackSet)
-GCC_ASM_EXPORT(ArmPlatformStackSetPrimary)
-GCC_ASM_EXPORT(ArmPlatformStackSetSecondary)
-
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
-GCC_ASM_IMPORT(ArmPlatformGetPrimaryCoreMpId)
-
-GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)
//VOID
//ArmPlatformStackSet (
@@ -35,7 +20,7 @@ GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)
// IN UINTN PrimaryStackSize,
// IN UINTN SecondaryStackSize
// );
-ASM_PFX(ArmPlatformStackSet):
+ASM_FUNC(ArmPlatformStackSet)
// Save parameters
mov x6, x3
mov x5, x2
@@ -59,10 +44,10 @@ ASM_PFX(ArmPlatformStackSet):
// Restore the Link register
mov x30, x7
- // Should be ASM_PFX(ArmPlatformStackSetPrimary) but generate linker error 'unsupported ELF EM_AARCH64'
- b.eq ArmPlatformStackSetPrimaryL
- // Should be ASM_PFX(ArmPlatformStackSetSecondary) but generate linker error 'unsupported ELF EM_AARCH64'
- b.ne ArmPlatformStackSetSecondaryL
+ b.ne 0f
+
+ b ASM_PFX(ArmPlatformStackSetPrimary)
+0:b ASM_PFX(ArmPlatformStackSetSecondary)
//VOID
//ArmPlatformStackSetPrimary (
@@ -71,8 +56,7 @@ ASM_PFX(ArmPlatformStackSet):
// IN UINTN PrimaryStackSize,
// IN UINTN SecondaryStackSize
// );
-ArmPlatformStackSetPrimaryL:
-ASM_PFX(ArmPlatformStackSetPrimary):
+ASM_FUNC(ArmPlatformStackSetPrimary)
// Save the Link register
mov x4, x30
@@ -80,9 +64,7 @@ ASM_PFX(ArmPlatformStackSetPrimary):
add x0, x0, x2
// Compute SecondaryCoresCount * SecondaryCoreStackSize
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x1)
- ldr w1, [x1]
- sub x1, x1, #1
+ MOV32 (w1, FixedPcdGet32(PcdCoreCount) - 1)
mul x3, x3, x1
// Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))
@@ -97,8 +79,7 @@ ASM_PFX(ArmPlatformStackSetPrimary):
// IN UINTN PrimaryStackSize,
// IN UINTN SecondaryStackSize
// );
-ArmPlatformStackSetSecondaryL:
-ASM_PFX(ArmPlatformStackSetSecondary):
+ASM_FUNC(ArmPlatformStackSetSecondary)
// Save the Link register
mov x4, x30
mov sp, x0
diff --git a/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S b/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S
index 96e925981fca..bdd7a27b7cf9 100644
--- a/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S
+++ b/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S
@@ -12,21 +12,6 @@
//
#include <AsmMacroIoLib.h>
-#include <Base.h>
-#include <AutoGen.h>
-
-.text
-.align 3
-
-GCC_ASM_EXPORT(ArmPlatformStackSet)
-GCC_ASM_EXPORT(ArmPlatformStackSetPrimary)
-GCC_ASM_EXPORT(ArmPlatformStackSetSecondary)
-
-GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
-GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
-GCC_ASM_IMPORT(ArmPlatformGetPrimaryCoreMpId)
-
-GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)
//VOID
//ArmPlatformStackSet (
@@ -35,7 +20,7 @@ GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)
// IN UINTN PrimaryStackSize,
// IN UINTN SecondaryStackSize
// );
-ASM_PFX(ArmPlatformStackSet):
+ASM_FUNC(ArmPlatformStackSet)
// Save parameters
mov r6, r3
mov r5, r2
@@ -69,16 +54,14 @@ ASM_PFX(ArmPlatformStackSet):
// IN UINTN PrimaryStackSize,
// IN UINTN SecondaryStackSize
// );
-ASM_PFX(ArmPlatformStackSetPrimary):
+ASM_FUNC(ArmPlatformStackSetPrimary)
mov r4, lr
// Add stack of primary stack to StackBase
add r0, r0, r2
// Compute SecondaryCoresCount * SecondaryCoreStackSize
- LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)
- ldr r1, [r1]
- sub r1, #1
+ MOV32 (r1, FixedPcdGet32(PcdCoreCount) - 1)
mul r3, r3, r1
// Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))
@@ -93,7 +76,7 @@ ASM_PFX(ArmPlatformStackSetPrimary):
// IN UINTN PrimaryStackSize,
// IN UINTN SecondaryStackSize
// );
-ASM_PFX(ArmPlatformStackSetSecondary):
+ASM_FUNC(ArmPlatformStackSetSecondary)
mov r4, lr
mov sp, r0
--
2.7.4
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 26/26] ArmPlatformPkg/ArmPlatformStackLib: switch to ASM_FUNC() asm macro
2016-08-10 15:18 ` [PATCH 26/26] ArmPlatformPkg/ArmPlatformStackLib: " Ard Biesheuvel
@ 2016-08-11 8:42 ` Leif Lindholm
0 siblings, 0 replies; 56+ messages in thread
From: Leif Lindholm @ 2016-08-11 8:42 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
On Wed, Aug 10, 2016 at 05:18:02PM +0200, Ard Biesheuvel wrote:
> Annotate functions with ASM_FUNC() so that they are emitted into
> separate sections.
>
> Contributed-under: TianoCore Contribution Agreement 1.0
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
> ---
> ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S | 35 +++++---------------
> ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S | 25 +++-----------
> 2 files changed, 12 insertions(+), 48 deletions(-)
>
> diff --git a/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S b/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S
> index 485017f62013..65d7d6c6d686 100644
> --- a/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S
> +++ b/ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S
> @@ -12,21 +12,6 @@
> //
>
> #include <AsmMacroIoLibV8.h>
> -#include <Base.h>
> -#include <AutoGen.h>
> -
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT(ArmPlatformStackSet)
> -GCC_ASM_EXPORT(ArmPlatformStackSetPrimary)
> -GCC_ASM_EXPORT(ArmPlatformStackSetSecondary)
> -
> -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_IMPORT(ArmPlatformGetPrimaryCoreMpId)
> -
> -GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)
>
> //VOID
> //ArmPlatformStackSet (
> @@ -35,7 +20,7 @@ GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)
> // IN UINTN PrimaryStackSize,
> // IN UINTN SecondaryStackSize
> // );
> -ASM_PFX(ArmPlatformStackSet):
> +ASM_FUNC(ArmPlatformStackSet)
> // Save parameters
> mov x6, x3
> mov x5, x2
> @@ -59,10 +44,10 @@ ASM_PFX(ArmPlatformStackSet):
> // Restore the Link register
> mov x30, x7
>
> - // Should be ASM_PFX(ArmPlatformStackSetPrimary) but generate linker error 'unsupported ELF EM_AARCH64'
> - b.eq ArmPlatformStackSetPrimaryL
> - // Should be ASM_PFX(ArmPlatformStackSetSecondary) but generate linker error 'unsupported ELF EM_AARCH64'
Worth mentioning removing this hack as well?
Other than that -
Also replacing LoadConstantToReg. Add that to commit message and:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
> - b.ne ArmPlatformStackSetSecondaryL
> + b.ne 0f
> +
> + b ASM_PFX(ArmPlatformStackSetPrimary)
> +0:b ASM_PFX(ArmPlatformStackSetSecondary)
>
> //VOID
> //ArmPlatformStackSetPrimary (
> @@ -71,8 +56,7 @@ ASM_PFX(ArmPlatformStackSet):
> // IN UINTN PrimaryStackSize,
> // IN UINTN SecondaryStackSize
> // );
> -ArmPlatformStackSetPrimaryL:
> -ASM_PFX(ArmPlatformStackSetPrimary):
> +ASM_FUNC(ArmPlatformStackSetPrimary)
> // Save the Link register
> mov x4, x30
>
> @@ -80,9 +64,7 @@ ASM_PFX(ArmPlatformStackSetPrimary):
> add x0, x0, x2
>
> // Compute SecondaryCoresCount * SecondaryCoreStackSize
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x1)
> - ldr w1, [x1]
> - sub x1, x1, #1
> + MOV32 (w1, FixedPcdGet32(PcdCoreCount) - 1)
> mul x3, x3, x1
>
> // Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))
> @@ -97,8 +79,7 @@ ASM_PFX(ArmPlatformStackSetPrimary):
> // IN UINTN PrimaryStackSize,
> // IN UINTN SecondaryStackSize
> // );
> -ArmPlatformStackSetSecondaryL:
> -ASM_PFX(ArmPlatformStackSetSecondary):
> +ASM_FUNC(ArmPlatformStackSetSecondary)
> // Save the Link register
> mov x4, x30
> mov sp, x0
> diff --git a/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S b/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S
> index 96e925981fca..bdd7a27b7cf9 100644
> --- a/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S
> +++ b/ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S
> @@ -12,21 +12,6 @@
> //
>
> #include <AsmMacroIoLib.h>
> -#include <Base.h>
> -#include <AutoGen.h>
> -
> -.text
> -.align 3
> -
> -GCC_ASM_EXPORT(ArmPlatformStackSet)
> -GCC_ASM_EXPORT(ArmPlatformStackSetPrimary)
> -GCC_ASM_EXPORT(ArmPlatformStackSetSecondary)
> -
> -GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
> -GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
> -GCC_ASM_IMPORT(ArmPlatformGetPrimaryCoreMpId)
> -
> -GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)
>
> //VOID
> //ArmPlatformStackSet (
> @@ -35,7 +20,7 @@ GCC_ASM_IMPORT(gPcd_FixedAtBuild_PcdCoreCount)
> // IN UINTN PrimaryStackSize,
> // IN UINTN SecondaryStackSize
> // );
> -ASM_PFX(ArmPlatformStackSet):
> +ASM_FUNC(ArmPlatformStackSet)
> // Save parameters
> mov r6, r3
> mov r5, r2
> @@ -69,16 +54,14 @@ ASM_PFX(ArmPlatformStackSet):
> // IN UINTN PrimaryStackSize,
> // IN UINTN SecondaryStackSize
> // );
> -ASM_PFX(ArmPlatformStackSetPrimary):
> +ASM_FUNC(ArmPlatformStackSetPrimary)
> mov r4, lr
>
> // Add stack of primary stack to StackBase
> add r0, r0, r2
>
> // Compute SecondaryCoresCount * SecondaryCoreStackSize
> - LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)
> - ldr r1, [r1]
> - sub r1, #1
> + MOV32 (r1, FixedPcdGet32(PcdCoreCount) - 1)
> mul r3, r3, r1
>
> // Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))
> @@ -93,7 +76,7 @@ ASM_PFX(ArmPlatformStackSetPrimary):
> // IN UINTN PrimaryStackSize,
> // IN UINTN SecondaryStackSize
> // );
> -ASM_PFX(ArmPlatformStackSetSecondary):
> +ASM_FUNC(ArmPlatformStackSetSecondary)
> mov r4, lr
> mov sp, r0
>
> --
> 2.7.4
>
> _______________________________________________
> edk2-devel mailing list
> edk2-devel@lists.01.org
> https://lists.01.org/mailman/listinfo/edk2-devel
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 00/26] ARM assembler cleanup series
2016-08-10 15:17 [PATCH 00/26] ARM assembler cleanup series Ard Biesheuvel
` (25 preceding siblings ...)
2016-08-10 15:18 ` [PATCH 26/26] ArmPlatformPkg/ArmPlatformStackLib: " Ard Biesheuvel
@ 2016-08-11 10:18 ` Leif Lindholm
2016-08-11 11:27 ` Ard Biesheuvel
26 siblings, 1 reply; 56+ messages in thread
From: Leif Lindholm @ 2016-08-11 10:18 UTC (permalink / raw)
To: Ard Biesheuvel; +Cc: edk2-devel, eugene, lersek
Nice bit of cleanup, thanks!
For the ones I haven't commented on already:
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
(And for the BeagleBoardPkg as well, unless Andrew objects.)
On Wed, Aug 10, 2016 at 05:17:36PM +0200, Ard Biesheuvel wrote:
> As requested by Eugene, this series introduces a new ASM_FUNC preprocessor
> macro that emits functions into separate sections, allowing the linker to
> get rid of the code that ends up unused in the module.
>
> Note that using a native GNU as macro turned out to be problematic, due
> to our use of Trim, and the fact that not all versions of GNU as honour
> the -I option, making both #include (preprocessor) and .include (GNU as)
> unusable to include files with shared macro definitions.
>
> Since we're making a clean spot, let's introduce some other utility macros
> as well, and clean up the various assembler files to use it. In particular,
> clean up various patterns involving LoadConstantToReg(), including the gem
>
> LoadConstantToReg (_gPcd_FixedAtBuild_xxxx, rN)
> ldr rN, [rN]
>
> which performs two memory reads, including one that is subject to runtime
> relocation, to load a compile time constant into a register. Note that this
> is the definition of LoadConstantReg() we use for Clang, even on AARCH64:
>
> // load _Reg with _Data
> #define LoadConstantToReg(_Data, _Reg) \
> ldr _Reg, 1f ; \
> b 2f ; \
> .align(8) ; \
> 1: \
> .8byte (_Data) ; \
> 2:
>
> Other changes involve constant folding, i.e.,
>
> // Stack for the secondary core = Number of Cores - 1
> - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
> - sub x0, x0, #1
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
> - mul x1, x1, x0
> + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>
> and
>
> - LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)
> - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
> - add r1, r1, r2
> + MOV32 (r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>
> (where r2 is dead after the add)
>
> Code can be found here
> https://git.linaro.org/people/ard.biesheuvel/uefi-next.git/shortlog/refs/heads/arm-asm-cleanup2
>
> Ard Biesheuvel (26):
> ArmLib: remove ArmReplaceLiveTranslationEntry() implementation
> ArmPkg: add missing ArmMmuLib resolution to ArmPkg.dsc
> ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and other asm macros
> ArmPlatformPkg RVCT: drop dependency on GCC macro library
> ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros
> ArmVirt/PrePi: make jump to CEntryPoint relative
> ArmVirtPkg: clean up assembly source files
> ArmPkg/ArmSmcLibNull: move to generic C implementation
> ArmPkg/ArmCpuLib: switch to ASM_FUNC() asm macro
> ArmPkg/ArmGicV3: switch to ASM_FUNC() asm macro
> ArmPkg/ArmHvcLib: switch to ASM_FUNC() asm macro
> ArmPkg/ArmLib: switch to ASM_FUNC() asm macro
> ArmPkg/ArmMmuLib: switch to ASM_FUNC() asm macro
> ArmPkg/ArmSmcLib: switch to ASM_FUNC() asm macro
> ArmPkg/BaseMemoryLibSm: switch to ASM_FUNC() asm macro
> ArmPkg/BaseMemoryLibVstm: switch to ASM_FUNC() asm macro
> ArmPkg/CompilerIntrinsicsLib: switch to ASM_FUNC() asm macro
> ArmPkg/SemihostLib: switch to ASM_FUNC() asm macro
> BeagleBoardPkg: remove unused Sec.inf module
> BeagleBoardPkg: add missing ArmMmuLib resolution
> ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macro
> ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
> ArmPlatformPkg/PrePeiCore: switch to ASM_FUNC() asm macro
> ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macro
> ArmPlatformPkg/ArmPlatformLibNull: switch to ASM_FUNC() asm macro
> ArmPlatformPkg/ArmPlatformStackLib: switch to ASM_FUNC() asm macro
>
> ArmPkg/ArmPkg.dsc | 4 +
> ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S | 9 +-
> ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | 9 +-
> ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S | 28 +-
> ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S | 28 +-
> ArmPkg/Include/AsmMacroIoLib.h | 232 ++--------------
> ArmPkg/Include/AsmMacroIoLib.inc | 54 ----
> ArmPkg/Include/AsmMacroIoLibV8.h | 20 +-
> ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S | 9 +-
> ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S | 10 +-
> ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S | 67 ++---
> ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 181 +++----------
> ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S | 43 +--
> ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S | 47 +---
> ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S | 67 ++---
> ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 113 +++-----
> ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S | 78 ++----
> ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S | 89 ++----
> ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm | 4 +-
> ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 4 +-
> ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S | 7 +-
> ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S | 8 +-
> ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.S | 20 --
> ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.asm | 20 --
> ArmPkg/Library/ArmSmcLibNull/{AArch64/ArmSmcNull.S => ArmSmcLibNull.c} | 42 +--
> ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf | 8 +-
> ArmPkg/Library/BaseMemoryLibStm/Arm/CopyMem.S | 8 +-
> ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.S | 7 +-
> ArmPkg/Library/BaseMemoryLibVstm/Arm/CopyMem.S | 8 +-
> ArmPkg/Library/BaseMemoryLibVstm/Arm/SetMem.S | 9 +-
> ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S | 10 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S | 13 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S | 7 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S | 7 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S | 8 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S | 8 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S | 8 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S | 8 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S | 9 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S | 7 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S | 7 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S | 6 +-
> ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S | 6 +-
> ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S | 7 +-
> ArmPkg/Library/SemihostLib/Arm/GccSemihost.S | 8 +-
> ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S | 37 +--
> ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S | 36 +--
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S | 22 +-
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm | 7 +-
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S | 28 +-
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm | 8 +-
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S | 38 +--
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S | 41 +--
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm | 12 +-
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S | 23 +-
> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm | 5 +-
> ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S | 28 +-
> ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S | 28 +-
> ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm | 10 +-
> ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S | 35 +--
> ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S | 25 +-
> ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm | 4 +-
> ArmPlatformPkg/PrePeiCore/AArch64/Helper.S | 11 +-
> ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 30 +--
> ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S | 9 +-
> ArmPlatformPkg/PrePeiCore/Arm/Exception.asm | 2 -
> ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S | 30 +--
> ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm | 14 +-
> ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S | 9 +-
> ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49 ++--
> ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50 +---
> ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm | 27 +-
> ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S | 36 +--
> ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/ARM/RelocatableVirtHelper.S | 50 ++--
> ArmVirtPkg/Library/ArmVirtPlatformLib/AARCH64/VirtHelper.S | 30 +--
> ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.S | 31 +--
> ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.asm | 10 +-
> ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S | 36 +--
> ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ARM/RelocatableVirtHelper.S | 47 ++--
> ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S | 48 +---
> ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S | 73 ++---
> BeagleBoardPkg/BeagleBoardPkg.dsc | 1 +
> BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S | 85 ------
> BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm | 89 ------
> BeagleBoardPkg/Sec/Cache.c | 79 ------
> BeagleBoardPkg/Sec/Clock.c | 70 -----
> BeagleBoardPkg/Sec/LzmaDecompress.h | 103 -------
> BeagleBoardPkg/Sec/PadConfiguration.c | 282 --------------------
> BeagleBoardPkg/Sec/Sec.c | 186 -------------
> BeagleBoardPkg/Sec/Sec.inf | 73 -----
> 103 files changed, 647 insertions(+), 2730 deletions(-)
> delete mode 100644 ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.S
> delete mode 100644 ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.asm
> rename ArmPkg/Library/ArmSmcLibNull/{AArch64/ArmSmcNull.S => ArmSmcLibNull.c} (73%)
> delete mode 100644 BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S
> delete mode 100644 BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm
> delete mode 100644 BeagleBoardPkg/Sec/Cache.c
> delete mode 100644 BeagleBoardPkg/Sec/Clock.c
> delete mode 100644 BeagleBoardPkg/Sec/LzmaDecompress.h
> delete mode 100644 BeagleBoardPkg/Sec/PadConfiguration.c
> delete mode 100644 BeagleBoardPkg/Sec/Sec.c
> delete mode 100644 BeagleBoardPkg/Sec/Sec.inf
>
> --
> 2.7.4
>
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH 00/26] ARM assembler cleanup series
2016-08-11 10:18 ` [PATCH 00/26] ARM assembler cleanup series Leif Lindholm
@ 2016-08-11 11:27 ` Ard Biesheuvel
2016-08-11 11:31 ` Ard Biesheuvel
0 siblings, 1 reply; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-11 11:27 UTC (permalink / raw)
To: Leif Lindholm; +Cc: edk2-devel-01, Cohen, Eugene, Laszlo Ersek
On 11 August 2016 at 12:18, Leif Lindholm <leif.lindholm@linaro.org> wrote:
> Nice bit of cleanup, thanks!
>
> For the ones I haven't commented on already:
> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>
> (And for the BeagleBoardPkg as well, unless Andrew objects.)
>
Committed as
2b47cdc9364f ArmLib: remove ArmReplaceLiveTranslationEntry() implementation
820d07abadf1 ArmPkg: add missing ArmMmuLib resolution to ArmPkg.dsc
874883a49d0e ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and
other asm macros
66edb631f8a2 ArmPlatformPkg RVCT: drop dependency on GCC macro library
d2d0e27c7668 ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros
16a9fe2ca9cc ArmVirt/PrePi: make jump to CEntryPoint relative
dfc2838892e4 ArmVirtPkg: clean up assembly source files
5e32710023e2 ArmPkg/ArmSmcLibNull: move to generic C implementation
136df8b8b2bb ArmPkg/ArmCpuLib: switch to ASM_FUNC() asm macro
f0883e35dea7 ArmPkg/ArmGicV3: switch to ASM_FUNC() asm macro
de656e666c61 ArmPkg/ArmHvcLib: switch to ASM_FUNC() asm macro
0efaa42f6e06 ArmPkg/ArmLib: switch to ASM_FUNC() asm macro
e4d37ada015f ArmPkg/ArmMmuLib: switch to ASM_FUNC() asm macro
86a4d91bda59 ArmPkg/ArmSmcLib: switch to ASM_FUNC() asm macro
8ca934aab50b ArmPkg/BaseMemoryLibSm: switch to ASM_FUNC() asm macro
7589d9dbcfbf ArmPkg/BaseMemoryLibVstm: switch to ASM_FUNC() asm macro
903e31242d01 ArmPkg/CompilerIntrinsicsLib: switch to ASM_FUNC() asm macro
22b080c78c7a ArmPkg/SemihostLib: switch to ASM_FUNC() asm macro
b8f76eaec25e BeagleBoardPkg: add missing ArmMmuLib resolution
a0f56915a02c ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macro
d2fa09a13487 ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
13dc7fa5a082 ArmPlatformPkg/PrePeiCore: switch to ASM_FUNC() asm macro
04209b53549b ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macro
c17ae4cf8e07 ArmPlatformPkg/ArmPlatformLibNull: switch to ASM_FUNC() asm macro
926059304e83 ArmPlatformPkg/ArmPlatformStackLib: switch to ASM_FUNC() asm macro
(with the comments addressed)
Thanks,
Ard.
> On Wed, Aug 10, 2016 at 05:17:36PM +0200, Ard Biesheuvel wrote:
>> As requested by Eugene, this series introduces a new ASM_FUNC preprocessor
>> macro that emits functions into separate sections, allowing the linker to
>> get rid of the code that ends up unused in the module.
>>
>> Note that using a native GNU as macro turned out to be problematic, due
>> to our use of Trim, and the fact that not all versions of GNU as honour
>> the -I option, making both #include (preprocessor) and .include (GNU as)
>> unusable to include files with shared macro definitions.
>>
>> Since we're making a clean spot, let's introduce some other utility macros
>> as well, and clean up the various assembler files to use it. In particular,
>> clean up various patterns involving LoadConstantToReg(), including the gem
>>
>> LoadConstantToReg (_gPcd_FixedAtBuild_xxxx, rN)
>> ldr rN, [rN]
>>
>> which performs two memory reads, including one that is subject to runtime
>> relocation, to load a compile time constant into a register. Note that this
>> is the definition of LoadConstantReg() we use for Clang, even on AARCH64:
>>
>> // load _Reg with _Data
>> #define LoadConstantToReg(_Data, _Reg) \
>> ldr _Reg, 1f ; \
>> b 2f ; \
>> .align(8) ; \
>> 1: \
>> .8byte (_Data) ; \
>> 2:
>>
>> Other changes involve constant folding, i.e.,
>>
>> // Stack for the secondary core = Number of Cores - 1
>> - LoadConstantToReg (FixedPcdGet32(PcdCoreCount), x0)
>> - sub x0, x0, #1
>> - LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x1)
>> - mul x1, x1, x0
>> + MOV32 (x1, (FixedPcdGet32(PcdCoreCount) - 1) * FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
>>
>> and
>>
>> - LoadConstantToReg (FixedPcdGet64(PcdCPUCoresStackBase), r1)
>> - LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
>> - add r1, r1, r2
>> + MOV32 (r1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
>>
>> (where r2 is dead after the add)
>>
>> Code can be found here
>> https://git.linaro.org/people/ard.biesheuvel/uefi-next.git/shortlog/refs/heads/arm-asm-cleanup2
>>
>> Ard Biesheuvel (26):
>> ArmLib: remove ArmReplaceLiveTranslationEntry() implementation
>> ArmPkg: add missing ArmMmuLib resolution to ArmPkg.dsc
>> ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and other asm macros
>> ArmPlatformPkg RVCT: drop dependency on GCC macro library
>> ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros
>> ArmVirt/PrePi: make jump to CEntryPoint relative
>> ArmVirtPkg: clean up assembly source files
>> ArmPkg/ArmSmcLibNull: move to generic C implementation
>> ArmPkg/ArmCpuLib: switch to ASM_FUNC() asm macro
>> ArmPkg/ArmGicV3: switch to ASM_FUNC() asm macro
>> ArmPkg/ArmHvcLib: switch to ASM_FUNC() asm macro
>> ArmPkg/ArmLib: switch to ASM_FUNC() asm macro
>> ArmPkg/ArmMmuLib: switch to ASM_FUNC() asm macro
>> ArmPkg/ArmSmcLib: switch to ASM_FUNC() asm macro
>> ArmPkg/BaseMemoryLibSm: switch to ASM_FUNC() asm macro
>> ArmPkg/BaseMemoryLibVstm: switch to ASM_FUNC() asm macro
>> ArmPkg/CompilerIntrinsicsLib: switch to ASM_FUNC() asm macro
>> ArmPkg/SemihostLib: switch to ASM_FUNC() asm macro
>> BeagleBoardPkg: remove unused Sec.inf module
>> BeagleBoardPkg: add missing ArmMmuLib resolution
>> ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macro
>> ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
>> ArmPlatformPkg/PrePeiCore: switch to ASM_FUNC() asm macro
>> ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macro
>> ArmPlatformPkg/ArmPlatformLibNull: switch to ASM_FUNC() asm macro
>> ArmPlatformPkg/ArmPlatformStackLib: switch to ASM_FUNC() asm macro
>>
>> ArmPkg/ArmPkg.dsc | 4 +
>> ArmPkg/Drivers/ArmCpuLib/ArmCortexA5xLib/AArch64/ArmCortexA5xHelper.S | 9 +-
>> ArmPkg/Drivers/ArmCpuLib/ArmCortexA9Lib/ArmCortexA9Helper.S | 9 +-
>> ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S | 28 +-
>> ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S | 28 +-
>> ArmPkg/Include/AsmMacroIoLib.h | 232 ++--------------
>> ArmPkg/Include/AsmMacroIoLib.inc | 54 ----
>> ArmPkg/Include/AsmMacroIoLibV8.h | 20 +-
>> ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S | 9 +-
>> ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S | 10 +-
>> ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S | 67 ++---
>> ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 181 +++----------
>> ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S | 43 +--
>> ArmPkg/Library/ArmLib/ArmV7/ArmLibSupportV7.S | 47 +---
>> ArmPkg/Library/ArmLib/ArmV7/ArmV7ArchTimerSupport.S | 67 ++---
>> ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 113 +++-----
>> ArmPkg/Library/ArmLib/Common/AArch64/ArmLibSupport.S | 78 ++----
>> ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.S | 89 ++----
>> ArmPkg/Library/ArmLib/Common/Arm/ArmLibSupport.asm | 4 +-
>> ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 4 +-
>> ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S | 7 +-
>> ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S | 8 +-
>> ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.S | 20 --
>> ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.asm | 20 --
>> ArmPkg/Library/ArmSmcLibNull/{AArch64/ArmSmcNull.S => ArmSmcLibNull.c} | 42 +--
>> ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf | 8 +-
>> ArmPkg/Library/BaseMemoryLibStm/Arm/CopyMem.S | 8 +-
>> ArmPkg/Library/BaseMemoryLibStm/Arm/SetMem.S | 7 +-
>> ArmPkg/Library/BaseMemoryLibVstm/Arm/CopyMem.S | 8 +-
>> ArmPkg/Library/BaseMemoryLibVstm/Arm/SetMem.S | 9 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/AArch64/memcpy.S | 10 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S | 13 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S | 7 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S | 7 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S | 8 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S | 8 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S | 8 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S | 8 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S | 9 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S | 7 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S | 7 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S | 6 +-
>> ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S | 6 +-
>> ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S | 7 +-
>> ArmPkg/Library/SemihostLib/Arm/GccSemihost.S | 8 +-
>> ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/AArch64/ArmJunoHelper.S | 37 +--
>> ArmPlatformPkg/ArmJunoPkg/Library/ArmJunoLib/Arm/ArmJunoHelper.S | 36 +--
>> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.S | 22 +-
>> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA15-A7/CTA15-A7Helper.asm | 7 +-
>> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.S | 28 +-
>> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibCTA9x4/CTA9x4Helper.asm | 8 +-
>> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/AArch64/RTSMHelper.S | 38 +--
>> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.S | 41 +--
>> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/Arm/RTSMHelper.asm | 12 +-
>> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.S | 23 +-
>> ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressSecLibCTA9x4/CTA9x4Boot.asm | 5 +-
>> ArmPlatformPkg/Library/ArmPlatformLibNull/AArch64/ArmPlatformHelper.S | 28 +-
>> ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.S | 28 +-
>> ArmPlatformPkg/Library/ArmPlatformLibNull/Arm/ArmPlatformHelper.asm | 10 +-
>> ArmPlatformPkg/Library/ArmPlatformStackLib/AArch64/ArmPlatformStackLib.S | 35 +--
>> ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.S | 25 +-
>> ArmPlatformPkg/Library/ArmPlatformStackLib/Arm/ArmPlatformStackLib.asm | 4 +-
>> ArmPlatformPkg/PrePeiCore/AArch64/Helper.S | 11 +-
>> ArmPlatformPkg/PrePeiCore/AArch64/PrePeiCoreEntryPoint.S | 30 +--
>> ArmPlatformPkg/PrePeiCore/AArch64/SwitchStack.S | 9 +-
>> ArmPlatformPkg/PrePeiCore/Arm/Exception.asm | 2 -
>> ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.S | 30 +--
>> ArmPlatformPkg/PrePeiCore/Arm/PrePeiCoreEntryPoint.asm | 14 +-
>> ArmPlatformPkg/PrePeiCore/Arm/SwitchStack.S | 9 +-
>> ArmPlatformPkg/PrePi/AArch64/ModuleEntryPoint.S | 49 ++--
>> ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.S | 50 +---
>> ArmPlatformPkg/PrePi/Arm/ModuleEntryPoint.asm | 27 +-
>> ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S | 36 +--
>> ArmVirtPkg/Library/ArmQemuRelocatablePlatformLib/ARM/RelocatableVirtHelper.S | 50 ++--
>> ArmVirtPkg/Library/ArmVirtPlatformLib/AARCH64/VirtHelper.S | 30 +--
>> ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.S | 31 +--
>> ArmVirtPkg/Library/ArmVirtPlatformLib/ARM/VirtHelper.asm | 10 +-
>> ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S | 36 +--
>> ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/ARM/RelocatableVirtHelper.S | 47 ++--
>> ArmVirtPkg/PrePi/AArch64/ModuleEntryPoint.S | 48 +---
>> ArmVirtPkg/PrePi/Arm/ModuleEntryPoint.S | 73 ++---
>> BeagleBoardPkg/BeagleBoardPkg.dsc | 1 +
>> BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S | 85 ------
>> BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm | 89 ------
>> BeagleBoardPkg/Sec/Cache.c | 79 ------
>> BeagleBoardPkg/Sec/Clock.c | 70 -----
>> BeagleBoardPkg/Sec/LzmaDecompress.h | 103 -------
>> BeagleBoardPkg/Sec/PadConfiguration.c | 282 --------------------
>> BeagleBoardPkg/Sec/Sec.c | 186 -------------
>> BeagleBoardPkg/Sec/Sec.inf | 73 -----
>> 103 files changed, 647 insertions(+), 2730 deletions(-)
>> delete mode 100644 ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.S
>> delete mode 100644 ArmPkg/Library/ArmSmcLibNull/Arm/ArmSmcNull.asm
>> rename ArmPkg/Library/ArmSmcLibNull/{AArch64/ArmSmcNull.S => ArmSmcLibNull.c} (73%)
>> delete mode 100644 BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.S
>> delete mode 100644 BeagleBoardPkg/Sec/Arm/ModuleEntryPoint.asm
>> delete mode 100644 BeagleBoardPkg/Sec/Cache.c
>> delete mode 100644 BeagleBoardPkg/Sec/Clock.c
>> delete mode 100644 BeagleBoardPkg/Sec/LzmaDecompress.h
>> delete mode 100644 BeagleBoardPkg/Sec/PadConfiguration.c
>> delete mode 100644 BeagleBoardPkg/Sec/Sec.c
>> delete mode 100644 BeagleBoardPkg/Sec/Sec.inf
>>
>> --
>> 2.7.4
>>
^ permalink raw reply [flat|nested] 56+ messages in thread* Re: [PATCH 00/26] ARM assembler cleanup series
2016-08-11 11:27 ` Ard Biesheuvel
@ 2016-08-11 11:31 ` Ard Biesheuvel
0 siblings, 0 replies; 56+ messages in thread
From: Ard Biesheuvel @ 2016-08-11 11:31 UTC (permalink / raw)
To: Leif Lindholm; +Cc: edk2-devel-01, Cohen, Eugene, Laszlo Ersek
On 11 August 2016 at 13:27, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:
> On 11 August 2016 at 12:18, Leif Lindholm <leif.lindholm@linaro.org> wrote:
>> Nice bit of cleanup, thanks!
>>
>> For the ones I haven't commented on already:
>> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
>>
>> (And for the BeagleBoardPkg as well, unless Andrew objects.)
>>
>
> Committed as
>
> 2b47cdc9364f ArmLib: remove ArmReplaceLiveTranslationEntry() implementation
> 820d07abadf1 ArmPkg: add missing ArmMmuLib resolution to ArmPkg.dsc
> 874883a49d0e ArmPkg/AsmMacroIoLib: remove unused obsolete MMIO and
> other asm macros
> 66edb631f8a2 ArmPlatformPkg RVCT: drop dependency on GCC macro library
> d2d0e27c7668 ArmPkg: introduce ASM_FUNC, MOV32/MOV64 and ADRL/LDRL macros
> 16a9fe2ca9cc ArmVirt/PrePi: make jump to CEntryPoint relative
> dfc2838892e4 ArmVirtPkg: clean up assembly source files
> 5e32710023e2 ArmPkg/ArmSmcLibNull: move to generic C implementation
> 136df8b8b2bb ArmPkg/ArmCpuLib: switch to ASM_FUNC() asm macro
> f0883e35dea7 ArmPkg/ArmGicV3: switch to ASM_FUNC() asm macro
> de656e666c61 ArmPkg/ArmHvcLib: switch to ASM_FUNC() asm macro
> 0efaa42f6e06 ArmPkg/ArmLib: switch to ASM_FUNC() asm macro
> e4d37ada015f ArmPkg/ArmMmuLib: switch to ASM_FUNC() asm macro
> 86a4d91bda59 ArmPkg/ArmSmcLib: switch to ASM_FUNC() asm macro
> 8ca934aab50b ArmPkg/BaseMemoryLibSm: switch to ASM_FUNC() asm macro
> 7589d9dbcfbf ArmPkg/BaseMemoryLibVstm: switch to ASM_FUNC() asm macro
> 903e31242d01 ArmPkg/CompilerIntrinsicsLib: switch to ASM_FUNC() asm macro
> 22b080c78c7a ArmPkg/SemihostLib: switch to ASM_FUNC() asm macro
> b8f76eaec25e BeagleBoardPkg: add missing ArmMmuLib resolution
> a0f56915a02c ArmPlatformPkg/ArmJunoLib: switch to ASM_FUNC() asm macro
> d2fa09a13487 ArmPlatformPkg/PrePi: switch to ASM_FUNC() asm macro
> 13dc7fa5a082 ArmPlatformPkg/PrePeiCore: switch to ASM_FUNC() asm macro
> 04209b53549b ArmPlatformPkg/ArmVExpressPkg: switch to ASM_FUNC() asm macro
> c17ae4cf8e07 ArmPlatformPkg/ArmPlatformLibNull: switch to ASM_FUNC() asm macro
> 926059304e83 ArmPlatformPkg/ArmPlatformStackLib: switch to ASM_FUNC() asm macro
>
> (with the comments addressed)
>
> Thanks,
> Ard.
>
Oh, and in case anyone is curious:
ArmVirtQemu / RELEASE_GCC5
before
FVMAIN_COMPACT [34%Full] 2093056 total, 723448 used, 1369608 free
FVMAIN [99%Full] 3670400 total, 3670376 used, 24 free
after
FVMAIN_COMPACT [33%Full] 2093056 total, 709376 used, 1383680 free
FVMAIN [99%Full] 3652736 total, 3652680 used, 56 free
^ permalink raw reply [flat|nested] 56+ messages in thread