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[81.37.107.46]) by smtp.gmail.com with ESMTPSA id p83sm2402873wma.18.2016.08.11.03.09.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 11 Aug 2016 03:09:01 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org, leif.lindholm@linaro.org Cc: Ard Biesheuvel Date: Thu, 11 Aug 2016 12:08:19 +0200 Message-Id: <1470910101-20322-5-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1470910101-20322-1-git-send-email-ard.biesheuvel@linaro.org> References: <1470910101-20322-1-git-send-email-ard.biesheuvel@linaro.org> Subject: [PATCH 4/6] Platforms/Styx: switch to ASM_FUNC() asm macro X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 11 Aug 2016 10:09:04 -0000 Annotate functions with ASM_FUNC() so that they are emitted into separate sections. While we're at it, clean up some inefficient uses of LoadConstantToReg() and other indirect absolute references (which require runtime relocation). Since this requires fixed PCDs to be declared as such in the module .inf, update those as well. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/AMD/Styx/Library/AmdStyxLib/AArch64/Helper.S | 58 ++++++-------------- Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf | 7 ++- Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf | 1 + 3 files changed, 21 insertions(+), 45 deletions(-) diff --git a/Platforms/AMD/Styx/Library/AmdStyxLib/AArch64/Helper.S b/Platforms/AMD/Styx/Library/AmdStyxLib/AArch64/Helper.S index 0f9822a86989..a3ac60282706 100644 --- a/Platforms/AMD/Styx/Library/AmdStyxLib/AArch64/Helper.S +++ b/Platforms/AMD/Styx/Library/AmdStyxLib/AArch64/Helper.S @@ -17,25 +17,8 @@ # ArmPlatformPkg/ArmVExpressPkg/Library/ArmVExpressLibRTSM/RTSMHelper.S # #**/ - #include -#include #include -#include -#include - -.text -.align 2 - -GCC_ASM_EXPORT(ArmPlatformPeiBootAction) -GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore) -GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId) -GCC_ASM_EXPORT(ArmPlatformGetCorePosition) -GCC_ASM_EXPORT(ArmGetCpuCountPerCluster) - -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore) -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask) -GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount) PrimaryCoreMpid: .word 0x0 PrimaryCoreBoot: .word 0x0 @@ -44,18 +27,15 @@ PrimaryCoreBoot: .word 0x0 //ArmPlatformPeiBootAction ( // VOID // ); -ASM_PFX(ArmPlatformPeiBootAction): +ASM_FUNC(ArmPlatformPeiBootAction) + ldr w0, PrimaryCoreBoot + cbnz w0, 1f + // Save the primary CPU MPID - ldr x1, =PrimaryCoreBoot - ldrh w0, [x1] - cmp wzr, w0 - b.ne 1f mrs x0, mpidr_el1 - ldr x1, =PrimaryCoreMpid - str w0, [x1] - mov w0, 1 - ldr x1, =PrimaryCoreBoot - str w0, [x1] + adr x2, PrimaryCoreMpid + mov w1, #1 + stp w0, w1, [x2] 1: ret @@ -63,34 +43,28 @@ ASM_PFX(ArmPlatformPeiBootAction): //ArmPlatformGetPrimaryCoreMpId ( // VOID // ); -ASM_PFX(ArmPlatformGetPrimaryCoreMpId): - ldr x0, =PrimaryCoreMpid - ldrh w0, [x0] +ASM_FUNC(ArmPlatformGetPrimaryCoreMpId) + ldr w0, PrimaryCoreMpid ret # IN None # OUT x0 = number of cores present in the system -ASM_PFX(ArmGetCpuCountPerCluster): - LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, x0) - ldrh w0, [x0] +ASM_FUNC(ArmGetCpuCountPerCluster) + MOV32 (w0, FixedPcdGet32 (PcdCoreCount)) ret //UINTN //ArmPlatformIsPrimaryCore ( // IN UINTN MpId // ); -ASM_PFX(ArmPlatformIsPrimaryCore): - LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask, x1) - ldrh w1, [x1] +ASM_FUNC(ArmPlatformIsPrimaryCore) + MOV32 (w1, FixedPcdGet32 (PcdArmPrimaryCoreMask)) and x0, x0, x1 - ldr x1, =PrimaryCoreMpid - ldrh w1, [x1] + ldr w1, PrimaryCoreMpid cmp w0, w1 - mov x0, #1 - mov x1, #0 - csel x0, x0, x1, eq + cset x0, eq ret //UINTN @@ -98,7 +72,7 @@ ASM_PFX(ArmPlatformIsPrimaryCore): // IN UINTN MpId // ); // With this function: CorePos = (ClusterId * 2) + CoreId -ASM_PFX(ArmPlatformGetCorePosition): +ASM_FUNC(ArmPlatformGetCorePosition) and x1, x0, #ARM_CORE_MASK and x0, x0, #ARM_CLUSTER_MASK add x0, x1, x0, LSR #7 diff --git a/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf b/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf index c6e42e4482fe..4a6469ee016c 100644 --- a/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf +++ b/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLib.inf @@ -63,14 +63,15 @@ gArmTokenSpaceGuid.PcdFvBaseAddress gArmTokenSpaceGuid.PcdFdBaseAddress + gAmdStyxTokenSpaceGuid.PcdTrustedFWMemoryBase + gAmdStyxTokenSpaceGuid.PcdTrustedFWMemorySize + +[FixedPcd] gArmTokenSpaceGuid.PcdArmPrimaryCoreMask gArmTokenSpaceGuid.PcdArmPrimaryCore gArmPlatformTokenSpaceGuid.PcdCoreCount gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase - gAmdStyxTokenSpaceGuid.PcdTrustedFWMemoryBase - gAmdStyxTokenSpaceGuid.PcdTrustedFWMemorySize - [Depex] gAmdStyxPlatInitPpiGuid diff --git a/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf b/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf index fefd3ee6999b..0b9b6287168d 100644 --- a/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf +++ b/Platforms/AMD/Styx/Library/AmdStyxLib/AmdStyxLibSec.inf @@ -61,6 +61,7 @@ gArmTokenSpaceGuid.PcdSystemMemorySize gArmTokenSpaceGuid.PcdFvBaseAddress +[FixedPcd] gArmTokenSpaceGuid.PcdArmPrimaryCoreMask gArmTokenSpaceGuid.PcdArmPrimaryCore -- 2.7.4