[PATCH] BaseTools/Source/C/GenFv/GenFvInternalLib.c

[Leo Duran <leo.duran@amd.com>]

We have a situation where an x86 processor does not start fetching code
at the traditional hardware reset vector address 0xFFFFFFF0.
The implication is that the hidden base address part of the CS register
is initialized with a value different than the traditional 0xFFFF0000.

In our case:
CS = 0xF000 (as expected)
EIP = 0xFFF0 (as expected)
CSLIMIT = 0xFFFF (as expected)
CSBASE = 0x####0000 (where #### is not the traditional 0xFFFF)

Thus in our case execution starts at: CSBASE+EIP = 0x####FFF0.

To account for this behavior, we define an FDF address override
to force a rebase of the FV section containing the VTF file.
For example, last FV section defined as:
[FV.FvSecPei]
FvBaseAddress = $(FV_BOOT_BASE)
FvForceRebase = TRUE

However, when the GenFv tool parses that section it is unware
of the possible rebasing, and assumes the section ends at the
traditional 4G-byte boundary. This patch solves this by simply
adding a check for a possible rebase scenario.

Leo Duran (1):
  BaseTools/Source/C/GenFv/GenFvInternalLib.c

 BaseTools/Source/C/GenFv/GenFvInternalLib.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

-- 
1.9.1