* [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment
@ 2016-08-19 7:35 Star Zeng
2016-08-19 7:35 ` [PATCH 1/6] MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces Star Zeng
` (7 more replies)
0 siblings, 8 replies; 15+ messages in thread
From: Star Zeng @ 2016-08-19 7:35 UTC (permalink / raw)
To: edk2-devel
Cc: Star Zeng, Jiewen Yao, Michael D Kinney, Chan Amy, Laszlo Ersek,
Kelly Steele, David Wei, Chao Zhang
Support multiple PCI segment for PCI_CONFIG2 opcodes.
PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib
instead of PciLib. That means platforms need to add PciSegmentLib
declaration like below in platform dsc if the PciSegmentLib was
not declared in platform dsc before.
PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
For platforms only have one segment,
MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended
to be used and declared in platform dsc for PiDxeS3BootScriptLib to have
equivalent functionality with before.
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Chan Amy <chan.amy@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Kelly Steele <kelly.steele@intel.com>
Cc: David Wei <david.wei@intel.com>
Cc: Chao Zhang <chao.b.zhang@intel.com>
Star Zeng (6):
MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces
MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment
Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc
QuarkPlatformPkg: Declare PciSegmentLib in platform dsc
QuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib
SecurityPkg/SecurityPkg.dsc: Declare PciSegmentLib
.../PiDxeS3BootScriptLib/BootScriptExecute.c | 411 +++++++++----------
.../BootScriptInternalFormat.h | 2 +-
.../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 451 ++++++++++-----------
.../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 4 +-
.../PiDxeS3BootScriptLib/DxeS3BootScriptLib.uni | 2 +-
.../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 26 +-
QuarkPlatformPkg/Quark.dsc | 1 +
QuarkPlatformPkg/QuarkMin.dsc | 1 +
QuarkSocPkg/QuarkSocPkg.dsc | 1 +
SecurityPkg/SecurityPkg.dsc | 1 +
Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 1 +
Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 1 +
Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 1 +
13 files changed, 450 insertions(+), 453 deletions(-)
--
2.7.0.windows.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH 1/6] MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces 2016-08-19 7:35 [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng @ 2016-08-19 7:35 ` Star Zeng 2016-08-19 7:35 ` [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng ` (6 subsequent siblings) 7 siblings, 0 replies; 15+ messages in thread From: Star Zeng @ 2016-08-19 7:35 UTC (permalink / raw) To: edk2-devel; +Cc: Star Zeng, Jiewen Yao, Michael D Kinney, Chan Amy Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Chan Amy <chan.amy@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> --- .../PiDxeS3BootScriptLib/BootScriptExecute.c | 288 +++++++------- .../BootScriptInternalFormat.h | 2 +- .../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 436 ++++++++++----------- .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 2 +- .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.uni | 2 +- .../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 10 +- 6 files changed, 370 insertions(+), 370 deletions(-) diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c index 45dd581b085d..9e63273bc19c 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c @@ -1,5 +1,5 @@ /** @file - Interpret and execute the S3 data in S3 boot script. + Interpret and execute the S3 data in S3 boot script. Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> @@ -23,7 +23,7 @@ Management Bus (SMBus) Specification. The resulting transaction will be either that the SMBus slave devices accept this transaction or that this function returns with error. - @param SmbusAddress Address that encodes the SMBUS Slave Address, SMBUS Command, SMBUS Data Length, + @param SmbusAddress Address that encodes the SMBUS Slave Address, SMBUS Command, SMBUS Data Length, and PEC. @param Operation Signifies which particular SMBus hardware protocol instance that it will use to execute the SMBus transactions. This SMBus @@ -120,7 +120,7 @@ SmbusExecute ( return EFI_INVALID_PARAMETER; } - return Status; + return Status; } /** @@ -130,7 +130,7 @@ SmbusExecute ( @param Width Width of the operation. @param Address Address of the operation. @param AddressStride Instride for stepping input buffer. - @param BufferStride Outstride for stepping output buffer. + @param BufferStride Outstride for stepping output buffer. @retval EFI_SUCCESS Successful translation. @retval EFI_INVALID_PARAMETER Width or Address is invalid. @@ -170,18 +170,18 @@ BuildLoopData ( /** Perform IO read operation - + @param[in] Width Width of the operation. @param[in] Address Address of the operation. @param[in] Count Count of the number of accesses to perform. - @param[out] Buffer Pointer to the buffer to read from I/O space. + @param[out] Buffer Pointer to the buffer to read from I/O space. @retval EFI_SUCCESS The data was written to the EFI System. @retval EFI_INVALID_PARAMETER Width is invalid for this EFI System. Buffer is NULL. The Buffer is not aligned for the given Width. - Address is outside the legal range of I/O ports. - + Address is outside the legal range of I/O ports. + **/ EFI_STATUS ScriptIoRead ( @@ -274,18 +274,18 @@ ScriptIoRead ( /** Perform IO write operation - + @param[in] Width Width of the operation. @param[in] Address Address of the operation. @param[in] Count Count of the number of accesses to perform. - @param[in] Buffer Pointer to the buffer to write to I/O space. + @param[in] Buffer Pointer to the buffer to write to I/O space. @retval EFI_SUCCESS The data was written to the EFI System. @retval EFI_INVALID_PARAMETER Width is invalid for this EFI System. Buffer is NULL. The Buffer is not aligned for the given Width. - Address is outside the legal range of I/O ports. - + Address is outside the legal range of I/O ports. + **/ EFI_STATUS ScriptIoWrite ( @@ -322,11 +322,11 @@ ScriptIoWrite ( case S3BootScriptWidthUint8: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x (0x%02x)\n", (UINTN)Address, (UINTN)*In.Uint8)); IoWrite8 ((UINTN) Address, *In.Uint8); - break; + break; case S3BootScriptWidthFifoUint8: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x (0x%02x)\n", (UINTN)OriginalAddress, (UINTN)*In.Uint8)); IoWrite8 ((UINTN) OriginalAddress, *In.Uint8); - break; + break; case S3BootScriptWidthFillUint8: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x (0x%02x)\n", (UINTN)Address, (UINTN)*OriginalIn.Uint8)); IoWrite8 ((UINTN) Address, *OriginalIn.Uint8); @@ -334,11 +334,11 @@ ScriptIoWrite ( case S3BootScriptWidthUint16: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x (0x%04x)\n", (UINTN)Address, (UINTN)*In.Uint16)); IoWrite16 ((UINTN) Address, *In.Uint16); - break; + break; case S3BootScriptWidthFifoUint16: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x (0x%04x)\n", (UINTN)OriginalAddress, (UINTN)*In.Uint16)); IoWrite16 ((UINTN) OriginalAddress, *In.Uint16); - break; + break; case S3BootScriptWidthFillUint16: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x (0x%04x)\n", (UINTN)Address, (UINTN)*OriginalIn.Uint16)); IoWrite16 ((UINTN) Address, *OriginalIn.Uint16); @@ -346,7 +346,7 @@ ScriptIoWrite ( case S3BootScriptWidthUint32: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x (0x%08x)\n", (UINTN)Address, (UINTN)*In.Uint32)); IoWrite32 ((UINTN) Address, *In.Uint32); - break; + break; case S3BootScriptWidthFifoUint32: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x (0x%08x)\n", (UINTN)OriginalAddress, (UINTN)*In.Uint32)); IoWrite32 ((UINTN) OriginalAddress, *In.Uint32); @@ -358,11 +358,11 @@ ScriptIoWrite ( case S3BootScriptWidthUint64: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint64 - 0x%08x (0x%016lx)\n", (UINTN)Address, *In.Uint64)); IoWrite64 ((UINTN) Address, *In.Uint64); - break; + break; case S3BootScriptWidthFifoUint64: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint64 - 0x%08x (0x%016lx)\n", (UINTN)OriginalAddress, *In.Uint64)); IoWrite64 ((UINTN) OriginalAddress, *In.Uint64); - break; + break; case S3BootScriptWidthFillUint64: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint64 - 0x%08x (0x%016lx)\n", (UINTN)Address, *OriginalIn.Uint64)); IoWrite64 ((UINTN) Address, *OriginalIn.Uint64); @@ -371,25 +371,25 @@ ScriptIoWrite ( return EFI_INVALID_PARAMETER; } } - + return EFI_SUCCESS; } /** Interprete the boot script node with EFI_BOOT_SCRIPT_IO_WRITE OP code. - + @param Script Pointer to the node which is to be interpreted. @retval EFI_SUCCESS The data was written to the EFI System. @retval EFI_INVALID_PARAMETER Width is invalid for this EFI System. Buffer is NULL. The Buffer is not aligned for the given Width. - Address is outside the legal range of I/O ports. - + Address is outside the legal range of I/O ports. + **/ EFI_STATUS BootScriptExecuteIoWrite ( - IN UINT8 *Script + IN UINT8 *Script ) { S3_BOOT_SCRIPT_LIB_WIDTH Width; @@ -397,7 +397,7 @@ BootScriptExecuteIoWrite ( UINTN Count; VOID *Buffer; EFI_BOOT_SCRIPT_IO_WRITE IoWrite; - + CopyMem ((VOID*)&IoWrite, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_IO_WRITE)); Width = (S3_BOOT_SCRIPT_LIB_WIDTH) IoWrite.Width; Address = IoWrite.Address; @@ -409,19 +409,19 @@ BootScriptExecuteIoWrite ( } /** Perform memory read operation - + @param Width Width of the operation. @param Address Address of the operation. @param Count Count of the number of accesses to perform. - @param Buffer Pointer to the buffer read from memory. + @param Buffer Pointer to the buffer read from memory. @retval EFI_SUCCESS The data was written to the EFI System. @retval EFI_INVALID_PARAMETER Width is invalid for this EFI System. Buffer is NULL. The Buffer is not aligned for the given Width. - @retval EFI_UNSUPPORTED The address range specified by Address, Width, and Count - is not valid for this EFI System. - + @retval EFI_UNSUPPORTED The address range specified by Address, Width, and Count + is not valid for this EFI System. + **/ EFI_STATUS ScriptMemoryRead ( @@ -508,19 +508,19 @@ ScriptMemoryRead ( } /** Perform memory write operation - + @param Width Width of the operation. @param Address Address of the operation. @param Count Count of the number of accesses to perform. - @param Buffer Pointer to the buffer write to memory. + @param Buffer Pointer to the buffer write to memory. @retval EFI_SUCCESS The data was written to the EFI System. @retval EFI_INVALID_PARAMETER Width is invalid for this EFI System. Buffer is NULL. The Buffer is not aligned for the given Width. - @retval EFI_UNSUPPORTED The address range specified by Address, Width, and Count - is not valid for this EFI System. - + @retval EFI_UNSUPPORTED The address range specified by Address, Width, and Count + is not valid for this EFI System. + **/ EFI_STATUS ScriptMemoryWrite ( @@ -532,7 +532,7 @@ ScriptMemoryWrite ( { EFI_STATUS Status; UINTN AddressStride; - UINT64 OriginalAddress; + UINT64 OriginalAddress; UINTN BufferStride; PTR In; PTR OriginalIn; @@ -547,17 +547,17 @@ ScriptMemoryWrite ( // Loop for each iteration and move the data // OriginalAddress = Address; - OriginalIn.Buf = In.Buf; + OriginalIn.Buf = In.Buf; for (; Count > 0; Count--, Address += AddressStride, In.Buf += BufferStride) { switch (Width) { case S3BootScriptWidthUint8: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x (0x%02x)\n", (UINTN)Address, (UINTN)*In.Uint8)); MmioWrite8 ((UINTN) Address, *In.Uint8); - break; + break; case S3BootScriptWidthFifoUint8: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x (0x%02x)\n", (UINTN)OriginalAddress, (UINTN)*In.Uint8)); MmioWrite8 ((UINTN) OriginalAddress, *In.Uint8); - break; + break; case S3BootScriptWidthFillUint8: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x (0x%02x)\n", (UINTN)Address, (UINTN)*OriginalIn.Uint8)); MmioWrite8 ((UINTN) Address, *OriginalIn.Uint8); @@ -565,11 +565,11 @@ ScriptMemoryWrite ( case S3BootScriptWidthUint16: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x (0x%04x)\n", (UINTN)Address, (UINTN)*In.Uint16)); MmioWrite16 ((UINTN) Address, *In.Uint16); - break; + break; case S3BootScriptWidthFifoUint16: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x (0x%04x)\n", (UINTN)OriginalAddress, (UINTN)*In.Uint16)); MmioWrite16 ((UINTN) OriginalAddress, *In.Uint16); - break; + break; case S3BootScriptWidthFillUint16: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x (0x%04x)\n", (UINTN)Address, (UINTN)*OriginalIn.Uint16)); MmioWrite16 ((UINTN) Address, *OriginalIn.Uint16); @@ -577,11 +577,11 @@ ScriptMemoryWrite ( case S3BootScriptWidthUint32: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x (0x%08x)\n", (UINTN)Address, (UINTN)*In.Uint32)); MmioWrite32 ((UINTN) Address, *In.Uint32); - break; + break; case S3BootScriptWidthFifoUint32: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x (0x%08x)\n", (UINTN)OriginalAddress, (UINTN)*In.Uint32)); MmioWrite32 ((UINTN) OriginalAddress, *In.Uint32); - break; + break; case S3BootScriptWidthFillUint32: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x (0x%08x)\n", (UINTN)Address, (UINTN)*OriginalIn.Uint32)); MmioWrite32 ((UINTN) Address, *OriginalIn.Uint32); @@ -589,11 +589,11 @@ ScriptMemoryWrite ( case S3BootScriptWidthUint64: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint64 - 0x%08x (0x%016lx)\n", (UINTN)Address, *In.Uint64)); MmioWrite64 ((UINTN) Address, *In.Uint64); - break; + break; case S3BootScriptWidthFifoUint64: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint64 - 0x%08x (0x%016lx)\n", (UINTN)OriginalAddress, *In.Uint64)); MmioWrite64 ((UINTN) OriginalAddress, *In.Uint64); - break; + break; case S3BootScriptWidthFillUint64: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint64 - 0x%08x (0x%016lx)\n", (UINTN)Address, *OriginalIn.Uint64)); MmioWrite64 ((UINTN) Address, *OriginalIn.Uint64); @@ -608,14 +608,14 @@ ScriptMemoryWrite ( Interprete the boot script node with EFI_BOOT_SCRIPT_MEM_WRITE OP code. @param[in] Script Pointer to the node which is to be interpreted. - + @retval EFI_SUCCESS The data was written to the EFI System. @retval EFI_INVALID_PARAMETER Width is invalid for this EFI System. Buffer is NULL. The Buffer is not aligned for the given Width. - @retval EFI_UNSUPPORTED The address range specified by Address, Width, and Count - is not valid for this EFI System. - + @retval EFI_UNSUPPORTED The address range specified by Address, Width, and Count + is not valid for this EFI System. + **/ EFI_STATUS BootScriptExecuteMemoryWrite ( @@ -627,7 +627,7 @@ BootScriptExecuteMemoryWrite ( UINT64 Address; UINTN Count; EFI_BOOT_SCRIPT_MEM_WRITE MemWrite; - + CopyMem((VOID*)&MemWrite, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_MEM_WRITE)); Width = (S3_BOOT_SCRIPT_LIB_WIDTH)MemWrite.Width; Address = MemWrite.Address; @@ -636,8 +636,8 @@ BootScriptExecuteMemoryWrite ( DEBUG ((EFI_D_INFO, "BootScriptExecuteMemoryWrite - 0x%08x, 0x%08x, 0x%08x\n", (UINTN)Address, Count, (UINTN)Width)); return ScriptMemoryWrite (Width,Address, Count, Buffer); - -} + +} /** Performance PCI configuration read operation @@ -645,9 +645,9 @@ BootScriptExecuteMemoryWrite ( @param Address Address of the operation. @param Count Count of the number of accesses to perform. @param Buffer Pointer to the buffer read from PCI config space - + @retval EFI_SUCCESS The read succeed. - @retval EFI_INVALID_PARAMETER if Width is not defined + @retval EFI_INVALID_PARAMETER if Width is not defined @note A known Limitations in the implementation which is 64bits operations are not supported. **/ @@ -731,9 +731,9 @@ ScriptPciCfgRead ( @param Address Address of the operation. @param Count Count of the number of accesses to perform. @param Buffer Pointer to the buffer write to PCI config space - + @retval EFI_SUCCESS The write succeed. - @retval EFI_INVALID_PARAMETER if Width is not defined + @retval EFI_INVALID_PARAMETER if Width is not defined @note A known Limitations in the implementation which is 64bits operations are not supported. **/ @@ -771,11 +771,11 @@ ScriptPciCfgWrite ( case S3BootScriptWidthUint8: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x (0x%02x)\n", PciAddress, (UINTN)*In.Uint8)); PciWrite8 (PciAddress, *In.Uint8); - break; + break; case S3BootScriptWidthFifoUint8: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x (0x%02x)\n", OriginalPciAddress, (UINTN)*In.Uint8)); PciWrite8 (OriginalPciAddress, *In.Uint8); - break; + break; case S3BootScriptWidthFillUint8: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x (0x%02x)\n", PciAddress, (UINTN)*OriginalIn.Uint8)); PciWrite8 (PciAddress, *OriginalIn.Uint8); @@ -783,11 +783,11 @@ ScriptPciCfgWrite ( case S3BootScriptWidthUint16: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x (0x%04x)\n", PciAddress, (UINTN)*In.Uint16)); PciWrite16 (PciAddress, *In.Uint16); - break; + break; case S3BootScriptWidthFifoUint16: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x (0x%04x)\n", OriginalPciAddress, (UINTN)*In.Uint16)); PciWrite16 (OriginalPciAddress, *In.Uint16); - break; + break; case S3BootScriptWidthFillUint16: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x (0x%04x)\n", PciAddress, (UINTN)*OriginalIn.Uint16)); PciWrite16 (PciAddress, *OriginalIn.Uint16); @@ -795,11 +795,11 @@ ScriptPciCfgWrite ( case S3BootScriptWidthUint32: DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x (0x%08x)\n", PciAddress, (UINTN)*In.Uint32)); PciWrite32 (PciAddress, *In.Uint32); - break; + break; case S3BootScriptWidthFifoUint32: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x (0x%08x)\n", OriginalPciAddress, (UINTN)*In.Uint32)); PciWrite32 (OriginalPciAddress, *In.Uint32); - break; + break; case S3BootScriptWidthFillUint32: DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x (0x%08x)\n", (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); PciWrite32 (PciAddress, *OriginalIn.Uint32); @@ -812,7 +812,7 @@ ScriptPciCfgWrite ( } /** Performance PCI configuration 2 read operation - + @param Width Width of the operation. @param Segment Pci segment number @param Address Address of the operation. @@ -824,25 +824,25 @@ ScriptPciCfgWrite ( Buffer is NULL. The Buffer is not aligned for the given Width. Address is outside the legal range of I/O ports. - @note A known Limitations in the implementation which is the 'Segment' parameter is assumed as + @note A known Limitations in the implementation which is the 'Segment' parameter is assumed as Zero, or else, assert. **/ EFI_STATUS ScriptPciCfg2Read ( IN S3_BOOT_SCRIPT_LIB_WIDTH Width, - IN UINT16 Segment, + IN UINT16 Segment, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer ) { ASSERT (Segment==0); - + return ScriptPciCfgRead (Width, Address, Count, Buffer); } /** Performance PCI configuration 2 write operation - + @param Width Width of the operation. @param Segment Pci segment number @param Address Address of the operation. @@ -854,15 +854,15 @@ ScriptPciCfg2Read ( Buffer is NULL. The Buffer is not aligned for the given Width. Address is outside the legal range of I/O ports. - @note A known Limitations in the implementation which is the 'Segment' parameter is assumed as + @note A known Limitations in the implementation which is the 'Segment' parameter is assumed as Zero, or else, assert. - + **/ EFI_STATUS EFIAPI ScriptPciCfg2Write ( IN S3_BOOT_SCRIPT_LIB_WIDTH Width, - IN UINT16 Segment, + IN UINT16 Segment, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer @@ -873,9 +873,9 @@ ScriptPciCfg2Write ( } /** Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE OP code. - - @param Script The pointer of typed node in boot script table - + + @param Script The pointer of typed node in boot script table + @retval EFI_SUCCESS The operation was executed successfully **/ EFI_STATUS @@ -902,7 +902,7 @@ BootScriptExecutePciCfgWrite ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_IO_READ_WRITE OP code. - @param Script The pointer of typed node in boot script table + @param Script The pointer of typed node in boot script table @param AndMask Mask value for 'and' operation @param OrMask Mask value for 'or' operation @@ -919,9 +919,9 @@ BootScriptExecuteIoReadWrite ( EFI_STATUS Status; UINT64 Data; EFI_BOOT_SCRIPT_IO_READ_WRITE IoReadWrite; - + Data = 0; - + CopyMem((VOID*)&IoReadWrite, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_IO_READ_WRITE)); DEBUG ((EFI_D_INFO, "BootScriptExecuteIoReadWrite - 0x%08x, 0x%016lx, 0x%016lx\n", (UINTN)IoReadWrite.Address, AndMask, OrMask)); @@ -946,7 +946,7 @@ BootScriptExecuteIoReadWrite ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_MEM_READ_WRITE OP code. - @param Script The pointer of typed node in boot script table + @param Script The pointer of typed node in boot script table @param AndMask Mask value for 'and' operation @param OrMask Mask value for 'or' operation @@ -963,13 +963,13 @@ BootScriptExecuteMemoryReadWrite ( EFI_STATUS Status; UINT64 Data; EFI_BOOT_SCRIPT_MEM_READ_WRITE MemReadWrite; - + Data = 0; - + CopyMem((VOID*)&MemReadWrite, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_MEM_READ_WRITE)); DEBUG ((EFI_D_INFO, "BootScriptExecuteMemoryReadWrite - 0x%08x, 0x%016lx, 0x%016lx\n", (UINTN)MemReadWrite.Address, AndMask, OrMask)); - + Status = ScriptMemoryRead ( (S3_BOOT_SCRIPT_LIB_WIDTH) MemReadWrite.Width, MemReadWrite.Address, @@ -990,7 +990,7 @@ BootScriptExecuteMemoryReadWrite ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CFG_READ_WRITE OP code. - @param Script The pointer of typed node in boot script table + @param Script The pointer of typed node in boot script table @param AndMask Mask value for 'and' operation @param OrMask Mask value for 'or' operation @@ -1013,7 +1013,7 @@ BootScriptExecutePciCfgReadWrite ( CopyMem((VOID*)&PciCfgReadWrite, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE)); DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%08x, 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgReadWrite.Address), AndMask, OrMask)); - + Status = ScriptPciCfgRead ( (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfgReadWrite.Width, PciCfgReadWrite.Address, @@ -1038,11 +1038,11 @@ BootScriptExecutePciCfgReadWrite ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_SMBUS_EXECUTE OP code. - @param Script The pointer of typed node in boot script table - + @param Script The pointer of typed node in boot script table + @retval EFI_SUCCESS The operation was executed successfully @retval EFI_UNSUPPORTED Cannot locate smbus ppi or occur error of script execution - @retval Others Result of script execution + @retval Others Result of script execution **/ EFI_STATUS BootScriptExecuteSmbusExecute ( @@ -1052,7 +1052,7 @@ BootScriptExecuteSmbusExecute ( UINTN SmBusAddress; UINTN DataSize; EFI_BOOT_SCRIPT_SMBUS_EXECUTE SmbusExecuteEntry; - + CopyMem ((VOID*)&SmbusExecuteEntry, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_SMBUS_EXECUTE )); DEBUG ((EFI_D_INFO, "BootScriptExecuteSmbusExecute - 0x%08x, 0x%08x\n", (UINTN)SmbusExecuteEntry.SmBusAddress, (UINTN)SmbusExecuteEntry.Operation)); @@ -1069,8 +1069,8 @@ BootScriptExecuteSmbusExecute ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_STALL OP code. - @param Script The pointer of typed node in boot script table - + @param Script The pointer of typed node in boot script table + @retval EFI_SUCCESS The operation was executed successfully **/ EFI_STATUS @@ -1079,7 +1079,7 @@ BootScriptExecuteStall ( ) { EFI_BOOT_SCRIPT_STALL Stall; - + CopyMem ((VOID*)&Stall, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_STALL)); DEBUG ((EFI_D_INFO, "BootScriptExecuteStall - 0x%08x\n", (UINTN)Stall.Duration)); @@ -1089,8 +1089,8 @@ BootScriptExecuteStall ( } /** Interprete the boot script node with EFI_BOOT_SCRIPT_DISPATCH OP code. - - @param Script The pointer of typed node in boot script table + + @param Script The pointer of typed node in boot script table @retval EFI_SUCCESS The operation was executed successfully **/ EFI_STATUS @@ -1101,7 +1101,7 @@ BootScriptExecuteDispatch ( EFI_STATUS Status; DISPATCH_ENTRYPOINT_FUNC EntryFunc; EFI_BOOT_SCRIPT_DISPATCH ScriptDispatch; - + CopyMem ((VOID*)&ScriptDispatch, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_DISPATCH)); EntryFunc = (DISPATCH_ENTRYPOINT_FUNC) (UINTN) (ScriptDispatch.EntryPoint); @@ -1114,7 +1114,7 @@ BootScriptExecuteDispatch ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_DISPATCH_2 OP code. - @param Script The pointer of typed node in boot script table + @param Script The pointer of typed node in boot script table @retval EFI_SUCCESS The operation was executed successfully **/ EFI_STATUS @@ -1125,11 +1125,11 @@ BootScriptExecuteDispatch2 ( EFI_STATUS Status; DISPATCH_ENTRYPOINT_FUNC EntryFunc; EFI_BOOT_SCRIPT_DISPATCH_2 ScriptDispatch2; - + CopyMem ((VOID*)&ScriptDispatch2, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_DISPATCH_2)); DEBUG ((EFI_D_INFO, "BootScriptExecuteDispatch2 - 0x%08x(0x%08x)\n", (UINTN)ScriptDispatch2.EntryPoint, (UINTN)ScriptDispatch2.Context)); - + EntryFunc = (DISPATCH_ENTRYPOINT_FUNC) (UINTN) (ScriptDispatch2.EntryPoint); Status = EntryFunc (NULL, (VOID *) (UINTN) ScriptDispatch2.Context); @@ -1139,11 +1139,11 @@ BootScriptExecuteDispatch2 ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_MEM_POLL OP code. - @param Script The pointer of typed node in boot script table + @param Script The pointer of typed node in boot script table @param AndMask Mask value for 'and' operation @param OrMask Mask value for 'or' operation - - @retval EFI_DEVICE_ERROR Data polled from memory does not equal to + + @retval EFI_DEVICE_ERROR Data polled from memory does not equal to the epecting data within the Loop Times. @retval EFI_SUCCESS The operation was executed successfully **/ @@ -1151,15 +1151,15 @@ EFI_STATUS BootScriptExecuteMemPoll ( IN UINT8 *Script, IN UINT64 AndMask, - IN UINT64 OrMask + IN UINT64 OrMask ) { - + UINT64 Data; UINT64 LoopTimes; EFI_STATUS Status; EFI_BOOT_SCRIPT_MEM_POLL MemPoll; - + CopyMem ((VOID*)&MemPoll, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_MEM_POLL)); DEBUG ((EFI_D_INFO, "BootScriptExecuteMemPoll - 0x%08x, 0x%016lx, 0x%016lx\n", (UINTN)MemPoll.Address, AndMask, OrMask)); @@ -1200,8 +1200,8 @@ BootScriptExecuteMemPoll ( Execute the boot script to interpret the Store arbitrary information. This opcode is a no-op on dispatch and is only used for debugging script issues. - @param Script The pointer of node in boot script table - + @param Script The pointer of node in boot script table + **/ VOID BootScriptExecuteInformation ( @@ -1226,10 +1226,10 @@ BootScriptExecuteInformation ( } /** - Execute the boot script to interpret the Label information. + Execute the boot script to interpret the Label information. + + @param Script The pointer of node in boot script table - @param Script The pointer of node in boot script table - **/ VOID BootScriptExecuteLabel ( @@ -1255,7 +1255,7 @@ BootScriptExecuteLabel ( /** calculate the mask value for 'and' and 'or' operation - @param ScriptHeader The pointer of header of node in boot script table + @param ScriptHeader The pointer of header of node in boot script table @param AndMask The Mask value for 'and' operation @param OrMask The Mask value for 'or' operation @param Script Pointer to the entry. @@ -1287,27 +1287,27 @@ CheckAndOrMask ( case EFI_BOOT_SCRIPT_MEM_POLL_OPCODE: Size = sizeof (EFI_BOOT_SCRIPT_MEM_POLL); break; - + case EFI_BOOT_SCRIPT_IO_POLL_OPCODE: Size = sizeof (EFI_BOOT_SCRIPT_IO_POLL); - break; - + break; + case EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE: Size = sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE); break; - + case EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE: Size = sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL); break; - + case EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE: Size = sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_POLL); break; - + default: return; } - + DataPtr = Script + Size; switch (ScriptHeader->Width) { @@ -1340,11 +1340,11 @@ CheckAndOrMask ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_IO_POLL OP code. - @param Script The pointer of typed node in boot script table + @param Script The pointer of typed node in boot script table @param AndMask Mask value for 'and' operation @param OrMask Mask value for 'or' operation - - @retval EFI_DEVICE_ERROR Data polled from memory does not equal to + + @retval EFI_DEVICE_ERROR Data polled from memory does not equal to the epecting data within the Loop Times. @retval EFI_SUCCESS The operation was executed successfully **/ @@ -1359,7 +1359,7 @@ BootScriptExecuteIoPoll ( UINT64 Data; UINT64 LoopTimes; EFI_BOOT_SCRIPT_IO_POLL IoPoll; - + CopyMem ((VOID*)&IoPoll, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_IO_POLL)); DEBUG ((EFI_D_INFO, "BootScriptExecuteIoPoll - 0x%08x, 0x%016lx, 0x%016lx\n", (UINTN)IoPoll.Address, AndMask, OrMask)); @@ -1385,7 +1385,7 @@ BootScriptExecuteIoPoll ( ); if ((!EFI_ERROR (Status)) &&(Data & AndMask) == OrMask) { return EFI_SUCCESS; - } + } } if (LoopTimes < IoPoll.Delay) { @@ -1413,7 +1413,7 @@ BootScriptExecutePciCfg2Write ( UINT64 Address; UINTN Count; EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE PciCfg2Write; - + CopyMem ((VOID*)&PciCfg2Write, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE)); Width = (S3_BOOT_SCRIPT_LIB_WIDTH)PciCfg2Write.Width; @@ -1429,7 +1429,7 @@ BootScriptExecutePciCfg2Write ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE OP code. - + @param Script The pointer of S3 boot script @param AndMask Mask value for 'and' operation @param OrMask Mask value for 'or' operation @@ -1453,7 +1453,7 @@ BootScriptExecutePciCfg2ReadWrite ( CopyMem ((VOID*)&PciCfg2ReadWrite, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE)); DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%04x, 0x%08x, 0x%016lx, 0x%016lx\n", PciCfg2ReadWrite.Segment, PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Address), AndMask, OrMask)); - + Status = ScriptPciCfg2Read ( (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2ReadWrite.Width, PciCfg2ReadWrite.Segment, @@ -1477,20 +1477,20 @@ BootScriptExecutePciCfg2ReadWrite ( } /** Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CONFIG_POLL OP code. - + @param Script The pointer of S3 boot script @param AndMask Mask value for 'and' operation @param OrMask Mask value for 'or' operation @retval EFI_SUCCESS The operation was executed successfully - @retval EFI_DEVICE_ERROR Data polled from Pci configuration space does not equal to + @retval EFI_DEVICE_ERROR Data polled from Pci configuration space does not equal to epecting data within the Loop Times. **/ EFI_STATUS BootScriptPciCfgPoll ( IN UINT8 *Script, IN UINT64 AndMask, - IN UINT64 OrMask + IN UINT64 OrMask ) { UINT64 Data; @@ -1500,7 +1500,7 @@ BootScriptPciCfgPoll ( CopyMem ((VOID*)&PciCfgPoll, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_POLL)); DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%08x, 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgPoll.Address), AndMask, OrMask)); - + Data = 0; Status = ScriptPciCfgRead ( (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfgPoll.Width, @@ -1536,13 +1536,13 @@ BootScriptPciCfgPoll ( /** Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL OP code. - + @param Script The pointer of S3 Boot Script @param AndMask Mask value for 'and' operation @param OrMask Mask value for 'or' operation @retval EFI_SUCCESS The operation was executed successfully - @retval EFI_DEVICE_ERROR Data polled from Pci configuration space does not equal to + @retval EFI_DEVICE_ERROR Data polled from Pci configuration space does not equal to epecting data within the Loop Times. **/ @@ -1550,7 +1550,7 @@ EFI_STATUS BootScriptPciCfg2Poll ( IN UINT8 *Script, IN UINT64 AndMask, - IN UINT64 OrMask + IN UINT64 OrMask ) { EFI_STATUS Status; @@ -1562,7 +1562,7 @@ BootScriptPciCfg2Poll ( CopyMem ((VOID*)&PciCfg2Poll, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL)); DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%04x, 0x%08x, 0x%016lx, 0x%016lx\n", PciCfg2Poll.Segment, PCI_ADDRESS_ENCODE (PciCfg2Poll.Address), AndMask, OrMask)); - + Status = ScriptPciCfg2Read ( (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2Poll.Width, PciCfg2Poll.Segment, @@ -1580,7 +1580,7 @@ BootScriptPciCfg2Poll ( Data = 0; Status = ScriptPciCfg2Read ( (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2Poll.Width, - PciCfg2Poll.Segment, + PciCfg2Poll.Segment, PciCfg2Poll.Address, 1, &Data @@ -1595,17 +1595,17 @@ BootScriptPciCfg2Poll ( } else { return EFI_DEVICE_ERROR; } - + } /** Executes the S3 boot script table. - + @retval RETURN_SUCCESS The boot script table was executed successfully. - @retval RETURN_UNSUPPORTED Invalid script table or opcode. - + @retval RETURN_UNSUPPORTED Invalid script table or opcode. + @note A known Limitations in the implementation: When interpreting the opcode EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE - EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE and EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as + EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE and EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as Zero, or else, assert. **/ RETURN_STATUS @@ -1623,7 +1623,7 @@ S3BootScriptExecute ( EFI_BOOT_SCRIPT_COMMON_HEADER ScriptHeader; EFI_BOOT_SCRIPT_TABLE_HEADER TableHeader; Script = mS3BootScriptTablePtr->TableBase; - if (Script != 0) { + if (Script != 0) { CopyMem ((VOID*)&TableHeader, Script, sizeof(EFI_BOOT_SCRIPT_TABLE_HEADER)); } else { return EFI_INVALID_PARAMETER; @@ -1635,7 +1635,7 @@ S3BootScriptExecute ( } DEBUG ((EFI_D_INFO, "TableHeader - 0x%08x\n", Script)); - + StartAddress = (UINTN) Script; TableLength = TableHeader.TableLength; Script = Script + TableHeader.Length; @@ -1648,7 +1648,7 @@ S3BootScriptExecute ( while ((UINTN) Script < (UINTN) (StartAddress + TableLength)) { DEBUG ((EFI_D_INFO, "ExecuteBootScript - %08x\n", (UINTN)Script)); - + CopyMem ((VOID*)&ScriptHeader, Script, sizeof(EFI_BOOT_SCRIPT_COMMON_HEADER)); switch (ScriptHeader.OpCode) { @@ -1713,7 +1713,7 @@ S3BootScriptExecute ( case EFI_BOOT_SCRIPT_INFORMATION_OPCODE: DEBUG ((EFI_D_INFO, "EFI_BOOT_SCRIPT_INFORMATION_OPCODE\n")); BootScriptExecuteInformation (Script); - break; + break; case S3_BOOT_SCRIPT_LIB_TERMINATE_OPCODE: DEBUG ((EFI_D_INFO, "S3_BOOT_SCRIPT_LIB_TERMINATE_OPCODE\n")); @@ -1744,21 +1744,21 @@ S3BootScriptExecute ( DEBUG ((EFI_D_INFO, "EFI_BOOT_SCRIPT_MEM_POLL_OPCODE\n")); CheckAndOrMask (&ScriptHeader, &AndMask, &OrMask, Script); Status = BootScriptExecuteMemPoll (Script, AndMask, OrMask); - + break; - + case EFI_BOOT_SCRIPT_IO_POLL_OPCODE: DEBUG ((EFI_D_INFO, "EFI_BOOT_SCRIPT_IO_POLL_OPCODE\n")); CheckAndOrMask (&ScriptHeader, &AndMask, &OrMask, Script); Status = BootScriptExecuteIoPoll (Script, AndMask, OrMask); break; - + case EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE: DEBUG ((EFI_D_INFO, "EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE\n")); CheckAndOrMask (&ScriptHeader, &AndMask, &OrMask, Script); Status = BootScriptPciCfgPoll (Script, AndMask, OrMask); break; - + case EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE: DEBUG ((EFI_D_INFO, "EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE\n")); CheckAndOrMask (&ScriptHeader, &AndMask, &OrMask, Script); diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptInternalFormat.h b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptInternalFormat.h index 99cb407dbd33..38171c56fdb6 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptInternalFormat.h +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptInternalFormat.h @@ -169,7 +169,7 @@ typedef struct { UINT8 Length; UINT32 Width; UINT64 Address; - UINT16 Segment; + UINT16 Segment; UINT64 Delay; } EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL; diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c index 0459bae4c60a..de3915511cec 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c @@ -133,10 +133,10 @@ BOOLEAN mS3BootScriptTableSmmAllocated = FALSE; EFI_SMM_SYSTEM_TABLE2 *mBootScriptSmst = NULL; /** - This is an internal function to add a terminate node the entry, recalculate the table - length and fill into the table. - - @return the base address of the boot script table. + This is an internal function to add a terminate node the entry, recalculate the table + length and fill into the table. + + @return the base address of the boot script table. **/ UINT8* S3BootScriptInternalCloseTable ( @@ -147,7 +147,7 @@ S3BootScriptInternalCloseTable ( EFI_BOOT_SCRIPT_TERMINATE ScriptTerminate; EFI_BOOT_SCRIPT_TABLE_HEADER *ScriptTableInfo; S3TableBase = mS3BootScriptTablePtr->TableBase; - + if (S3TableBase == NULL) { // // the table is not exist @@ -165,17 +165,17 @@ S3BootScriptInternalCloseTable ( // ScriptTableInfo = (EFI_BOOT_SCRIPT_TABLE_HEADER*)(mS3BootScriptTablePtr->TableBase); ScriptTableInfo->TableLength = mS3BootScriptTablePtr->TableLength + sizeof (EFI_BOOT_SCRIPT_TERMINATE); - - - + + + return S3TableBase; // - // NOTE: Here we did NOT adjust the mS3BootScriptTablePtr->TableLength to + // NOTE: Here we did NOT adjust the mS3BootScriptTablePtr->TableLength to // mS3BootScriptTablePtr->TableLength + sizeof (EFI_BOOT_SCRIPT_TERMINATE). // Because maybe after SmmReadyToLock, we still need add entries into the table, // and the entry should be added start before this TERMINATE node. // -} +} /** This function save boot script data to LockBox. @@ -220,9 +220,9 @@ SaveBootScriptDataToLockBox ( /** This is the Event call back function to notify the Library the system is entering SmmLocked phase. - + @param Event Pointer to this event - @param Context Event handler private data + @param Context Event handler private data **/ VOID EFIAPI @@ -419,8 +419,8 @@ S3BootScriptSmmAtRuntimeCallBack ( /** Library Constructor. - this function just identify it is a smm driver or non-smm driver linked against - with the library + this function just identify it is a smm driver or non-smm driver linked against + with the library @param ImageHandle The firmware allocated handle for the EFI image. @param SystemTable A pointer to the EFI System Table. @@ -637,12 +637,12 @@ S3BootScriptLibDeinitialize ( /** To get the start address from which a new boot time s3 boot script entry will write into. If the table is not exist, the functio will first allocate a buffer for the table - If the table buffer is not enough for the new entry, in non-smm mode, the funtion will + If the table buffer is not enough for the new entry, in non-smm mode, the funtion will invoke reallocate to enlarge buffer. - + @param EntryLength the new entry length. - - @retval the address from which the a new s3 boot script entry will write into + + @retval the address from which the a new s3 boot script entry will write into **/ UINT8* S3BootScriptGetBootTimeEntryAddAddress ( @@ -656,11 +656,11 @@ S3BootScriptGetBootTimeEntryAddAddress ( UINT16 PageNumber; EFI_STATUS Status; EFI_BOOT_SCRIPT_TABLE_HEADER *ScriptTableInfo; - + S3TableBase = (EFI_PHYSICAL_ADDRESS)(UINTN)(mS3BootScriptTablePtr->TableBase); if (S3TableBase == 0) { // - // The table is not exist. This is the first to add entry. + // The table is not exist. This is the first to add entry. // Allocate ACPI script table space under 4G memory. // S3TableBase = 0xffffffff; @@ -670,7 +670,7 @@ S3BootScriptGetBootTimeEntryAddAddress ( 2 + PcdGet16(PcdS3BootScriptRuntimeTableReservePageNumber), (EFI_PHYSICAL_ADDRESS*)&S3TableBase ); - + if (EFI_ERROR(Status)) { ASSERT_EFI_ERROR (Status); return 0; @@ -687,12 +687,12 @@ S3BootScriptGetBootTimeEntryAddAddress ( mS3BootScriptTablePtr->TableBase = (UINT8*)(UINTN)S3TableBase; mS3BootScriptTablePtr->TableMemoryPageNumber = (UINT16)(2 + PcdGet16(PcdS3BootScriptRuntimeTableReservePageNumber)); } - + // Here we do not count the reserved memory for runtime script table. PageNumber = (UINT16) (mS3BootScriptTablePtr->TableMemoryPageNumber - PcdGet16(PcdS3BootScriptRuntimeTableReservePageNumber)); TableLength = mS3BootScriptTablePtr->TableLength; if ((UINTN) EFI_PAGES_TO_SIZE ((UINTN) PageNumber) < (UINTN) (TableLength + EntryLength + sizeof (EFI_BOOT_SCRIPT_TERMINATE))) { - // + // // The buffer is too small to hold the table, Reallocate the buffer // NewS3TableBase = 0xffffffff; @@ -702,43 +702,43 @@ S3BootScriptGetBootTimeEntryAddAddress ( 2 + PageNumber + PcdGet16(PcdS3BootScriptRuntimeTableReservePageNumber), (EFI_PHYSICAL_ADDRESS*)&NewS3TableBase ); - + if (EFI_ERROR(Status)) { ASSERT_EFI_ERROR (Status); return 0; } - + CopyMem ((VOID*)(UINTN)NewS3TableBase, (VOID*)(UINTN)S3TableBase, TableLength); gBS->FreePages (S3TableBase, mS3BootScriptTablePtr->TableMemoryPageNumber); - + mS3BootScriptTablePtr->TableBase = (UINT8*)(UINTN)NewS3TableBase; - mS3BootScriptTablePtr->TableMemoryPageNumber = (UINT16) (2 + PageNumber + PcdGet16(PcdS3BootScriptRuntimeTableReservePageNumber)); + mS3BootScriptTablePtr->TableMemoryPageNumber = (UINT16) (2 + PageNumber + PcdGet16(PcdS3BootScriptRuntimeTableReservePageNumber)); } // - // calculate the the start address for the new entry. + // calculate the the start address for the new entry. // NewEntryPtr = mS3BootScriptTablePtr->TableBase + TableLength; - + // // update the table lenghth // mS3BootScriptTablePtr->TableLength = TableLength + EntryLength; - + // // In the boot time, we will not append the termination entry to the boot script - // table until the callers think there is no boot time data that should be added and - // it is caller's responsibility to explicit call the CloseTable. + // table until the callers think there is no boot time data that should be added and + // it is caller's responsibility to explicit call the CloseTable. // // - - return NewEntryPtr; + + return NewEntryPtr; } /** To get the start address from which a new runtime(after SmmReadyToLock) s3 boot script entry will write into. In this case, it should be ensured that there is enough buffer to hold the entry. - + @param EntryLength the new entry length. - + @retval the address from which the a new s3 runtime(after SmmReadyToLock) script entry will write into **/ UINT8* @@ -747,20 +747,20 @@ S3BootScriptGetRuntimeEntryAddAddress ( ) { UINT8 *NewEntryPtr; - - NewEntryPtr = NULL; + + NewEntryPtr = NULL; // - // Check if the memory range reserved for S3 Boot Script table is large enough to hold the node. + // Check if the memory range reserved for S3 Boot Script table is large enough to hold the node. // if ((UINTN) (mS3BootScriptTablePtr->TableLength + EntryLength + sizeof (EFI_BOOT_SCRIPT_TERMINATE)) <= (UINTN) EFI_PAGES_TO_SIZE ((UINTN) (mS3BootScriptTablePtr->TableMemoryPageNumber))) { - NewEntryPtr = mS3BootScriptTablePtr->TableBase + mS3BootScriptTablePtr->TableLength; + NewEntryPtr = mS3BootScriptTablePtr->TableBase + mS3BootScriptTablePtr->TableLength; mS3BootScriptTablePtr->TableLength = mS3BootScriptTablePtr->TableLength + EntryLength; // // Append a terminate node on every insert // S3BootScriptInternalCloseTable (); } - return (UINT8*)NewEntryPtr; + return (UINT8*)NewEntryPtr; } /** @@ -805,12 +805,12 @@ RestoreBootTimeDataFromLockBox ( /** To get the start address from which a new s3 boot script entry will write into. - + @param EntryLength the new entry length. - - @retval the address from which the a new s3 boot script entry will write into - **/ -UINT8* + + @retval the address from which the a new s3 boot script entry will write into + **/ +UINT8* S3BootScriptGetEntryAddAddress ( UINT8 EntryLength ) @@ -842,10 +842,10 @@ S3BootScriptGetEntryAddAddress ( NewEntryPtr = S3BootScriptGetRuntimeEntryAddAddress (EntryLength); } else { NewEntryPtr = S3BootScriptGetBootTimeEntryAddAddress (EntryLength); - } + } return NewEntryPtr; - -} + +} /** Sync BootScript LockBox data. @@ -899,28 +899,28 @@ SyncBootScript ( ASSERT_EFI_ERROR (Status); } -/** - This is an function to close the S3 boot script table. The function could only be called in - BOOT time phase. To comply with the Framework spec definition on +/** + This is an function to close the S3 boot script table. The function could only be called in + BOOT time phase. To comply with the Framework spec definition on EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable(), this function will fulfill following things: 1. Closes the specified boot script table - 2. It allocates a new memory pool to duplicate all the boot scripts in the specified table. - Once this function is called, the table maintained by the library will be destroyed + 2. It allocates a new memory pool to duplicate all the boot scripts in the specified table. + Once this function is called, the table maintained by the library will be destroyed after it is copied into the allocated pool. - 3. Any attempts to add a script record after calling this function will cause a new table + 3. Any attempts to add a script record after calling this function will cause a new table to be created by the library. - 4. The base address of the allocated pool will be returned in Address. Note that after + 4. The base address of the allocated pool will be returned in Address. Note that after using the boot script table, the CALLER is responsible for freeing the pool that is allocated - by this function. + by this function. - In Spec PI1.1, this EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable() is retired. To provides this API for now is + In Spec PI1.1, this EFI_BOOT_SCRIPT_SAVE_PROTOCOL.CloseTable() is retired. To provides this API for now is for Framework Spec compatibility. - - If anyone does call CloseTable() on a real platform, then the caller is responsible for figuring out - how to get the script to run at S3 resume because the boot script maintained by the lib will be + + If anyone does call CloseTable() on a real platform, then the caller is responsible for figuring out + how to get the script to run at S3 resume because the boot script maintained by the lib will be destroyed. - - @return the base address of the new copy of the boot script table. + + @return the base address of the new copy of the boot script table. @note this function could only called in boot time phase **/ @@ -935,10 +935,10 @@ S3BootScriptCloseTable ( UINT8 *Buffer; EFI_STATUS Status; EFI_BOOT_SCRIPT_TABLE_HEADER *ScriptTableInfo; - - S3TableBase = mS3BootScriptTablePtr->TableBase; + + S3TableBase = mS3BootScriptTablePtr->TableBase; if (S3TableBase == 0) { - return 0; + return 0; } // // Append the termination record the S3 boot script table @@ -946,7 +946,7 @@ S3BootScriptCloseTable ( S3BootScriptInternalCloseTable(); TableLength = mS3BootScriptTablePtr->TableLength + sizeof (EFI_BOOT_SCRIPT_TERMINATE); // - // Allocate the buffer and copy the boot script to the buffer. + // Allocate the buffer and copy the boot script to the buffer. // Status = gBS->AllocatePool ( EfiBootServicesData, @@ -954,12 +954,12 @@ S3BootScriptCloseTable ( (VOID **) &Buffer ); if (EFI_ERROR (Status)) { - return 0; + return 0; } CopyMem (Buffer, S3TableBase, TableLength); - + // - // Destroy the table maintained by the library so that the next write operation + // Destroy the table maintained by the library so that the next write operation // will write the record to the first entry of the table. // // Fill the table header. @@ -967,12 +967,12 @@ S3BootScriptCloseTable ( ScriptTableInfo->OpCode = S3_BOOT_SCRIPT_LIB_TABLE_OPCODE; ScriptTableInfo->Length = (UINT8) sizeof (EFI_BOOT_SCRIPT_TABLE_HEADER); ScriptTableInfo->TableLength = 0; // will be calculate at close the table - + mS3BootScriptTablePtr->TableLength = sizeof (EFI_BOOT_SCRIPT_TABLE_HEADER); return Buffer; } /** - Save I/O write to boot script + Save I/O write to boot script @param Width The width of the I/O operations.Enumerated in S3_BOOT_SCRIPT_LIB_WIDTH. @param Address The base address of the I/O operations. @@ -999,7 +999,7 @@ S3BootScriptSaveIoWrite ( WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_IO_WRITE) + (WidthInByte * Count)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; @@ -1047,7 +1047,7 @@ S3BootScriptSaveIoReadWrite ( WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_IO_READ_WRITE) + (WidthInByte * 2)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; @@ -1059,7 +1059,7 @@ S3BootScriptSaveIoReadWrite ( ScriptIoReadWrite.Length = Length; ScriptIoReadWrite.Width = Width; ScriptIoReadWrite.Address = Address; - + CopyMem ((VOID*)Script, (VOID*)&ScriptIoReadWrite, sizeof(EFI_BOOT_SCRIPT_IO_READ_WRITE)); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_IO_READ_WRITE)), Data, WidthInByte); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_IO_READ_WRITE) + WidthInByte), DataMask, WidthInByte); @@ -1092,14 +1092,14 @@ S3BootScriptSaveMemWrite ( UINT8 *Script; UINT8 WidthInByte; EFI_BOOT_SCRIPT_MEM_WRITE ScriptMemWrite; - + WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_MEM_WRITE) + (WidthInByte * Count)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data // @@ -1108,10 +1108,10 @@ S3BootScriptSaveMemWrite ( ScriptMemWrite.Width = Width; ScriptMemWrite.Address = Address; ScriptMemWrite.Count = (UINT32) Count; - + CopyMem ((VOID*)Script, (VOID*)&ScriptMemWrite, sizeof(EFI_BOOT_SCRIPT_MEM_WRITE)); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_MEM_WRITE)), Buffer, WidthInByte * Count); - + SyncBootScript (Script); return RETURN_SUCCESS; @@ -1140,22 +1140,22 @@ S3BootScriptSaveMemReadWrite ( UINT8 *Script; UINT8 WidthInByte; EFI_BOOT_SCRIPT_MEM_READ_WRITE ScriptMemReadWrite; - + WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_MEM_READ_WRITE) + (WidthInByte * 2)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data - // + // ScriptMemReadWrite.OpCode = EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE; ScriptMemReadWrite.Length = Length; ScriptMemReadWrite.Width = Width; ScriptMemReadWrite.Address = Address; - + CopyMem ((VOID*)Script, (VOID*)&ScriptMemReadWrite , sizeof (EFI_BOOT_SCRIPT_MEM_READ_WRITE)); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_MEM_READ_WRITE)), Data, WidthInByte); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_MEM_READ_WRITE) + WidthInByte), DataMask, WidthInByte); @@ -1199,11 +1199,11 @@ S3BootScriptSavePciCfgWrite ( WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE) + (WidthInByte * Count)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data // @@ -1212,10 +1212,10 @@ S3BootScriptSavePciCfgWrite ( ScriptPciWrite.Width = Width; ScriptPciWrite.Address = Address; ScriptPciWrite.Count = (UINT32) Count; - + CopyMem ((VOID*)Script, (VOID*)&ScriptPciWrite, sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE)); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE)), Buffer, WidthInByte * Count); - + SyncBootScript (Script); return RETURN_SUCCESS; @@ -1255,19 +1255,19 @@ S3BootScriptSavePciCfgReadWrite ( WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE) + (WidthInByte * 2)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data - // + // ScriptPciReadWrite.OpCode = EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE; ScriptPciReadWrite.Length = Length; ScriptPciReadWrite.Width = Width; ScriptPciReadWrite.Address = Address; - + CopyMem ((VOID*)Script, (VOID*)&ScriptPciReadWrite, sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE)); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE)), Data, WidthInByte); CopyMem ( @@ -1318,11 +1318,11 @@ S3BootScriptSavePciCfg2Write ( WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE) + (WidthInByte * Count)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data // @@ -1332,7 +1332,7 @@ S3BootScriptSavePciCfg2Write ( ScriptPciWrite2.Address = Address; ScriptPciWrite2.Segment = Segment; ScriptPciWrite2.Count = (UINT32)Count; - + CopyMem ((VOID*)Script, (VOID*)&ScriptPciWrite2, sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE)); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE)), Buffer, WidthInByte * Count); @@ -1375,14 +1375,14 @@ S3BootScriptSavePciCfg2ReadWrite ( Width == S3BootScriptWidthFillUint64) { return EFI_INVALID_PARAMETER; } - + WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE) + (WidthInByte * 2)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data // @@ -1391,7 +1391,7 @@ S3BootScriptSavePciCfg2ReadWrite ( ScriptPciReadWrite2.Width = Width; ScriptPciReadWrite2.Segment = Segment; ScriptPciReadWrite2.Address = Address; - + CopyMem ((VOID*)Script, (VOID*)&ScriptPciReadWrite2, sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE)); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE)), Data, WidthInByte); CopyMem ( @@ -1399,7 +1399,7 @@ S3BootScriptSavePciCfg2ReadWrite ( DataMask, WidthInByte ); - + SyncBootScript (Script); return RETURN_SUCCESS; @@ -1412,7 +1412,7 @@ S3BootScriptSavePciCfg2ReadWrite ( for certain SMBus bus protocol, it will return EFI_SUCCESS; otherwise, it will return certain error code based on the input SMBus bus protocol. - @param SmBusAddress Address that encodes the SMBUS Slave Address, SMBUS Command, SMBUS Data Length, + @param SmBusAddress Address that encodes the SMBUS Slave Address, SMBUS Command, SMBUS Data Length, and PEC. @param Operation Signifies which particular SMBus hardware protocol instance that it will use to execute the SMBus transactions. This SMBus @@ -1428,7 +1428,7 @@ S3BootScriptSavePciCfg2ReadWrite ( buffer is identified by Length. @retval EFI_SUCCESS All the parameters are valid for the corresponding SMBus bus - protocol. + protocol. @retval EFI_INVALID_PARAMETER Operation is not defined in EFI_SMBUS_OPERATION. @retval EFI_INVALID_PARAMETER Length/Buffer is NULL for operations except for EfiSmbusQuickRead and EfiSmbusQuickWrite. Length is outside the range of valid @@ -1449,12 +1449,12 @@ CheckParameters ( UINTN RequiredLen; EFI_SMBUS_DEVICE_COMMAND Command; BOOLEAN PecCheck; - + Command = SMBUS_LIB_COMMAND (SmBusAddress); PecCheck = SMBUS_LIB_PEC (SmBusAddress); // // Set default value to be 2: - // for SmbusReadWord, SmbusWriteWord and SmbusProcessCall. + // for SmbusReadWord, SmbusWriteWord and SmbusProcessCall. // RequiredLen = 2; Status = EFI_SUCCESS; @@ -1492,8 +1492,8 @@ CheckParameters ( case EfiSmbusReadBlock: case EfiSmbusWriteBlock: case EfiSmbusBWBRProcessCall: - if ((Buffer == NULL) || - (Length == NULL) || + if ((Buffer == NULL) || + (Length == NULL) || (*Length < MIN_SMBUS_BLOCK_LEN) || (*Length > MAX_SMBUS_BLOCK_LEN)) { return EFI_INVALID_PARAMETER; @@ -1513,14 +1513,14 @@ CheckParameters ( transactions. @param Length A pointer to signify the number of bytes that this operation will do. @param Buffer Contains the value of data to execute to the SMBUS slave device. - + @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. **/ RETURN_STATUS EFIAPI S3BootScriptSaveSmbusExecute ( - IN UINTN SmBusAddress, + IN UINTN SmBusAddress, IN EFI_SMBUS_OPERATION Operation, IN UINTN *Length, IN VOID *Buffer @@ -1544,7 +1544,7 @@ S3BootScriptSaveSmbusExecute ( } DataSize = (UINT8)(sizeof (EFI_BOOT_SCRIPT_SMBUS_EXECUTE) + BufferLength); - + Script = S3BootScriptGetEntryAddAddress (DataSize); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; @@ -1573,7 +1573,7 @@ S3BootScriptSaveSmbusExecute ( Adds a record for an execution stall on the processor into a specified boot script table. @param Duration Duration in microseconds of the stall - + @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. **/ @@ -1588,20 +1588,20 @@ S3BootScriptSaveStall ( EFI_BOOT_SCRIPT_STALL ScriptStall; Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_STALL)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data // ScriptStall.OpCode = EFI_BOOT_SCRIPT_STALL_OPCODE; ScriptStall.Length = Length; ScriptStall.Duration = Duration; - + CopyMem ((VOID*)Script, (VOID*)&ScriptStall, sizeof (EFI_BOOT_SCRIPT_STALL)); - + SyncBootScript (Script); return RETURN_SUCCESS; @@ -1611,7 +1611,7 @@ S3BootScriptSaveStall ( @param EntryPoint Entry point of the code to be dispatched. @param Context Argument to be passed into the EntryPoint of the code to be dispatched. - + @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. **/ @@ -1626,11 +1626,11 @@ S3BootScriptSaveDispatch2 ( UINT8 *Script; EFI_BOOT_SCRIPT_DISPATCH_2 ScriptDispatch2; Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_DISPATCH_2)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data // @@ -1638,9 +1638,9 @@ S3BootScriptSaveDispatch2 ( ScriptDispatch2.Length = Length; ScriptDispatch2.EntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)EntryPoint; ScriptDispatch2.Context = (EFI_PHYSICAL_ADDRESS)(UINTN)Context; - + CopyMem ((VOID*)Script, (VOID*)&ScriptDispatch2, sizeof (EFI_BOOT_SCRIPT_DISPATCH_2)); - + SyncBootScript (Script); return RETURN_SUCCESS; @@ -1679,13 +1679,13 @@ S3BootScriptSaveMemPoll ( { UINT8 Length; UINT8 *Script; - UINT8 WidthInByte; - EFI_BOOT_SCRIPT_MEM_POLL ScriptMemPoll; + UINT8 WidthInByte; + EFI_BOOT_SCRIPT_MEM_POLL ScriptMemPoll; WidthInByte = (UINT8) (0x01 << (Width & 0x03)); - + Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_MEM_POLL) + (WidthInByte * 2)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; @@ -1695,14 +1695,14 @@ S3BootScriptSaveMemPoll ( // ScriptMemPoll.OpCode = EFI_BOOT_SCRIPT_MEM_POLL_OPCODE; ScriptMemPoll.Length = Length; - ScriptMemPoll.Width = Width; + ScriptMemPoll.Width = Width; ScriptMemPoll.Address = Address; ScriptMemPoll.Duration = Duration; ScriptMemPoll.LoopTimes = LoopTimes; CopyMem ((UINT8 *) (Script + sizeof (EFI_BOOT_SCRIPT_MEM_POLL)), BitValue, WidthInByte); CopyMem ((UINT8 *) (Script + sizeof (EFI_BOOT_SCRIPT_MEM_POLL) + WidthInByte), BitMask, WidthInByte); - CopyMem ((VOID*)Script, (VOID*)&ScriptMemPoll, sizeof (EFI_BOOT_SCRIPT_MEM_POLL)); + CopyMem ((VOID*)Script, (VOID*)&ScriptMemPoll, sizeof (EFI_BOOT_SCRIPT_MEM_POLL)); SyncBootScript (Script); @@ -1711,10 +1711,10 @@ S3BootScriptSaveMemPoll ( /** Store arbitrary information in the boot script table. This opcode is a no-op on dispatch and is only used for debugging script issues. - + @param InformationLength Length of the data in bytes @param Information Information to be logged in the boot scrpit - + @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. @@ -1722,7 +1722,7 @@ S3BootScriptSaveMemPoll ( RETURN_STATUS EFIAPI S3BootScriptSaveInformation ( - IN UINT32 InformationLength, + IN UINT32 InformationLength, IN VOID *Information ) { @@ -1743,7 +1743,7 @@ S3BootScriptSaveInformation ( ScriptInformation.Length = Length; - ScriptInformation.InformationLength = InformationLength; + ScriptInformation.InformationLength = InformationLength; CopyMem ((VOID*)Script, (VOID*)&ScriptInformation, sizeof (EFI_BOOT_SCRIPT_INFORMATION)); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_INFORMATION)), (VOID *) Information, (UINTN) InformationLength); @@ -1756,9 +1756,9 @@ S3BootScriptSaveInformation ( /** Store a string in the boot script table. This opcode is a no-op on dispatch and is only used for debugging script issues. - + @param String The string to save to boot script table - + @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. @@ -1769,8 +1769,8 @@ S3BootScriptSaveInformationAsciiString ( IN CONST CHAR8 *String ) { - return S3BootScriptSaveInformation ( - (UINT32) AsciiStrLen (String) + 1, + return S3BootScriptSaveInformation ( + (UINT32) AsciiStrLen (String) + 1, (VOID*) String ); } @@ -1778,7 +1778,7 @@ S3BootScriptSaveInformationAsciiString ( Adds a record for dispatching specified arbitrary code into a specified boot script table. @param EntryPoint Entry point of the code to be dispatched. - + @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. **/ @@ -1791,22 +1791,22 @@ S3BootScriptSaveDispatch ( UINT8 Length; UINT8 *Script; EFI_BOOT_SCRIPT_DISPATCH ScriptDispatch; - + Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_DISPATCH)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data // ScriptDispatch.OpCode = EFI_BOOT_SCRIPT_DISPATCH_OPCODE; ScriptDispatch.Length = Length; ScriptDispatch.EntryPoint = (EFI_PHYSICAL_ADDRESS)(UINTN)EntryPoint; - - CopyMem ((VOID*)Script, (VOID*)&ScriptDispatch, sizeof (EFI_BOOT_SCRIPT_DISPATCH)); - + + CopyMem ((VOID*)Script, (VOID*)&ScriptDispatch, sizeof (EFI_BOOT_SCRIPT_DISPATCH)); + SyncBootScript (Script); return RETURN_SUCCESS; @@ -1815,8 +1815,8 @@ S3BootScriptSaveDispatch ( /** Adds a record for I/O reads the I/O location and continues when the exit criteria is satisfied or after a defined duration. - - @param Width The width of the I/O operations. + + @param Width The width of the I/O operations. @param Address The base address of the I/O operations. @param Data The comparison value used for the polling exit criteria. @param DataMask Mask used for the polling criteria. The bits in the bytes below Width which are zero @@ -1834,36 +1834,36 @@ S3BootScriptSaveIoPoll ( IN S3_BOOT_SCRIPT_LIB_WIDTH Width, IN UINT64 Address, IN VOID *Data, - IN VOID *DataMask, - IN UINT64 Delay + IN VOID *DataMask, + IN UINT64 Delay ) { - UINT8 WidthInByte; + UINT8 WidthInByte; UINT8 *Script; UINT8 Length; EFI_BOOT_SCRIPT_IO_POLL ScriptIoPoll; - - WidthInByte = (UINT8) (0x01 << (Width & 0x03)); + + WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_IO_POLL) + (WidthInByte * 2)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data // ScriptIoPoll.OpCode = EFI_BOOT_SCRIPT_IO_POLL_OPCODE; ScriptIoPoll.Length = (UINT8) (sizeof (EFI_BOOT_SCRIPT_IO_POLL) + (WidthInByte * 2)); - ScriptIoPoll.Width = Width; + ScriptIoPoll.Width = Width; ScriptIoPoll.Address = Address; ScriptIoPoll.Delay = Delay; - CopyMem ((VOID*)Script, (VOID*)&ScriptIoPoll, sizeof (EFI_BOOT_SCRIPT_IO_POLL)); + CopyMem ((VOID*)Script, (VOID*)&ScriptIoPoll, sizeof (EFI_BOOT_SCRIPT_IO_POLL)); CopyMem ((UINT8 *) (Script + sizeof (EFI_BOOT_SCRIPT_IO_POLL)), Data, WidthInByte); CopyMem ((UINT8 *) (Script + sizeof (EFI_BOOT_SCRIPT_IO_POLL) + WidthInByte), DataMask, WidthInByte); - + SyncBootScript (Script); return RETURN_SUCCESS; @@ -1873,7 +1873,7 @@ S3BootScriptSaveIoPoll ( Adds a record for PCI configuration space reads and continues when the exit criteria is satisfied or after a defined duration. - @param Width The width of the I/O operations. + @param Width The width of the I/O operations. @param Address The address within the PCI configuration space. @param Data The comparison value used for the polling exit criteria. @param DataMask Mask used for the polling criteria. The bits in the bytes below Width which are zero @@ -1897,7 +1897,7 @@ S3BootScriptSavePciPoll ( ) { UINT8 *Script; - UINT8 WidthInByte; + UINT8 WidthInByte; UINT8 Length; EFI_BOOT_SCRIPT_PCI_CONFIG_POLL ScriptPciPoll; @@ -1909,7 +1909,7 @@ S3BootScriptSavePciPoll ( WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_POLL) + (WidthInByte * 2)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; @@ -1919,14 +1919,14 @@ S3BootScriptSavePciPoll ( // ScriptPciPoll.OpCode = EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE; ScriptPciPoll.Length = (UINT8) (sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_POLL) + (WidthInByte * 2)); - ScriptPciPoll.Width = Width; + ScriptPciPoll.Width = Width; ScriptPciPoll.Address = Address; ScriptPciPoll.Delay = Delay; CopyMem ((VOID*)Script, (VOID*)&ScriptPciPoll, sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_POLL)); CopyMem ((UINT8 *) (Script + sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_POLL)), Data, WidthInByte); CopyMem ((UINT8 *) (Script + sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG_POLL) + WidthInByte), DataMask, WidthInByte); - + SyncBootScript (Script); return RETURN_SUCCESS; @@ -1935,7 +1935,7 @@ S3BootScriptSavePciPoll ( Adds a record for PCI configuration space reads and continues when the exit criteria is satisfied or after a defined duration. - @param Width The width of the I/O operations. + @param Width The width of the I/O operations. @param Segment The PCI segment number for Address. @param Address The address within the PCI configuration space. @param Data The comparison value used for the polling exit criteria. @@ -1960,7 +1960,7 @@ S3BootScriptSavePci2Poll ( IN UINT64 Delay ) { - UINT8 WidthInByte; + UINT8 WidthInByte; UINT8 *Script; UINT8 Length; EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL ScriptPci2Poll; @@ -1974,17 +1974,17 @@ S3BootScriptSavePci2Poll ( WidthInByte = (UINT8) (0x01 << (Width & 0x03)); Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL) + (WidthInByte * 2)); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; - } + } // // Build script data // ScriptPci2Poll.OpCode = EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE; ScriptPci2Poll.Length = (UINT8) (sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL) + (WidthInByte * 2)); - ScriptPci2Poll.Width = Width; + ScriptPci2Poll.Width = Width; ScriptPci2Poll.Segment = Segment; ScriptPci2Poll.Address = Address; ScriptPci2Poll.Delay = Delay; @@ -1992,17 +1992,17 @@ S3BootScriptSavePci2Poll ( CopyMem ((VOID*)Script, (VOID*)&ScriptPci2Poll, sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL)); CopyMem ((UINT8 *) (Script + sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL)), Data, WidthInByte); CopyMem ((UINT8 *) (Script + sizeof (EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL) + WidthInByte), DataMask, WidthInByte); - + SyncBootScript (Script); return RETURN_SUCCESS; } /** Do the calculation of start address from which a new s3 boot script entry will write into. - + @param EntryLength The new entry length. @param Position specifies the position in the boot script table where the opcode will be - inserted, either before or after, depending on BeforeOrAfter. + inserted, either before or after, depending on BeforeOrAfter. @param BeforeOrAfter The flag to indicate to insert the nod before or after the position. This parameter is effective when InsertFlag is TRUE @param Script return out the position from which the a new s3 boot script entry will write into @@ -2012,58 +2012,58 @@ S3BootScriptCalculateInsertAddress ( IN UINT8 EntryLength, IN VOID *Position OPTIONAL, IN BOOLEAN BeforeOrAfter OPTIONAL, - OUT UINT8 **Script + OUT UINT8 **Script ) { UINTN TableLength; UINT8 *S3TableBase; - UINTN PositionOffset; + UINTN PositionOffset; EFI_BOOT_SCRIPT_COMMON_HEADER ScriptHeader; // // The entry inserting to table is already added to the end of the table // TableLength = mS3BootScriptTablePtr->TableLength - EntryLength; S3TableBase = mS3BootScriptTablePtr->TableBase ; - // + // // calculate the Position offset // if (Position != NULL) { PositionOffset = (UINTN) ((UINT8 *)Position - S3TableBase); - + // // If the BeforeOrAfter is FALSE, that means to insert the node right after the node. // if (!BeforeOrAfter) { - CopyMem ((VOID*)&ScriptHeader, Position, sizeof(EFI_BOOT_SCRIPT_COMMON_HEADER)); + CopyMem ((VOID*)&ScriptHeader, Position, sizeof(EFI_BOOT_SCRIPT_COMMON_HEADER)); PositionOffset += (ScriptHeader.Length); } - // + // // Insert the node before the adjusted Position // - CopyMem (S3TableBase+PositionOffset+EntryLength, S3TableBase+PositionOffset, TableLength - PositionOffset); + CopyMem (S3TableBase+PositionOffset+EntryLength, S3TableBase+PositionOffset, TableLength - PositionOffset); // - // calculate the the start address for the new entry. + // calculate the the start address for the new entry. // *Script = S3TableBase + PositionOffset; - + } else { if (!BeforeOrAfter) { // // Insert the node to the end of the table // - *Script = S3TableBase + TableLength; + *Script = S3TableBase + TableLength; } else { - // + // // Insert the node to the beginning of the table // PositionOffset = (UINTN) sizeof(EFI_BOOT_SCRIPT_TABLE_HEADER); - CopyMem (S3TableBase+PositionOffset+EntryLength, S3TableBase+PositionOffset, TableLength - PositionOffset); - *Script = S3TableBase + PositionOffset; + CopyMem (S3TableBase+PositionOffset+EntryLength, S3TableBase+PositionOffset, TableLength - PositionOffset); + *Script = S3TableBase + PositionOffset; } - } + } } /** - Move the last boot script entry to the position + Move the last boot script entry to the position @param BeforeOrAfter Specifies whether the opcode is stored before (TRUE) or after (FALSE) the position in the boot script table specified by Position. If Position is NULL or points to @@ -2085,14 +2085,14 @@ S3BootScriptMoveLastOpcode ( ) { UINT8* Script; - VOID *TempPosition; + VOID *TempPosition; UINTN StartAddress; UINT32 TableLength; EFI_BOOT_SCRIPT_COMMON_HEADER ScriptHeader; BOOLEAN ValidatePosition; UINT8* LastOpcode; UINT8 TempBootScriptEntry[BOOT_SCRIPT_NODE_MAX_LENGTH]; - + ValidatePosition = FALSE; TempPosition = (Position == NULL) ? NULL:(*Position); @@ -2112,17 +2112,17 @@ S3BootScriptMoveLastOpcode ( // // Find the last boot Script Entry which is not the terminate node // - while ((UINTN) Script < (UINTN) (StartAddress + TableLength)) { - CopyMem ((VOID*)&ScriptHeader, Script, sizeof(EFI_BOOT_SCRIPT_COMMON_HEADER)); + while ((UINTN) Script < (UINTN) (StartAddress + TableLength)) { + CopyMem ((VOID*)&ScriptHeader, Script, sizeof(EFI_BOOT_SCRIPT_COMMON_HEADER)); if (TempPosition != NULL && TempPosition == Script) { // - // If the position is specified, the position must be pointed to a boot script entry start address. + // If the position is specified, the position must be pointed to a boot script entry start address. // ValidatePosition = TRUE; } if (ScriptHeader.OpCode != S3_BOOT_SCRIPT_LIB_TERMINATE_OPCODE) { LastOpcode = Script; - } + } Script = Script + ScriptHeader.Length; } // @@ -2131,10 +2131,10 @@ S3BootScriptMoveLastOpcode ( if (TempPosition != NULL && !ValidatePosition) { return RETURN_INVALID_PARAMETER; } - - CopyMem ((VOID*)&ScriptHeader, LastOpcode, sizeof(EFI_BOOT_SCRIPT_COMMON_HEADER)); - - CopyMem((VOID*)TempBootScriptEntry, LastOpcode, ScriptHeader.Length); + + CopyMem ((VOID*)&ScriptHeader, LastOpcode, sizeof(EFI_BOOT_SCRIPT_COMMON_HEADER)); + + CopyMem((VOID*)TempBootScriptEntry, LastOpcode, ScriptHeader.Length); // // Find the right position to write the node in // @@ -2142,7 +2142,7 @@ S3BootScriptMoveLastOpcode ( ScriptHeader.Length, TempPosition, BeforeOrAfter, - &Script + &Script ); // // Copy the node to Boot script table @@ -2160,18 +2160,18 @@ S3BootScriptMoveLastOpcode ( return RETURN_SUCCESS; } /** - Create a Label node in the boot script table. - + Create a Label node in the boot script table. + @param BeforeOrAfter Specifies whether the opcode is stored before (TRUE) or after (FALSE) the position in the boot script table specified by Position. If Position is NULL or points to NULL then the new opcode is inserted at the beginning of the table (if TRUE) or end of the table (if FALSE). @param Position On entry, specifies the position in the boot script table where the opcode will be inserted, either before or after, depending on BeforeOrAfter. On exit, specifies - the position of the inserted opcode in the boot script table. + the position of the inserted opcode in the boot script table. @param InformationLength Length of the label in bytes @param Information Label to be logged in the boot scrpit - + @retval RETURN_INVALID_PARAMETER The Position is not a valid position in the boot script table. @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. @@ -2181,17 +2181,17 @@ RETURN_STATUS EFIAPI S3BootScriptLabelInternal ( IN BOOLEAN BeforeOrAfter, - IN OUT VOID **Position OPTIONAL, - IN UINT32 InformationLength, + IN OUT VOID **Position OPTIONAL, + IN UINT32 InformationLength, IN CONST CHAR8 *Information ) { UINT8 Length; UINT8 *Script; EFI_BOOT_SCRIPT_INFORMATION ScriptInformation; - + Length = (UINT8)(sizeof (EFI_BOOT_SCRIPT_INFORMATION) + InformationLength); - + Script = S3BootScriptGetEntryAddAddress (Length); if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; @@ -2203,7 +2203,7 @@ S3BootScriptLabelInternal ( ScriptInformation.Length = Length; - ScriptInformation.InformationLength = InformationLength; + ScriptInformation.InformationLength = InformationLength; CopyMem ((VOID*)Script, (VOID*)&ScriptInformation, sizeof (EFI_BOOT_SCRIPT_INFORMATION)); CopyMem ((VOID*)(Script + sizeof (EFI_BOOT_SCRIPT_INFORMATION)), (VOID *) Information, (UINTN) InformationLength); @@ -2217,9 +2217,9 @@ S3BootScriptLabelInternal ( Find a label within the boot script table and, if not present, optionally create it. @param BeforeOrAfter Specifies whether the opcode is stored before (TRUE) - or after (FALSE) the position in the boot script table + or after (FALSE) the position in the boot script table specified by Position. - @param CreateIfNotFound Specifies whether the label will be created if the label + @param CreateIfNotFound Specifies whether the label will be created if the label does not exists (TRUE) or not (FALSE). @param Position On entry, specifies the position in the boot script table where the opcode will be inserted, either before or after, @@ -2230,13 +2230,13 @@ S3BootScriptLabelInternal ( @retval EFI_SUCCESS The operation succeeded. A record was added into the specified script table. @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script is not supported. - If the opcode is unknow or not supported because of the PCD + If the opcode is unknow or not supported because of the PCD Feature Flags. @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script. **/ RETURN_STATUS -EFIAPI +EFIAPI S3BootScriptLabel ( IN BOOLEAN BeforeOrAfter, IN BOOLEAN CreateIfNotFound, @@ -2262,7 +2262,7 @@ S3BootScriptLabel ( if (Label[0] == '\0') { return EFI_INVALID_PARAMETER; } - + // // Check that the script is initialized and synced without adding an entry to the script. // The code must search for the label first before it knows if a new entry needs @@ -2272,10 +2272,10 @@ S3BootScriptLabel ( if (Script == NULL) { return RETURN_OUT_OF_RESOURCES; } - + // // Check the header and search for existing label. - // + // Script = mS3BootScriptTablePtr->TableBase; CopyMem ((VOID*)&TableHeader, Script, sizeof(EFI_BOOT_SCRIPT_TABLE_HEADER)); if (TableHeader.OpCode != S3_BOOT_SCRIPT_LIB_TABLE_OPCODE) { @@ -2285,22 +2285,22 @@ S3BootScriptLabel ( TableLength = mS3BootScriptTablePtr->TableLength; Script = Script + TableHeader.Length; while ((UINTN) Script < (UINTN) (StartAddress + TableLength)) { - - CopyMem ((VOID*)&ScriptHeader, Script, sizeof(EFI_BOOT_SCRIPT_COMMON_HEADER)); + + CopyMem ((VOID*)&ScriptHeader, Script, sizeof(EFI_BOOT_SCRIPT_COMMON_HEADER)); if (ScriptHeader.OpCode == S3_BOOT_SCRIPT_LIB_LABEL_OPCODE) { if (AsciiStrCmp ((CHAR8 *)(UINTN)(Script+sizeof(EFI_BOOT_SCRIPT_INFORMATION)), Label) == 0) { - (*Position) = Script; + (*Position) = Script; return EFI_SUCCESS; } - } + } Script = Script + ScriptHeader.Length; } if (CreateIfNotFound) { LabelLength = (UINT32)AsciiStrSize(Label); - return S3BootScriptLabelInternal (BeforeOrAfter,Position, LabelLength, Label); + return S3BootScriptLabelInternal (BeforeOrAfter,Position, LabelLength, Label); } else { return EFI_NOT_FOUND; - } + } } /** @@ -2312,13 +2312,13 @@ S3BootScriptLabel ( @retval EFI_SUCCESS The operation succeeded. A record was added into the specified script table. @retval EFI_INVALID_PARAMETER The parameter is illegal or the given boot script is not supported. - If the opcode is unknow or not supported because of the PCD + If the opcode is unknow or not supported because of the PCD Feature Flags. @retval EFI_OUT_OF_RESOURCES There is insufficient memory to store the boot script. **/ RETURN_STATUS -EFIAPI +EFIAPI S3BootScriptCompare ( IN UINT8 *Position1, IN UINT8 *Position2, @@ -2326,7 +2326,7 @@ S3BootScriptCompare ( ) { UINT8* Script; - UINT32 TableLength; + UINT32 TableLength; if (RelativePosition == NULL) { return EFI_INVALID_PARAMETER; @@ -2352,7 +2352,7 @@ S3BootScriptCompare ( return EFI_INVALID_PARAMETER; } *RelativePosition = (Position1 < Position2)?-1:((Position1 == Position2)?0:1); - + return EFI_SUCCESS; } diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf index de314db47922..4125cdd70f10 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf @@ -53,7 +53,7 @@ [LibraryClasses] UefiLib SmbusLib PciLib - IoLib + IoLib LockBoxLib [Protocols] diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.uni b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.uni index 95b589c0ca9c..b6e576ed8ad8 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.uni +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.uni @@ -9,7 +9,7 @@ // licensed and made available under the terms and conditions of the BSD License // which accompanies this distribution. The full text of the license may be found at // http://opensource.org/licenses/bsd-license.php -// +// // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. // diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h index e54027848346..9b150480dbca 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h @@ -1,7 +1,7 @@ /** @file - Support for S3 boot script lib. This file defined some internal macro and internal + Support for S3 boot script lib. This file defined some internal macro and internal data structure - + Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> This program and the accompanying materials @@ -50,7 +50,7 @@ #define PCI_ADDRESS_ENCODE(A) (UINTN)PCI_LIB_ADDRESS( \ ((((UINTN)(A))& 0xff000000) >> 24), ((((UINTN)(A)) &0x00ff0000) >> 16), ((((UINTN)(A)) & 0xff00) >> 8), ((RShiftU64 ((A), 32) & 0xfff) | ((A)& 0xff)) \ ) - + typedef union { @@ -73,8 +73,8 @@ typedef union { // typedef struct { UINT8 *TableBase; - UINT32 TableLength; // Record the actual memory length - UINT16 TableMemoryPageNumber; // Record the page number Allocated for the table + UINT32 TableLength; // Record the actual memory length + UINT16 TableMemoryPageNumber; // Record the page number Allocated for the table BOOLEAN InSmm; // Record if this library is in SMM. BOOLEAN AtRuntime; // Record if current state is after SmmExitBootServices or SmmLegacyBoot. UINT32 BootTimeScriptLength; // Maintain boot time script length in LockBox after SmmReadyToLock in SMM. -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment 2016-08-19 7:35 [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng 2016-08-19 7:35 ` [PATCH 1/6] MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces Star Zeng @ 2016-08-19 7:35 ` Star Zeng 2016-08-23 1:58 ` Kinney, Michael D 2016-08-19 7:35 ` [PATCH 3/6] Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc Star Zeng ` (5 subsequent siblings) 7 siblings, 1 reply; 15+ messages in thread From: Star Zeng @ 2016-08-19 7:35 UTC (permalink / raw) To: edk2-devel Cc: Star Zeng, Jiewen Yao, Michael D Kinney, Chan Amy, Laszlo Ersek Support multiple PCI segment for PCI_CONFIG2 opcodes. PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib instead of PciLib. That means platforms need to add PciSegmentLib declaration like below in platform dsc if the PciSegmentLib was not declared in platform dsc before. PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf For platforms only have one segment, MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended to be used and declared in platform dsc for PiDxeS3BootScriptLib to have equivalent functionality with before. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Chan Amy <chan.amy@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> --- .../PiDxeS3BootScriptLib/BootScriptExecute.c | 135 ++++++++++----------- .../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 15 +-- .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 2 +- .../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 18 +-- 4 files changed, 80 insertions(+), 90 deletions(-) diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c index 9e63273bc19c..b865d4452fc8 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c @@ -1,7 +1,7 @@ /** @file Interpret and execute the S3 data in S3 boot script. - Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> + Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR> This program and the accompanying materials are licensed and made available under the terms and conditions @@ -639,9 +639,10 @@ BootScriptExecuteMemoryWrite ( } /** - Performance PCI configuration read operation + Performance PCI configuration 2 read operation @param Width Width of the operation. + @param Segment Pci segment number @param Address Address of the operation. @param Count Count of the number of accesses to perform. @param Buffer Pointer to the buffer read from PCI config space @@ -652,8 +653,9 @@ BootScriptExecuteMemoryWrite ( **/ EFI_STATUS -ScriptPciCfgRead ( +ScriptPciCfg2Read ( IN S3_BOOT_SCRIPT_LIB_WIDTH Width, + IN UINT16 Segment, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer @@ -663,11 +665,11 @@ ScriptPciCfgRead ( UINTN AddressStride; UINTN BufferStride; PTR Out; - UINTN PciAddress; + UINT64 PciAddress; Out.Buf = (UINT8 *) Buffer; - PciAddress = PCI_ADDRESS_ENCODE (Address); + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); if (EFI_ERROR (Status)) { @@ -679,42 +681,42 @@ ScriptPciCfgRead ( for (; Count > 0; Count--, PciAddress += AddressStride, Out.Buf += BufferStride) { switch (Width) { case S3BootScriptWidthUint8: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x\n", PciAddress)); - *Out.Uint8 = PciRead8 (PciAddress); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx\n", PciAddress)); + *Out.Uint8 = PciSegmentRead8 (PciAddress); break; case S3BootScriptWidthFifoUint8: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x\n", PciAddress)); - *Out.Uint8 = PciRead8 (PciAddress); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx\n", PciAddress)); + *Out.Uint8 = PciSegmentRead8 (PciAddress); break; case S3BootScriptWidthFillUint8: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x\n", PciAddress)); - *Out.Uint8 = PciRead8 (PciAddress); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx\n", PciAddress)); + *Out.Uint8 = PciSegmentRead8 (PciAddress); break; case S3BootScriptWidthUint16: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x\n", PciAddress)); - *Out.Uint16 = PciRead16 (PciAddress); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx\n", PciAddress)); + *Out.Uint16 = PciSegmentRead16 (PciAddress); break; case S3BootScriptWidthFifoUint16: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x\n", PciAddress)); - *Out.Uint16 = PciRead16 (PciAddress); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%016lx\n", PciAddress)); + *Out.Uint16 = PciSegmentRead16 (PciAddress); break; case S3BootScriptWidthFillUint16: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x\n", PciAddress)); - *Out.Uint16 = PciRead16 (PciAddress); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%016lx\n", PciAddress)); + *Out.Uint16 = PciSegmentRead16 (PciAddress); break; case S3BootScriptWidthUint32: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x\n", PciAddress)); - *Out.Uint32 = PciRead32 (PciAddress); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx\n", PciAddress)); + *Out.Uint32 = PciSegmentRead32 (PciAddress); break; case S3BootScriptWidthFifoUint32: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x\n", PciAddress)); - *Out.Uint32 = PciRead32 (PciAddress); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%016lx\n", PciAddress)); + *Out.Uint32 = PciSegmentRead32 (PciAddress); break; case S3BootScriptWidthFillUint32: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x\n", PciAddress)); - *Out.Uint32 = PciRead32 (PciAddress); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%016lx\n", PciAddress)); + *Out.Uint32 = PciSegmentRead32 (PciAddress); break; default: @@ -725,9 +727,10 @@ ScriptPciCfgRead ( } /** - Performance PCI configuration write operation + Performance PCI configuration 2 write operation @param Width Width of the operation. + @param Segment Pci segment number @param Address Address of the operation. @param Count Count of the number of accesses to perform. @param Buffer Pointer to the buffer write to PCI config space @@ -738,8 +741,9 @@ ScriptPciCfgRead ( **/ EFI_STATUS -ScriptPciCfgWrite ( +ScriptPciCfg2Write ( IN S3_BOOT_SCRIPT_LIB_WIDTH Width, + IN UINT16 Segment, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer @@ -748,14 +752,14 @@ ScriptPciCfgWrite ( EFI_STATUS Status; UINTN AddressStride; UINTN BufferStride; - UINTN OriginalPciAddress; + UINT64 OriginalPciAddress; PTR In; PTR OriginalIn; - UINTN PciAddress; + UINT64 PciAddress; In.Buf = (UINT8 *) Buffer; - PciAddress = PCI_ADDRESS_ENCODE (Address); + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); if (EFI_ERROR (Status)) { @@ -769,40 +773,40 @@ ScriptPciCfgWrite ( for (; Count > 0; Count--, PciAddress += AddressStride, In.Buf += BufferStride) { switch (Width) { case S3BootScriptWidthUint8: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x (0x%02x)\n", PciAddress, (UINTN)*In.Uint8)); - PciWrite8 (PciAddress, *In.Uint8); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx (0x%02x)\n", PciAddress, (UINTN)*In.Uint8)); + PciSegmentWrite8 (PciAddress, *In.Uint8); break; case S3BootScriptWidthFifoUint8: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x (0x%02x)\n", OriginalPciAddress, (UINTN)*In.Uint8)); - PciWrite8 (OriginalPciAddress, *In.Uint8); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx (0x%02x)\n", OriginalPciAddress, (UINTN)*In.Uint8)); + PciSegmentWrite8 (OriginalPciAddress, *In.Uint8); break; case S3BootScriptWidthFillUint8: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x (0x%02x)\n", PciAddress, (UINTN)*OriginalIn.Uint8)); - PciWrite8 (PciAddress, *OriginalIn.Uint8); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx (0x%02x)\n", PciAddress, (UINTN)*OriginalIn.Uint8)); + PciSegmentWrite8 (PciAddress, *OriginalIn.Uint8); break; case S3BootScriptWidthUint16: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x (0x%04x)\n", PciAddress, (UINTN)*In.Uint16)); - PciWrite16 (PciAddress, *In.Uint16); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx (0x%04x)\n", PciAddress, (UINTN)*In.Uint16)); + PciSegmentWrite16 (PciAddress, *In.Uint16); break; case S3BootScriptWidthFifoUint16: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x (0x%04x)\n", OriginalPciAddress, (UINTN)*In.Uint16)); - PciWrite16 (OriginalPciAddress, *In.Uint16); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%016lx (0x%04x)\n", OriginalPciAddress, (UINTN)*In.Uint16)); + PciSegmentWrite16 (OriginalPciAddress, *In.Uint16); break; case S3BootScriptWidthFillUint16: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x (0x%04x)\n", PciAddress, (UINTN)*OriginalIn.Uint16)); - PciWrite16 (PciAddress, *OriginalIn.Uint16); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%016lx (0x%04x)\n", PciAddress, (UINTN)*OriginalIn.Uint16)); + PciSegmentWrite16 (PciAddress, *OriginalIn.Uint16); break; case S3BootScriptWidthUint32: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x (0x%08x)\n", PciAddress, (UINTN)*In.Uint32)); - PciWrite32 (PciAddress, *In.Uint32); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx (0x%08x)\n", PciAddress, (UINTN)*In.Uint32)); + PciSegmentWrite32 (PciAddress, *In.Uint32); break; case S3BootScriptWidthFifoUint32: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x (0x%08x)\n", OriginalPciAddress, (UINTN)*In.Uint32)); - PciWrite32 (OriginalPciAddress, *In.Uint32); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%016lx (0x%08x)\n", OriginalPciAddress, (UINTN)*In.Uint32)); + PciSegmentWrite32 (OriginalPciAddress, *In.Uint32); break; case S3BootScriptWidthFillUint32: - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x (0x%08x)\n", (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); - PciWrite32 (PciAddress, *OriginalIn.Uint32); + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%016lx (0x%08x)\n", (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); + PciSegmentWrite32 (PciAddress, *OriginalIn.Uint32); break; default: return EFI_INVALID_PARAMETER; @@ -811,10 +815,9 @@ ScriptPciCfgWrite ( return EFI_SUCCESS; } /** - Performance PCI configuration 2 read operation + Performance PCI configuration read operation @param Width Width of the operation. - @param Segment Pci segment number @param Address Address of the operation. @param Count Count of the number of accesses to perform. @param Buffer Pointer to the buffer to read from PCI config space. @@ -824,27 +827,22 @@ ScriptPciCfgWrite ( Buffer is NULL. The Buffer is not aligned for the given Width. Address is outside the legal range of I/O ports. - @note A known Limitations in the implementation which is the 'Segment' parameter is assumed as - Zero, or else, assert. + **/ EFI_STATUS -ScriptPciCfg2Read ( +ScriptPciCfgRead ( IN S3_BOOT_SCRIPT_LIB_WIDTH Width, - IN UINT16 Segment, IN UINT64 Address, IN UINTN Count, OUT VOID *Buffer ) { - ASSERT (Segment==0); - - return ScriptPciCfgRead (Width, Address, Count, Buffer); + return ScriptPciCfg2Read (Width, 0, Address, Count, Buffer); } /** - Performance PCI configuration 2 write operation + Performance PCI configuration write operation @param Width Width of the operation. - @param Segment Pci segment number @param Address Address of the operation. @param Count Count of the number of accesses to perform. @param Buffer Pointer to the buffer to write to PCI config space. @@ -854,22 +852,18 @@ ScriptPciCfg2Read ( Buffer is NULL. The Buffer is not aligned for the given Width. Address is outside the legal range of I/O ports. - @note A known Limitations in the implementation which is the 'Segment' parameter is assumed as - Zero, or else, assert. **/ EFI_STATUS EFIAPI -ScriptPciCfg2Write ( +ScriptPciCfgWrite ( IN S3_BOOT_SCRIPT_LIB_WIDTH Width, - IN UINT16 Segment, IN UINT64 Address, IN UINTN Count, IN VOID *Buffer ) { - ASSERT (Segment==0); - return ScriptPciCfgWrite (Width, Address, Count, Buffer); + return ScriptPciCfg2Write (Width, 0, Address, Count, Buffer); } /** Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE OP code. @@ -896,7 +890,7 @@ BootScriptExecutePciCfgWrite ( Count = PciCfgWrite.Count; Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE); - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%08x, 0x%08x, 0x%08x\n", PCI_ADDRESS_ENCODE (Address), Count, (UINTN)Width)); + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%016lx, 0x%08x, 0x%08x\n", PCI_ADDRESS_ENCODE (0, Address), Count, (UINTN)Width)); return ScriptPciCfgWrite (Width, Address, Count, Buffer); } /** @@ -1012,7 +1006,7 @@ BootScriptExecutePciCfgReadWrite ( CopyMem((VOID*)&PciCfgReadWrite, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE)); - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%08x, 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgReadWrite.Address), AndMask, OrMask)); + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%016lx, 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (0, PciCfgReadWrite.Address), AndMask, OrMask)); Status = ScriptPciCfgRead ( (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfgReadWrite.Width, @@ -1422,7 +1416,7 @@ BootScriptExecutePciCfg2Write ( Count = PciCfg2Write.Count; Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE); - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%04x, 0x%08x, 0x%08x, 0x%08x\n", Segment, PCI_ADDRESS_ENCODE (Address), Count, (UINTN)Width)); + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%016lx, 0x%08x, 0x%08x\n", PCI_ADDRESS_ENCODE (Segment, Address), Count, (UINTN)Width)); return ScriptPciCfg2Write (Width, Segment, Address, Count, Buffer); } @@ -1452,7 +1446,7 @@ BootScriptExecutePciCfg2ReadWrite ( CopyMem ((VOID*)&PciCfg2ReadWrite, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE)); - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%04x, 0x%08x, 0x%016lx, 0x%016lx\n", PciCfg2ReadWrite.Segment, PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Address), AndMask, OrMask)); + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%016lx, 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Segment, PciCfg2ReadWrite.Address), AndMask, OrMask)); Status = ScriptPciCfg2Read ( (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2ReadWrite.Width, @@ -1499,7 +1493,7 @@ BootScriptPciCfgPoll ( EFI_BOOT_SCRIPT_PCI_CONFIG_POLL PciCfgPoll; CopyMem ((VOID*)&PciCfgPoll, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_POLL)); - DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%08x, 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgPoll.Address), AndMask, OrMask)); + DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%016lx, 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (0, PciCfgPoll.Address), AndMask, OrMask)); Data = 0; Status = ScriptPciCfgRead ( @@ -1561,7 +1555,7 @@ BootScriptPciCfg2Poll ( Data = 0; CopyMem ((VOID*)&PciCfg2Poll, (VOID*)Script, sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL)); - DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%04x, 0x%08x, 0x%016lx, 0x%016lx\n", PciCfg2Poll.Segment, PCI_ADDRESS_ENCODE (PciCfg2Poll.Address), AndMask, OrMask)); + DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%016lx, 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfg2Poll.Segment, PciCfg2Poll.Address), AndMask, OrMask)); Status = ScriptPciCfg2Read ( (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2Poll.Width, @@ -1604,9 +1598,6 @@ BootScriptPciCfg2Poll ( @retval RETURN_SUCCESS The boot script table was executed successfully. @retval RETURN_UNSUPPORTED Invalid script table or opcode. - @note A known Limitations in the implementation: When interpreting the opcode EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE - EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE and EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as - Zero, or else, assert. **/ RETURN_STATUS EFIAPI diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c index de3915511cec..9ff5b80e7a36 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c @@ -1291,7 +1291,7 @@ S3BootScriptSavePciCfgReadWrite ( @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. - @note A known Limitations in the implementation which is non-zero Segment and 64bits operations are not supported. + @note A known Limitations in the implementation which is 64bits operations are not supported. **/ RETURN_STATUS @@ -1309,8 +1309,7 @@ S3BootScriptSavePciCfg2Write ( UINT8 WidthInByte; EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE ScriptPciWrite2; - if (Segment != 0 || - Width == S3BootScriptWidthUint64 || + if (Width == S3BootScriptWidthUint64 || Width == S3BootScriptWidthFifoUint64 || Width == S3BootScriptWidthFillUint64) { return EFI_INVALID_PARAMETER; @@ -1351,7 +1350,7 @@ S3BootScriptSavePciCfg2Write ( @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. - @note A known Limitations in the implementation which is non-zero Segment and 64bits operations are not supported. + @note A known Limitations in the implementation which is 64bits operations are not supported. **/ RETURN_STATUS @@ -1369,8 +1368,7 @@ S3BootScriptSavePciCfg2ReadWrite ( UINT8 WidthInByte; EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE ScriptPciReadWrite2; - if (Segment != 0 || - Width == S3BootScriptWidthUint64 || + if (Width == S3BootScriptWidthUint64 || Width == S3BootScriptWidthFifoUint64 || Width == S3BootScriptWidthFillUint64) { return EFI_INVALID_PARAMETER; @@ -1946,7 +1944,7 @@ S3BootScriptSavePciPoll ( @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. @retval RETURN_SUCCESS Opcode is added. - @note A known Limitations in the implementation which is non-zero Segment and 64bits operations are not supported. + @note A known Limitations in the implementation which is 64bits operations are not supported. **/ RETURN_STATUS @@ -1965,8 +1963,7 @@ S3BootScriptSavePci2Poll ( UINT8 Length; EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL ScriptPci2Poll; - if (Segment != 0 || - Width == S3BootScriptWidthUint64 || + if (Width == S3BootScriptWidthUint64 || Width == S3BootScriptWidthFifoUint64 || Width == S3BootScriptWidthFillUint64) { return EFI_INVALID_PARAMETER; diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf index 4125cdd70f10..0feff3661233 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf @@ -52,7 +52,7 @@ [LibraryClasses] PcdLib UefiLib SmbusLib - PciLib + PciSegmentLib IoLib LockBoxLib diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h index 9b150480dbca..ffbf5d2688da 100644 --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h @@ -2,7 +2,7 @@ Support for S3 boot script lib. This file defined some internal macro and internal data structure - Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> + Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR> This program and the accompanying materials are licensed and made available under the terms and conditions @@ -33,7 +33,7 @@ #include <Library/PcdLib.h> #include <Library/SmbusLib.h> #include <Library/IoLib.h> -#include <Library/PciLib.h> +#include <Library/PciSegmentLib.h> #include <Library/DebugLib.h> #include <Library/BaseMemoryLib.h> #include <Library/TimerLib.h> @@ -45,13 +45,15 @@ #define MAX_IO_ADDRESS 0xFFFF // -// Macro to convert a UEFI PCI address to a PCI Library PCI address +// Macro to convert a UEFI PCI address + segment to a PCI Segment Library PCI address // -#define PCI_ADDRESS_ENCODE(A) (UINTN)PCI_LIB_ADDRESS( \ - ((((UINTN)(A))& 0xff000000) >> 24), ((((UINTN)(A)) &0x00ff0000) >> 16), ((((UINTN)(A)) & 0xff00) >> 8), ((RShiftU64 ((A), 32) & 0xfff) | ((A)& 0xff)) \ - ) - - +#define PCI_ADDRESS_ENCODE(S, A) PCI_SEGMENT_LIB_ADDRESS( \ + S, \ + ((((UINTN)(A)) & 0xff000000) >> 24), \ + ((((UINTN)(A)) & 0x00ff0000) >> 16), \ + ((((UINTN)(A)) & 0xff00) >> 8), \ + ((RShiftU64 ((A), 32) & 0xfff) | ((A) & 0xff)) \ + ) typedef union { UINT8 volatile *Buf; -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment 2016-08-19 7:35 ` [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng @ 2016-08-23 1:58 ` Kinney, Michael D 2016-08-23 2:09 ` Zeng, Star 0 siblings, 1 reply; 15+ messages in thread From: Kinney, Michael D @ 2016-08-23 1:58 UTC (permalink / raw) To: Zeng, Star, edk2-devel@lists.01.org, Kinney, Michael D Cc: Yao, Jiewen, Chan Amy, Laszlo Ersek Star, I do not think all PCI opcodes should be updated to use the PciSegmentLib. Only the "2" versions of the PCI opcodes should use the PciSegmentLib. This means that functions like ScriptPciCfgRead() should not be modified at all and should still use the PciLib. You will need to add a new MACRO for encoding a PCI address with a segment#, maybe called PCI_SEGMENT_ADDRESS_ENCODE(S, A). Mike > -----Original Message----- > From: Zeng, Star > Sent: Friday, August 19, 2016 12:35 AM > To: edk2-devel@lists.01.org > Cc: Zeng, Star <star.zeng@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>; Kinney, > Michael D <michael.d.kinney@intel.com>; Chan Amy <chan.amy@intel.com>; Laszlo Ersek > <lersek@redhat.com> > Subject: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment > > Support multiple PCI segment for PCI_CONFIG2 opcodes. > > PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib > instead of PciLib. That means platforms need to add PciSegmentLib > declaration like below in platform dsc if the PciSegmentLib was > not declared in platform dsc before. > > PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf > > For platforms only have one segment, > MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended > to be used and declared in platform dsc for PiDxeS3BootScriptLib to have > equivalent functionality with before. > > Cc: Jiewen Yao <jiewen.yao@intel.com> > Cc: Michael D Kinney <michael.d.kinney@intel.com> > Cc: Chan Amy <chan.amy@intel.com> > Cc: Laszlo Ersek <lersek@redhat.com> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Star Zeng <star.zeng@intel.com> > --- > .../PiDxeS3BootScriptLib/BootScriptExecute.c | 135 ++++++++++----------- > .../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 15 +-- > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 2 +- > .../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 18 +-- > 4 files changed, 80 insertions(+), 90 deletions(-) > > diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > index 9e63273bc19c..b865d4452fc8 100644 > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > @@ -1,7 +1,7 @@ > /** @file > Interpret and execute the S3 data in S3 boot script. > > - Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> > + Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR> > > This program and the accompanying materials > are licensed and made available under the terms and conditions > @@ -639,9 +639,10 @@ BootScriptExecuteMemoryWrite ( > > } > /** > - Performance PCI configuration read operation > + Performance PCI configuration 2 read operation > > @param Width Width of the operation. > + @param Segment Pci segment number > @param Address Address of the operation. > @param Count Count of the number of accesses to perform. > @param Buffer Pointer to the buffer read from PCI config space > @@ -652,8 +653,9 @@ BootScriptExecuteMemoryWrite ( > > **/ > EFI_STATUS > - ScriptPciCfgRead ( > +ScriptPciCfg2Read ( > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > + IN UINT16 Segment, > IN UINT64 Address, > IN UINTN Count, > OUT VOID *Buffer > @@ -663,11 +665,11 @@ ScriptPciCfgRead ( > UINTN AddressStride; > UINTN BufferStride; > PTR Out; > - UINTN PciAddress; > + UINT64 PciAddress; > > Out.Buf = (UINT8 *) Buffer; > > - PciAddress = PCI_ADDRESS_ENCODE (Address); > + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); > > Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); > if (EFI_ERROR (Status)) { > @@ -679,42 +681,42 @@ ScriptPciCfgRead ( > for (; Count > 0; Count--, PciAddress += AddressStride, Out.Buf += BufferStride) { > switch (Width) { > case S3BootScriptWidthUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x\n", PciAddress)); > - *Out.Uint8 = PciRead8 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx\n", PciAddress)); > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > break; > case S3BootScriptWidthFifoUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x\n", PciAddress)); > - *Out.Uint8 = PciRead8 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx\n", PciAddress)); > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > break; > case S3BootScriptWidthFillUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x\n", PciAddress)); > - *Out.Uint8 = PciRead8 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx\n", PciAddress)); > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > break; > > case S3BootScriptWidthUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x\n", PciAddress)); > - *Out.Uint16 = PciRead16 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx\n", PciAddress)); > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > break; > case S3BootScriptWidthFifoUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x\n", PciAddress)); > - *Out.Uint16 = PciRead16 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%016lx\n", PciAddress)); > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > break; > case S3BootScriptWidthFillUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x\n", PciAddress)); > - *Out.Uint16 = PciRead16 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%016lx\n", PciAddress)); > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > break; > > case S3BootScriptWidthUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x\n", PciAddress)); > - *Out.Uint32 = PciRead32 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx\n", PciAddress)); > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > break; > case S3BootScriptWidthFifoUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x\n", PciAddress)); > - *Out.Uint32 = PciRead32 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%016lx\n", PciAddress)); > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > break; > case S3BootScriptWidthFillUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x\n", PciAddress)); > - *Out.Uint32 = PciRead32 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%016lx\n", PciAddress)); > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > break; > > default: > @@ -725,9 +727,10 @@ ScriptPciCfgRead ( > } > > /** > - Performance PCI configuration write operation > + Performance PCI configuration 2 write operation > > @param Width Width of the operation. > + @param Segment Pci segment number > @param Address Address of the operation. > @param Count Count of the number of accesses to perform. > @param Buffer Pointer to the buffer write to PCI config space > @@ -738,8 +741,9 @@ ScriptPciCfgRead ( > > **/ > EFI_STATUS > -ScriptPciCfgWrite ( > +ScriptPciCfg2Write ( > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > + IN UINT16 Segment, > IN UINT64 Address, > IN UINTN Count, > IN VOID *Buffer > @@ -748,14 +752,14 @@ ScriptPciCfgWrite ( > EFI_STATUS Status; > UINTN AddressStride; > UINTN BufferStride; > - UINTN OriginalPciAddress; > + UINT64 OriginalPciAddress; > PTR In; > PTR OriginalIn; > - UINTN PciAddress; > + UINT64 PciAddress; > > In.Buf = (UINT8 *) Buffer; > > - PciAddress = PCI_ADDRESS_ENCODE (Address); > + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); > > Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); > if (EFI_ERROR (Status)) { > @@ -769,40 +773,40 @@ ScriptPciCfgWrite ( > for (; Count > 0; Count--, PciAddress += AddressStride, In.Buf += BufferStride) { > switch (Width) { > case S3BootScriptWidthUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x (0x%02x)\n", > PciAddress, (UINTN)*In.Uint8)); > - PciWrite8 (PciAddress, *In.Uint8); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx (0x%02x)\n", > PciAddress, (UINTN)*In.Uint8)); > + PciSegmentWrite8 (PciAddress, *In.Uint8); > break; > case S3BootScriptWidthFifoUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x (0x%02x)\n", > OriginalPciAddress, (UINTN)*In.Uint8)); > - PciWrite8 (OriginalPciAddress, *In.Uint8); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx (0x%02x)\n", > OriginalPciAddress, (UINTN)*In.Uint8)); > + PciSegmentWrite8 (OriginalPciAddress, *In.Uint8); > break; > case S3BootScriptWidthFillUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x (0x%02x)\n", > PciAddress, (UINTN)*OriginalIn.Uint8)); > - PciWrite8 (PciAddress, *OriginalIn.Uint8); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx (0x%02x)\n", > PciAddress, (UINTN)*OriginalIn.Uint8)); > + PciSegmentWrite8 (PciAddress, *OriginalIn.Uint8); > break; > case S3BootScriptWidthUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x (0x%04x)\n", > PciAddress, (UINTN)*In.Uint16)); > - PciWrite16 (PciAddress, *In.Uint16); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx (0x%04x)\n", > PciAddress, (UINTN)*In.Uint16)); > + PciSegmentWrite16 (PciAddress, *In.Uint16); > break; > case S3BootScriptWidthFifoUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x (0x%04x)\n", > OriginalPciAddress, (UINTN)*In.Uint16)); > - PciWrite16 (OriginalPciAddress, *In.Uint16); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%016lx (0x%04x)\n", > OriginalPciAddress, (UINTN)*In.Uint16)); > + PciSegmentWrite16 (OriginalPciAddress, *In.Uint16); > break; > case S3BootScriptWidthFillUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x (0x%04x)\n", > PciAddress, (UINTN)*OriginalIn.Uint16)); > - PciWrite16 (PciAddress, *OriginalIn.Uint16); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%016lx (0x%04x)\n", > PciAddress, (UINTN)*OriginalIn.Uint16)); > + PciSegmentWrite16 (PciAddress, *OriginalIn.Uint16); > break; > case S3BootScriptWidthUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x (0x%08x)\n", > PciAddress, (UINTN)*In.Uint32)); > - PciWrite32 (PciAddress, *In.Uint32); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx (0x%08x)\n", > PciAddress, (UINTN)*In.Uint32)); > + PciSegmentWrite32 (PciAddress, *In.Uint32); > break; > case S3BootScriptWidthFifoUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x (0x%08x)\n", > OriginalPciAddress, (UINTN)*In.Uint32)); > - PciWrite32 (OriginalPciAddress, *In.Uint32); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%016lx (0x%08x)\n", > OriginalPciAddress, (UINTN)*In.Uint32)); > + PciSegmentWrite32 (OriginalPciAddress, *In.Uint32); > break; > case S3BootScriptWidthFillUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x (0x%08x)\n", > (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); > - PciWrite32 (PciAddress, *OriginalIn.Uint32); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%016lx (0x%08x)\n", > (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); > + PciSegmentWrite32 (PciAddress, *OriginalIn.Uint32); > break; > default: > return EFI_INVALID_PARAMETER; > @@ -811,10 +815,9 @@ ScriptPciCfgWrite ( > return EFI_SUCCESS; > } > /** > - Performance PCI configuration 2 read operation > + Performance PCI configuration read operation > > @param Width Width of the operation. > - @param Segment Pci segment number > @param Address Address of the operation. > @param Count Count of the number of accesses to perform. > @param Buffer Pointer to the buffer to read from PCI > config space. > @@ -824,27 +827,22 @@ ScriptPciCfgWrite ( > Buffer is NULL. > The Buffer is not aligned for the given > Width. > Address is outside the legal range of I/O > ports. > - @note A known Limitations in the implementation which is the 'Segment' parameter > is assumed as > - Zero, or else, assert. > + > **/ > EFI_STATUS > -ScriptPciCfg2Read ( > +ScriptPciCfgRead ( > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > - IN UINT16 Segment, > IN UINT64 Address, > IN UINTN Count, > OUT VOID *Buffer > ) > { > - ASSERT (Segment==0); > - > - return ScriptPciCfgRead (Width, Address, Count, Buffer); > + return ScriptPciCfg2Read (Width, 0, Address, Count, Buffer); > } > /** > - Performance PCI configuration 2 write operation > + Performance PCI configuration write operation > > @param Width Width of the operation. > - @param Segment Pci segment number > @param Address Address of the operation. > @param Count Count of the number of accesses to perform. > @param Buffer Pointer to the buffer to write to PCI config > space. > @@ -854,22 +852,18 @@ ScriptPciCfg2Read ( > Buffer is NULL. > The Buffer is not aligned for the given > Width. > Address is outside the legal range of I/O > ports. > - @note A known Limitations in the implementation which is the 'Segment' parameter > is assumed as > - Zero, or else, assert. > > **/ > EFI_STATUS > EFIAPI > -ScriptPciCfg2Write ( > +ScriptPciCfgWrite ( > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > - IN UINT16 Segment, > IN UINT64 Address, > IN UINTN Count, > IN VOID *Buffer > ) > { > - ASSERT (Segment==0); > - return ScriptPciCfgWrite (Width, Address, Count, Buffer); > + return ScriptPciCfg2Write (Width, 0, Address, Count, Buffer); > } > /** > Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE OP code. > @@ -896,7 +890,7 @@ BootScriptExecutePciCfgWrite ( > Count = PciCfgWrite.Count; > Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE); > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%08x, 0x%08x, 0x%08x\n", > PCI_ADDRESS_ENCODE (Address), Count, (UINTN)Width)); > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%016lx, 0x%08x, 0x%08x\n", > PCI_ADDRESS_ENCODE (0, Address), Count, (UINTN)Width)); > return ScriptPciCfgWrite (Width, Address, Count, Buffer); > } > /** > @@ -1012,7 +1006,7 @@ BootScriptExecutePciCfgReadWrite ( > > CopyMem((VOID*)&PciCfgReadWrite, (VOID*)Script, > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE)); > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%08x, 0x%016lx, > 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgReadWrite.Address), AndMask, OrMask)); > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%016lx, 0x%016lx, > 0x%016lx\n", PCI_ADDRESS_ENCODE (0, PciCfgReadWrite.Address), AndMask, OrMask)); > > Status = ScriptPciCfgRead ( > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfgReadWrite.Width, > @@ -1422,7 +1416,7 @@ BootScriptExecutePciCfg2Write ( > Count = PciCfg2Write.Count; > Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE); > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%04x, 0x%08x, 0x%08x, > 0x%08x\n", Segment, PCI_ADDRESS_ENCODE (Address), Count, (UINTN)Width)); > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%016lx, 0x%08x, 0x%08x\n", > PCI_ADDRESS_ENCODE (Segment, Address), Count, (UINTN)Width)); > return ScriptPciCfg2Write (Width, Segment, Address, Count, Buffer); > } > > @@ -1452,7 +1446,7 @@ BootScriptExecutePciCfg2ReadWrite ( > > CopyMem ((VOID*)&PciCfg2ReadWrite, (VOID*)Script, > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE)); > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%04x, 0x%08x, 0x%016lx, > 0x%016lx\n", PciCfg2ReadWrite.Segment, PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Address), > AndMask, OrMask)); > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%016lx, 0x%016lx, > 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Segment, PciCfg2ReadWrite.Address), > AndMask, OrMask)); > > Status = ScriptPciCfg2Read ( > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2ReadWrite.Width, > @@ -1499,7 +1493,7 @@ BootScriptPciCfgPoll ( > EFI_BOOT_SCRIPT_PCI_CONFIG_POLL PciCfgPoll; > CopyMem ((VOID*)&PciCfgPoll, (VOID*)Script, > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_POLL)); > > - DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%08x, 0x%016lx, 0x%016lx\n", > PCI_ADDRESS_ENCODE (PciCfgPoll.Address), AndMask, OrMask)); > + DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%016lx, 0x%016lx, 0x%016lx\n", > PCI_ADDRESS_ENCODE (0, PciCfgPoll.Address), AndMask, OrMask)); > > Data = 0; > Status = ScriptPciCfgRead ( > @@ -1561,7 +1555,7 @@ BootScriptPciCfg2Poll ( > Data = 0; > CopyMem ((VOID*)&PciCfg2Poll, (VOID*)Script, > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL)); > > - DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%04x, 0x%08x, 0x%016lx, > 0x%016lx\n", PciCfg2Poll.Segment, PCI_ADDRESS_ENCODE (PciCfg2Poll.Address), AndMask, > OrMask)); > + DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%016lx, 0x%016lx, 0x%016lx\n", > PCI_ADDRESS_ENCODE (PciCfg2Poll.Segment, PciCfg2Poll.Address), AndMask, OrMask)); > > Status = ScriptPciCfg2Read ( > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2Poll.Width, > @@ -1604,9 +1598,6 @@ BootScriptPciCfg2Poll ( > @retval RETURN_SUCCESS The boot script table was executed successfully. > @retval RETURN_UNSUPPORTED Invalid script table or opcode. > > - @note A known Limitations in the implementation: When interpreting the opcode > EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE > - EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE and > EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as > - Zero, or else, assert. > **/ > RETURN_STATUS > EFIAPI > diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > index de3915511cec..9ff5b80e7a36 100644 > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > @@ -1291,7 +1291,7 @@ S3BootScriptSavePciCfgReadWrite ( > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > @retval RETURN_SUCCESS Opcode is added. > - @note A known Limitations in the implementation which is non-zero Segment and > 64bits operations are not supported. > + @note A known Limitations in the implementation which is 64bits operations are > not supported. > > **/ > RETURN_STATUS > @@ -1309,8 +1309,7 @@ S3BootScriptSavePciCfg2Write ( > UINT8 WidthInByte; > EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE ScriptPciWrite2; > > - if (Segment != 0 || > - Width == S3BootScriptWidthUint64 || > + if (Width == S3BootScriptWidthUint64 || > Width == S3BootScriptWidthFifoUint64 || > Width == S3BootScriptWidthFillUint64) { > return EFI_INVALID_PARAMETER; > @@ -1351,7 +1350,7 @@ S3BootScriptSavePciCfg2Write ( > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > @retval RETURN_SUCCESS Opcode is added. > - @note A known Limitations in the implementation which is non-zero Segment and > 64bits operations are not supported. > + @note A known Limitations in the implementation which is 64bits operations are > not supported. > > **/ > RETURN_STATUS > @@ -1369,8 +1368,7 @@ S3BootScriptSavePciCfg2ReadWrite ( > UINT8 WidthInByte; > EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE ScriptPciReadWrite2; > > - if (Segment != 0 || > - Width == S3BootScriptWidthUint64 || > + if (Width == S3BootScriptWidthUint64 || > Width == S3BootScriptWidthFifoUint64 || > Width == S3BootScriptWidthFillUint64) { > return EFI_INVALID_PARAMETER; > @@ -1946,7 +1944,7 @@ S3BootScriptSavePciPoll ( > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > @retval RETURN_SUCCESS Opcode is added. > - @note A known Limitations in the implementation which is non-zero Segment and > 64bits operations are not supported. > + @note A known Limitations in the implementation which is 64bits operations are > not supported. > > **/ > RETURN_STATUS > @@ -1965,8 +1963,7 @@ S3BootScriptSavePci2Poll ( > UINT8 Length; > EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL ScriptPci2Poll; > > - if (Segment != 0 || > - Width == S3BootScriptWidthUint64 || > + if (Width == S3BootScriptWidthUint64 || > Width == S3BootScriptWidthFifoUint64 || > Width == S3BootScriptWidthFillUint64) { > return EFI_INVALID_PARAMETER; > diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > index 4125cdd70f10..0feff3661233 100644 > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > @@ -52,7 +52,7 @@ [LibraryClasses] > PcdLib > UefiLib > SmbusLib > - PciLib > + PciSegmentLib > IoLib > LockBoxLib > > diff --git a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > index 9b150480dbca..ffbf5d2688da 100644 > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > @@ -2,7 +2,7 @@ > Support for S3 boot script lib. This file defined some internal macro and internal > data structure > > - Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR> > + Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR> > > This program and the accompanying materials > are licensed and made available under the terms and conditions > @@ -33,7 +33,7 @@ > #include <Library/PcdLib.h> > #include <Library/SmbusLib.h> > #include <Library/IoLib.h> > -#include <Library/PciLib.h> > +#include <Library/PciSegmentLib.h> > #include <Library/DebugLib.h> > #include <Library/BaseMemoryLib.h> > #include <Library/TimerLib.h> > @@ -45,13 +45,15 @@ > #define MAX_IO_ADDRESS 0xFFFF > > // > -// Macro to convert a UEFI PCI address to a PCI Library PCI address > +// Macro to convert a UEFI PCI address + segment to a PCI Segment Library PCI > address > // > -#define PCI_ADDRESS_ENCODE(A) (UINTN)PCI_LIB_ADDRESS( \ > - ((((UINTN)(A))& 0xff000000) >> 24), ((((UINTN)(A)) &0x00ff0000) >> 16), > ((((UINTN)(A)) & 0xff00) >> 8), ((RShiftU64 ((A), 32) & 0xfff) | ((A)& 0xff)) \ > - ) > - > - > +#define PCI_ADDRESS_ENCODE(S, A) PCI_SEGMENT_LIB_ADDRESS( \ > + S, \ > + ((((UINTN)(A)) & 0xff000000) >> 24), \ > + ((((UINTN)(A)) & 0x00ff0000) >> 16), \ > + ((((UINTN)(A)) & 0xff00) >> 8), \ > + ((RShiftU64 ((A), 32) & 0xfff) | ((A) & 0xff)) \ > + ) > > typedef union { > UINT8 volatile *Buf; > -- > 2.7.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment 2016-08-23 1:58 ` Kinney, Michael D @ 2016-08-23 2:09 ` Zeng, Star 2016-08-23 3:44 ` Kinney, Michael D 0 siblings, 1 reply; 15+ messages in thread From: Zeng, Star @ 2016-08-23 2:09 UTC (permalink / raw) To: Kinney, Michael D, edk2-devel@lists.01.org Cc: Yao, Jiewen, Chan, Amy, Laszlo Ersek, Zeng, Star Mike, That means PiDxeS3BootScriptLib will depend on both PciLib and PciSegmentLib. Is there any negative impact for PiDxeS3BootScriptLib to only depend on PciSegmentLib? Thanks, Star -----Original Message----- From: Kinney, Michael D Sent: Tuesday, August 23, 2016 9:59 AM To: Zeng, Star <star.zeng@intel.com>; edk2-devel@lists.01.org; Kinney, Michael D <michael.d.kinney@intel.com> Cc: Yao, Jiewen <jiewen.yao@intel.com>; Chan Amy <chan.amy@intel.com>; Laszlo Ersek <lersek@redhat.com> Subject: RE: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment Star, I do not think all PCI opcodes should be updated to use the PciSegmentLib. Only the "2" versions of the PCI opcodes should use the PciSegmentLib. This means that functions like ScriptPciCfgRead() should not be modified at all and should still use the PciLib. You will need to add a new MACRO for encoding a PCI address with a segment#, maybe called PCI_SEGMENT_ADDRESS_ENCODE(S, A). Mike > -----Original Message----- > From: Zeng, Star > Sent: Friday, August 19, 2016 12:35 AM > To: edk2-devel@lists.01.org > Cc: Zeng, Star <star.zeng@intel.com>; Yao, Jiewen > <jiewen.yao@intel.com>; Kinney, Michael D > <michael.d.kinney@intel.com>; Chan Amy <chan.amy@intel.com>; Laszlo > Ersek <lersek@redhat.com> > Subject: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support > multiple PCI segment > > Support multiple PCI segment for PCI_CONFIG2 opcodes. > > PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib > instead of PciLib. That means platforms need to add PciSegmentLib > declaration like below in platform dsc if the PciSegmentLib was not > declared in platform dsc before. > > PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci > PciSegmentLib|.inf > > For platforms only have one segment, > MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is > recommended to be used and declared in platform dsc for > PiDxeS3BootScriptLib to have equivalent functionality with before. > > Cc: Jiewen Yao <jiewen.yao@intel.com> > Cc: Michael D Kinney <michael.d.kinney@intel.com> > Cc: Chan Amy <chan.amy@intel.com> > Cc: Laszlo Ersek <lersek@redhat.com> > Contributed-under: TianoCore Contribution Agreement 1.0 > Signed-off-by: Star Zeng <star.zeng@intel.com> > --- > .../PiDxeS3BootScriptLib/BootScriptExecute.c | 135 ++++++++++----------- > .../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 15 +-- > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 2 +- > .../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 18 +-- > 4 files changed, 80 insertions(+), 90 deletions(-) > > diff --git > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > index 9e63273bc19c..b865d4452fc8 100644 > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > @@ -1,7 +1,7 @@ > /** @file > Interpret and execute the S3 data in S3 boot script. > > - Copyright (c) 2006 - 2015, Intel Corporation. All rights > reserved.<BR> > + Copyright (c) 2006 - 2016, Intel Corporation. All rights > + reserved.<BR> > > This program and the accompanying materials > are licensed and made available under the terms and conditions @@ > -639,9 +639,10 @@ BootScriptExecuteMemoryWrite ( > > } > /** > - Performance PCI configuration read operation > + Performance PCI configuration 2 read operation > > @param Width Width of the operation. > + @param Segment Pci segment number > @param Address Address of the operation. > @param Count Count of the number of accesses to perform. > @param Buffer Pointer to the buffer read from PCI config space @@ > -652,8 +653,9 @@ BootScriptExecuteMemoryWrite ( > > **/ > EFI_STATUS > - ScriptPciCfgRead ( > +ScriptPciCfg2Read ( > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > + IN UINT16 Segment, > IN UINT64 Address, > IN UINTN Count, > OUT VOID *Buffer > @@ -663,11 +665,11 @@ ScriptPciCfgRead ( > UINTN AddressStride; > UINTN BufferStride; > PTR Out; > - UINTN PciAddress; > + UINT64 PciAddress; > > Out.Buf = (UINT8 *) Buffer; > > - PciAddress = PCI_ADDRESS_ENCODE (Address); > + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); > > Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); > if (EFI_ERROR (Status)) { > @@ -679,42 +681,42 @@ ScriptPciCfgRead ( > for (; Count > 0; Count--, PciAddress += AddressStride, Out.Buf += BufferStride) { > switch (Width) { > case S3BootScriptWidthUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x\n", PciAddress)); > - *Out.Uint8 = PciRead8 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx\n", PciAddress)); > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > break; > case S3BootScriptWidthFifoUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x\n", PciAddress)); > - *Out.Uint8 = PciRead8 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx\n", PciAddress)); > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > break; > case S3BootScriptWidthFillUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x\n", PciAddress)); > - *Out.Uint8 = PciRead8 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx\n", PciAddress)); > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > break; > > case S3BootScriptWidthUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x\n", PciAddress)); > - *Out.Uint16 = PciRead16 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx\n", PciAddress)); > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > break; > case S3BootScriptWidthFifoUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x\n", PciAddress)); > - *Out.Uint16 = PciRead16 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%016lx\n", PciAddress)); > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > break; > case S3BootScriptWidthFillUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x\n", PciAddress)); > - *Out.Uint16 = PciRead16 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%016lx\n", PciAddress)); > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > break; > > case S3BootScriptWidthUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x\n", PciAddress)); > - *Out.Uint32 = PciRead32 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx\n", PciAddress)); > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > break; > case S3BootScriptWidthFifoUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x\n", PciAddress)); > - *Out.Uint32 = PciRead32 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%016lx\n", PciAddress)); > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > break; > case S3BootScriptWidthFillUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x\n", PciAddress)); > - *Out.Uint32 = PciRead32 (PciAddress); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%016lx\n", PciAddress)); > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > break; > > default: > @@ -725,9 +727,10 @@ ScriptPciCfgRead ( } > > /** > - Performance PCI configuration write operation > + Performance PCI configuration 2 write operation > > @param Width Width of the operation. > + @param Segment Pci segment number > @param Address Address of the operation. > @param Count Count of the number of accesses to perform. > @param Buffer Pointer to the buffer write to PCI config space @@ > -738,8 +741,9 @@ ScriptPciCfgRead ( > > **/ > EFI_STATUS > -ScriptPciCfgWrite ( > +ScriptPciCfg2Write ( > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > + IN UINT16 Segment, > IN UINT64 Address, > IN UINTN Count, > IN VOID *Buffer > @@ -748,14 +752,14 @@ ScriptPciCfgWrite ( > EFI_STATUS Status; > UINTN AddressStride; > UINTN BufferStride; > - UINTN OriginalPciAddress; > + UINT64 OriginalPciAddress; > PTR In; > PTR OriginalIn; > - UINTN PciAddress; > + UINT64 PciAddress; > > In.Buf = (UINT8 *) Buffer; > > - PciAddress = PCI_ADDRESS_ENCODE (Address); > + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); > > Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); > if (EFI_ERROR (Status)) { > @@ -769,40 +773,40 @@ ScriptPciCfgWrite ( > for (; Count > 0; Count--, PciAddress += AddressStride, In.Buf += BufferStride) { > switch (Width) { > case S3BootScriptWidthUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x (0x%02x)\n", > PciAddress, (UINTN)*In.Uint8)); > - PciWrite8 (PciAddress, *In.Uint8); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx > + (0x%02x)\n", > PciAddress, (UINTN)*In.Uint8)); > + PciSegmentWrite8 (PciAddress, *In.Uint8); > break; > case S3BootScriptWidthFifoUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x (0x%02x)\n", > OriginalPciAddress, (UINTN)*In.Uint8)); > - PciWrite8 (OriginalPciAddress, *In.Uint8); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx > + (0x%02x)\n", > OriginalPciAddress, (UINTN)*In.Uint8)); > + PciSegmentWrite8 (OriginalPciAddress, *In.Uint8); > break; > case S3BootScriptWidthFillUint8: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x (0x%02x)\n", > PciAddress, (UINTN)*OriginalIn.Uint8)); > - PciWrite8 (PciAddress, *OriginalIn.Uint8); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx > + (0x%02x)\n", > PciAddress, (UINTN)*OriginalIn.Uint8)); > + PciSegmentWrite8 (PciAddress, *OriginalIn.Uint8); > break; > case S3BootScriptWidthUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x (0x%04x)\n", > PciAddress, (UINTN)*In.Uint16)); > - PciWrite16 (PciAddress, *In.Uint16); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx > + (0x%04x)\n", > PciAddress, (UINTN)*In.Uint16)); > + PciSegmentWrite16 (PciAddress, *In.Uint16); > break; > case S3BootScriptWidthFifoUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x (0x%04x)\n", > OriginalPciAddress, (UINTN)*In.Uint16)); > - PciWrite16 (OriginalPciAddress, *In.Uint16); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%016lx > + (0x%04x)\n", > OriginalPciAddress, (UINTN)*In.Uint16)); > + PciSegmentWrite16 (OriginalPciAddress, *In.Uint16); > break; > case S3BootScriptWidthFillUint16: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x (0x%04x)\n", > PciAddress, (UINTN)*OriginalIn.Uint16)); > - PciWrite16 (PciAddress, *OriginalIn.Uint16); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%016lx > + (0x%04x)\n", > PciAddress, (UINTN)*OriginalIn.Uint16)); > + PciSegmentWrite16 (PciAddress, *OriginalIn.Uint16); > break; > case S3BootScriptWidthUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x (0x%08x)\n", > PciAddress, (UINTN)*In.Uint32)); > - PciWrite32 (PciAddress, *In.Uint32); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx > + (0x%08x)\n", > PciAddress, (UINTN)*In.Uint32)); > + PciSegmentWrite32 (PciAddress, *In.Uint32); > break; > case S3BootScriptWidthFifoUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x (0x%08x)\n", > OriginalPciAddress, (UINTN)*In.Uint32)); > - PciWrite32 (OriginalPciAddress, *In.Uint32); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%016lx > + (0x%08x)\n", > OriginalPciAddress, (UINTN)*In.Uint32)); > + PciSegmentWrite32 (OriginalPciAddress, *In.Uint32); > break; > case S3BootScriptWidthFillUint32: > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x (0x%08x)\n", > (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); > - PciWrite32 (PciAddress, *OriginalIn.Uint32); > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%016lx > + (0x%08x)\n", > (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); > + PciSegmentWrite32 (PciAddress, *OriginalIn.Uint32); > break; > default: > return EFI_INVALID_PARAMETER; @@ -811,10 +815,9 @@ > ScriptPciCfgWrite ( > return EFI_SUCCESS; > } > /** > - Performance PCI configuration 2 read operation > + Performance PCI configuration read operation > > @param Width Width of the operation. > - @param Segment Pci segment number > @param Address Address of the operation. > @param Count Count of the number of accesses to perform. > @param Buffer Pointer to the buffer to read from PCI > config space. > @@ -824,27 +827,22 @@ ScriptPciCfgWrite ( > Buffer is NULL. > The Buffer is not aligned for > the given Width. > Address is outside the legal > range of I/O ports. > - @note A known Limitations in the implementation which is the > 'Segment' parameter is assumed as > - Zero, or else, assert. > + > **/ > EFI_STATUS > -ScriptPciCfg2Read ( > +ScriptPciCfgRead ( > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > - IN UINT16 Segment, > IN UINT64 Address, > IN UINTN Count, > OUT VOID *Buffer > ) > { > - ASSERT (Segment==0); > - > - return ScriptPciCfgRead (Width, Address, Count, Buffer); > + return ScriptPciCfg2Read (Width, 0, Address, Count, Buffer); > } > /** > - Performance PCI configuration 2 write operation > + Performance PCI configuration write operation > > @param Width Width of the operation. > - @param Segment Pci segment number > @param Address Address of the operation. > @param Count Count of the number of accesses to perform. > @param Buffer Pointer to the buffer to write to PCI config > space. > @@ -854,22 +852,18 @@ ScriptPciCfg2Read ( > Buffer is NULL. > The Buffer is not aligned for > the given Width. > Address is outside the legal > range of I/O ports. > - @note A known Limitations in the implementation which is the > 'Segment' parameter is assumed as > - Zero, or else, assert. > > **/ > EFI_STATUS > EFIAPI > -ScriptPciCfg2Write ( > +ScriptPciCfgWrite ( > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > - IN UINT16 Segment, > IN UINT64 Address, > IN UINTN Count, > IN VOID *Buffer > ) > { > - ASSERT (Segment==0); > - return ScriptPciCfgWrite (Width, Address, Count, Buffer); > + return ScriptPciCfg2Write (Width, 0, Address, Count, Buffer); > } > /** > Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE OP code. > @@ -896,7 +890,7 @@ BootScriptExecutePciCfgWrite ( > Count = PciCfgWrite.Count; > Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE); > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%08x, 0x%08x, > 0x%08x\n", PCI_ADDRESS_ENCODE (Address), Count, (UINTN)Width)); > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%016lx, > + 0x%08x, 0x%08x\n", > PCI_ADDRESS_ENCODE (0, Address), Count, (UINTN)Width)); > return ScriptPciCfgWrite (Width, Address, Count, Buffer); } > /** > @@ -1012,7 +1006,7 @@ BootScriptExecutePciCfgReadWrite ( > > CopyMem((VOID*)&PciCfgReadWrite, (VOID*)Script, > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE)); > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%08x, > 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgReadWrite.Address), > AndMask, OrMask)); > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%016lx, > + 0x%016lx, > 0x%016lx\n", PCI_ADDRESS_ENCODE (0, PciCfgReadWrite.Address), AndMask, > OrMask)); > > Status = ScriptPciCfgRead ( > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfgReadWrite.Width, @@ > -1422,7 +1416,7 @@ BootScriptExecutePciCfg2Write ( > Count = PciCfg2Write.Count; > Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE); > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%04x, > 0x%08x, 0x%08x, 0x%08x\n", Segment, PCI_ADDRESS_ENCODE (Address), > Count, (UINTN)Width)); > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%016lx, > + 0x%08x, 0x%08x\n", > PCI_ADDRESS_ENCODE (Segment, Address), Count, (UINTN)Width)); > return ScriptPciCfg2Write (Width, Segment, Address, Count, Buffer); > } > > @@ -1452,7 +1446,7 @@ BootScriptExecutePciCfg2ReadWrite ( > > CopyMem ((VOID*)&PciCfg2ReadWrite, (VOID*)Script, > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE)); > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%04x, > 0x%08x, 0x%016lx, 0x%016lx\n", PciCfg2ReadWrite.Segment, > PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Address), AndMask, OrMask)); > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%016lx, > + 0x%016lx, > 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Segment, > PciCfg2ReadWrite.Address), AndMask, OrMask)); > > Status = ScriptPciCfg2Read ( > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2ReadWrite.Width, @@ > -1499,7 +1493,7 @@ BootScriptPciCfgPoll ( > EFI_BOOT_SCRIPT_PCI_CONFIG_POLL PciCfgPoll; > CopyMem ((VOID*)&PciCfgPoll, (VOID*)Script, > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_POLL)); > > - DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%08x, 0x%016lx, > 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgPoll.Address), AndMask, > OrMask)); > + DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%016lx, 0x%016lx, > + 0x%016lx\n", > PCI_ADDRESS_ENCODE (0, PciCfgPoll.Address), AndMask, OrMask)); > > Data = 0; > Status = ScriptPciCfgRead ( > @@ -1561,7 +1555,7 @@ BootScriptPciCfg2Poll ( > Data = 0; > CopyMem ((VOID*)&PciCfg2Poll, (VOID*)Script, > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL)); > > - DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%04x, 0x%08x, > 0x%016lx, 0x%016lx\n", PciCfg2Poll.Segment, PCI_ADDRESS_ENCODE > (PciCfg2Poll.Address), AndMask, OrMask)); > + DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%016lx, 0x%016lx, > + 0x%016lx\n", > PCI_ADDRESS_ENCODE (PciCfg2Poll.Segment, PciCfg2Poll.Address), > AndMask, OrMask)); > > Status = ScriptPciCfg2Read ( > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2Poll.Width, @@ -1604,9 > +1598,6 @@ BootScriptPciCfg2Poll ( > @retval RETURN_SUCCESS The boot script table was executed successfully. > @retval RETURN_UNSUPPORTED Invalid script table or opcode. > > - @note A known Limitations in the implementation: When interpreting > the opcode EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE > - EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE and > EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as > - Zero, or else, assert. > **/ > RETURN_STATUS > EFIAPI > diff --git > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > index de3915511cec..9ff5b80e7a36 100644 > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > @@ -1291,7 +1291,7 @@ S3BootScriptSavePciCfgReadWrite ( > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > @retval RETURN_SUCCESS Opcode is added. > - @note A known Limitations in the implementation which is non-zero > Segment and 64bits operations are not supported. > + @note A known Limitations in the implementation which is 64bits > + operations are > not supported. > > **/ > RETURN_STATUS > @@ -1309,8 +1309,7 @@ S3BootScriptSavePciCfg2Write ( > UINT8 WidthInByte; > EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE ScriptPciWrite2; > > - if (Segment != 0 || > - Width == S3BootScriptWidthUint64 || > + if (Width == S3BootScriptWidthUint64 || > Width == S3BootScriptWidthFifoUint64 || > Width == S3BootScriptWidthFillUint64) { > return EFI_INVALID_PARAMETER; > @@ -1351,7 +1350,7 @@ S3BootScriptSavePciCfg2Write ( > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > @retval RETURN_SUCCESS Opcode is added. > - @note A known Limitations in the implementation which is non-zero > Segment and 64bits operations are not supported. > + @note A known Limitations in the implementation which is 64bits > + operations are > not supported. > > **/ > RETURN_STATUS > @@ -1369,8 +1368,7 @@ S3BootScriptSavePciCfg2ReadWrite ( > UINT8 WidthInByte; > EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE ScriptPciReadWrite2; > > - if (Segment != 0 || > - Width == S3BootScriptWidthUint64 || > + if (Width == S3BootScriptWidthUint64 || > Width == S3BootScriptWidthFifoUint64 || > Width == S3BootScriptWidthFillUint64) { > return EFI_INVALID_PARAMETER; > @@ -1946,7 +1944,7 @@ S3BootScriptSavePciPoll ( > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > @retval RETURN_SUCCESS Opcode is added. > - @note A known Limitations in the implementation which is non-zero > Segment and 64bits operations are not supported. > + @note A known Limitations in the implementation which is 64bits > + operations are > not supported. > > **/ > RETURN_STATUS > @@ -1965,8 +1963,7 @@ S3BootScriptSavePci2Poll ( > UINT8 Length; > EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL ScriptPci2Poll; > > - if (Segment != 0 || > - Width == S3BootScriptWidthUint64 || > + if (Width == S3BootScriptWidthUint64 || > Width == S3BootScriptWidthFifoUint64 || > Width == S3BootScriptWidthFillUint64) { > return EFI_INVALID_PARAMETER; > diff --git > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > index 4125cdd70f10..0feff3661233 100644 > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > @@ -52,7 +52,7 @@ [LibraryClasses] > PcdLib > UefiLib > SmbusLib > - PciLib > + PciSegmentLib > IoLib > LockBoxLib > > diff --git > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > index 9b150480dbca..ffbf5d2688da 100644 > --- > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib. > +++ h > @@ -2,7 +2,7 @@ > Support for S3 boot script lib. This file defined some internal macro and internal > data structure > > - Copyright (c) 2006 - 2015, Intel Corporation. All rights > reserved.<BR> > + Copyright (c) 2006 - 2016, Intel Corporation. All rights > + reserved.<BR> > > This program and the accompanying materials > are licensed and made available under the terms and conditions @@ > -33,7 +33,7 @@ #include <Library/PcdLib.h> #include > <Library/SmbusLib.h> #include <Library/IoLib.h> -#include > <Library/PciLib.h> > +#include <Library/PciSegmentLib.h> > #include <Library/DebugLib.h> > #include <Library/BaseMemoryLib.h> > #include <Library/TimerLib.h> > @@ -45,13 +45,15 @@ > #define MAX_IO_ADDRESS 0xFFFF > > // > -// Macro to convert a UEFI PCI address to a PCI Library PCI address > +// Macro to convert a UEFI PCI address + segment to a PCI Segment > +Library PCI > address > // > -#define PCI_ADDRESS_ENCODE(A) (UINTN)PCI_LIB_ADDRESS( \ > - ((((UINTN)(A))& 0xff000000) >> 24), ((((UINTN)(A)) &0x00ff0000) >> 16), > ((((UINTN)(A)) & 0xff00) >> 8), ((RShiftU64 ((A), 32) & 0xfff) | ((A)& 0xff)) \ > - ) > - > - > +#define PCI_ADDRESS_ENCODE(S, A) PCI_SEGMENT_LIB_ADDRESS( \ > + S, \ > + ((((UINTN)(A)) & 0xff000000) >> 24), \ > + ((((UINTN)(A)) & 0x00ff0000) >> 16), \ > + ((((UINTN)(A)) & 0xff00) >> 8), \ > + ((RShiftU64 ((A), 32) & 0xfff) | ((A) & 0xff)) \ > + ) > > typedef union { > UINT8 volatile *Buf; > -- > 2.7.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment 2016-08-23 2:09 ` Zeng, Star @ 2016-08-23 3:44 ` Kinney, Michael D 2016-08-23 8:57 ` Zeng, Star 0 siblings, 1 reply; 15+ messages in thread From: Kinney, Michael D @ 2016-08-23 3:44 UTC (permalink / raw) To: Zeng, Star, edk2-devel@lists.01.org, Kinney, Michael D Cc: Yao, Jiewen, Chan, Amy, Laszlo Ersek Star, PciLib uses smaller address and fewer params, so those functions can be simpler and smaller. We only want to use PciSegmentLib when we have to. Mike > -----Original Message----- > From: Zeng, Star > Sent: Monday, August 22, 2016 7:09 PM > To: Kinney, Michael D <michael.d.kinney@intel.com>; edk2-devel@lists.01.org > Cc: Yao, Jiewen <jiewen.yao@intel.com>; Chan, Amy <amy.chan@intel.com>; Laszlo Ersek > <lersek@redhat.com>; Zeng, Star <star.zeng@intel.com> > Subject: RE: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI > segment > > Mike, > > That means PiDxeS3BootScriptLib will depend on both PciLib and PciSegmentLib. > Is there any negative impact for PiDxeS3BootScriptLib to only depend on > PciSegmentLib? > > > Thanks, > Star > -----Original Message----- > From: Kinney, Michael D > Sent: Tuesday, August 23, 2016 9:59 AM > To: Zeng, Star <star.zeng@intel.com>; edk2-devel@lists.01.org; Kinney, Michael D > <michael.d.kinney@intel.com> > Cc: Yao, Jiewen <jiewen.yao@intel.com>; Chan Amy <chan.amy@intel.com>; Laszlo Ersek > <lersek@redhat.com> > Subject: RE: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI > segment > > Star, > > I do not think all PCI opcodes should be updated to use the PciSegmentLib. > > Only the "2" versions of the PCI opcodes should use the PciSegmentLib. > > This means that functions like ScriptPciCfgRead() should not be modified at all and > should still use the PciLib. You will need to add a new MACRO for encoding a PCI > address with a segment#, maybe called PCI_SEGMENT_ADDRESS_ENCODE(S, A). > > Mike > > > -----Original Message----- > > From: Zeng, Star > > Sent: Friday, August 19, 2016 12:35 AM > > To: edk2-devel@lists.01.org > > Cc: Zeng, Star <star.zeng@intel.com>; Yao, Jiewen > > <jiewen.yao@intel.com>; Kinney, Michael D > > <michael.d.kinney@intel.com>; Chan Amy <chan.amy@intel.com>; Laszlo > > Ersek <lersek@redhat.com> > > Subject: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support > > multiple PCI segment > > > > Support multiple PCI segment for PCI_CONFIG2 opcodes. > > > > PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib > > instead of PciLib. That means platforms need to add PciSegmentLib > > declaration like below in platform dsc if the PciSegmentLib was not > > declared in platform dsc before. > > > > PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci > > PciSegmentLib|.inf > > > > For platforms only have one segment, > > MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is > > recommended to be used and declared in platform dsc for > > PiDxeS3BootScriptLib to have equivalent functionality with before. > > > > Cc: Jiewen Yao <jiewen.yao@intel.com> > > Cc: Michael D Kinney <michael.d.kinney@intel.com> > > Cc: Chan Amy <chan.amy@intel.com> > > Cc: Laszlo Ersek <lersek@redhat.com> > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Star Zeng <star.zeng@intel.com> > > --- > > .../PiDxeS3BootScriptLib/BootScriptExecute.c | 135 ++++++++++----------- > > .../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 15 +-- > > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 2 +- > > .../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 18 +-- > > 4 files changed, 80 insertions(+), 90 deletions(-) > > > > diff --git > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > > index 9e63273bc19c..b865d4452fc8 100644 > > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > > @@ -1,7 +1,7 @@ > > /** @file > > Interpret and execute the S3 data in S3 boot script. > > > > - Copyright (c) 2006 - 2015, Intel Corporation. All rights > > reserved.<BR> > > + Copyright (c) 2006 - 2016, Intel Corporation. All rights > > + reserved.<BR> > > > > This program and the accompanying materials > > are licensed and made available under the terms and conditions @@ > > -639,9 +639,10 @@ BootScriptExecuteMemoryWrite ( > > > > } > > /** > > - Performance PCI configuration read operation > > + Performance PCI configuration 2 read operation > > > > @param Width Width of the operation. > > + @param Segment Pci segment number > > @param Address Address of the operation. > > @param Count Count of the number of accesses to perform. > > @param Buffer Pointer to the buffer read from PCI config space @@ > > -652,8 +653,9 @@ BootScriptExecuteMemoryWrite ( > > > > **/ > > EFI_STATUS > > - ScriptPciCfgRead ( > > +ScriptPciCfg2Read ( > > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > > + IN UINT16 Segment, > > IN UINT64 Address, > > IN UINTN Count, > > OUT VOID *Buffer > > @@ -663,11 +665,11 @@ ScriptPciCfgRead ( > > UINTN AddressStride; > > UINTN BufferStride; > > PTR Out; > > - UINTN PciAddress; > > + UINT64 PciAddress; > > > > Out.Buf = (UINT8 *) Buffer; > > > > - PciAddress = PCI_ADDRESS_ENCODE (Address); > > + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); > > > > Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); > > if (EFI_ERROR (Status)) { > > @@ -679,42 +681,42 @@ ScriptPciCfgRead ( > > for (; Count > 0; Count--, PciAddress += AddressStride, Out.Buf += BufferStride) > { > > switch (Width) { > > case S3BootScriptWidthUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x\n", PciAddress)); > > - *Out.Uint8 = PciRead8 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx\n", PciAddress)); > > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > > break; > > case S3BootScriptWidthFifoUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x\n", PciAddress)); > > - *Out.Uint8 = PciRead8 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx\n", PciAddress)); > > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > > break; > > case S3BootScriptWidthFillUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x\n", PciAddress)); > > - *Out.Uint8 = PciRead8 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx\n", PciAddress)); > > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > > break; > > > > case S3BootScriptWidthUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x\n", PciAddress)); > > - *Out.Uint16 = PciRead16 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx\n", PciAddress)); > > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > > break; > > case S3BootScriptWidthFifoUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x\n", PciAddress)); > > - *Out.Uint16 = PciRead16 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%016lx\n", > PciAddress)); > > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > > break; > > case S3BootScriptWidthFillUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x\n", PciAddress)); > > - *Out.Uint16 = PciRead16 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%016lx\n", > PciAddress)); > > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > > break; > > > > case S3BootScriptWidthUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x\n", PciAddress)); > > - *Out.Uint32 = PciRead32 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx\n", PciAddress)); > > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > > break; > > case S3BootScriptWidthFifoUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x\n", PciAddress)); > > - *Out.Uint32 = PciRead32 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%016lx\n", > PciAddress)); > > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > > break; > > case S3BootScriptWidthFillUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x\n", PciAddress)); > > - *Out.Uint32 = PciRead32 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%016lx\n", > PciAddress)); > > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > > break; > > > > default: > > @@ -725,9 +727,10 @@ ScriptPciCfgRead ( } > > > > /** > > - Performance PCI configuration write operation > > + Performance PCI configuration 2 write operation > > > > @param Width Width of the operation. > > + @param Segment Pci segment number > > @param Address Address of the operation. > > @param Count Count of the number of accesses to perform. > > @param Buffer Pointer to the buffer write to PCI config space @@ > > -738,8 +741,9 @@ ScriptPciCfgRead ( > > > > **/ > > EFI_STATUS > > -ScriptPciCfgWrite ( > > +ScriptPciCfg2Write ( > > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > > + IN UINT16 Segment, > > IN UINT64 Address, > > IN UINTN Count, > > IN VOID *Buffer > > @@ -748,14 +752,14 @@ ScriptPciCfgWrite ( > > EFI_STATUS Status; > > UINTN AddressStride; > > UINTN BufferStride; > > - UINTN OriginalPciAddress; > > + UINT64 OriginalPciAddress; > > PTR In; > > PTR OriginalIn; > > - UINTN PciAddress; > > + UINT64 PciAddress; > > > > In.Buf = (UINT8 *) Buffer; > > > > - PciAddress = PCI_ADDRESS_ENCODE (Address); > > + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); > > > > Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); > > if (EFI_ERROR (Status)) { > > @@ -769,40 +773,40 @@ ScriptPciCfgWrite ( > > for (; Count > 0; Count--, PciAddress += AddressStride, In.Buf += BufferStride) > { > > switch (Width) { > > case S3BootScriptWidthUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x (0x%02x)\n", > > PciAddress, (UINTN)*In.Uint8)); > > - PciWrite8 (PciAddress, *In.Uint8); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx > > + (0x%02x)\n", > > PciAddress, (UINTN)*In.Uint8)); > > + PciSegmentWrite8 (PciAddress, *In.Uint8); > > break; > > case S3BootScriptWidthFifoUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x (0x%02x)\n", > > OriginalPciAddress, (UINTN)*In.Uint8)); > > - PciWrite8 (OriginalPciAddress, *In.Uint8); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx > > + (0x%02x)\n", > > OriginalPciAddress, (UINTN)*In.Uint8)); > > + PciSegmentWrite8 (OriginalPciAddress, *In.Uint8); > > break; > > case S3BootScriptWidthFillUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x (0x%02x)\n", > > PciAddress, (UINTN)*OriginalIn.Uint8)); > > - PciWrite8 (PciAddress, *OriginalIn.Uint8); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx > > + (0x%02x)\n", > > PciAddress, (UINTN)*OriginalIn.Uint8)); > > + PciSegmentWrite8 (PciAddress, *OriginalIn.Uint8); > > break; > > case S3BootScriptWidthUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x (0x%04x)\n", > > PciAddress, (UINTN)*In.Uint16)); > > - PciWrite16 (PciAddress, *In.Uint16); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx > > + (0x%04x)\n", > > PciAddress, (UINTN)*In.Uint16)); > > + PciSegmentWrite16 (PciAddress, *In.Uint16); > > break; > > case S3BootScriptWidthFifoUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x (0x%04x)\n", > > OriginalPciAddress, (UINTN)*In.Uint16)); > > - PciWrite16 (OriginalPciAddress, *In.Uint16); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%016lx > > + (0x%04x)\n", > > OriginalPciAddress, (UINTN)*In.Uint16)); > > + PciSegmentWrite16 (OriginalPciAddress, *In.Uint16); > > break; > > case S3BootScriptWidthFillUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x (0x%04x)\n", > > PciAddress, (UINTN)*OriginalIn.Uint16)); > > - PciWrite16 (PciAddress, *OriginalIn.Uint16); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%016lx > > + (0x%04x)\n", > > PciAddress, (UINTN)*OriginalIn.Uint16)); > > + PciSegmentWrite16 (PciAddress, *OriginalIn.Uint16); > > break; > > case S3BootScriptWidthUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x (0x%08x)\n", > > PciAddress, (UINTN)*In.Uint32)); > > - PciWrite32 (PciAddress, *In.Uint32); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx > > + (0x%08x)\n", > > PciAddress, (UINTN)*In.Uint32)); > > + PciSegmentWrite32 (PciAddress, *In.Uint32); > > break; > > case S3BootScriptWidthFifoUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x (0x%08x)\n", > > OriginalPciAddress, (UINTN)*In.Uint32)); > > - PciWrite32 (OriginalPciAddress, *In.Uint32); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%016lx > > + (0x%08x)\n", > > OriginalPciAddress, (UINTN)*In.Uint32)); > > + PciSegmentWrite32 (OriginalPciAddress, *In.Uint32); > > break; > > case S3BootScriptWidthFillUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x (0x%08x)\n", > > (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); > > - PciWrite32 (PciAddress, *OriginalIn.Uint32); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%016lx > > + (0x%08x)\n", > > (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); > > + PciSegmentWrite32 (PciAddress, *OriginalIn.Uint32); > > break; > > default: > > return EFI_INVALID_PARAMETER; @@ -811,10 +815,9 @@ > > ScriptPciCfgWrite ( > > return EFI_SUCCESS; > > } > > /** > > - Performance PCI configuration 2 read operation > > + Performance PCI configuration read operation > > > > @param Width Width of the operation. > > - @param Segment Pci segment number > > @param Address Address of the operation. > > @param Count Count of the number of accesses to > perform. > > @param Buffer Pointer to the buffer to read from PCI > > config space. > > @@ -824,27 +827,22 @@ ScriptPciCfgWrite ( > > Buffer is NULL. > > The Buffer is not aligned for > > the given Width. > > Address is outside the legal > > range of I/O ports. > > - @note A known Limitations in the implementation which is the > > 'Segment' parameter is assumed as > > - Zero, or else, assert. > > + > > **/ > > EFI_STATUS > > -ScriptPciCfg2Read ( > > +ScriptPciCfgRead ( > > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > > - IN UINT16 Segment, > > IN UINT64 Address, > > IN UINTN Count, > > OUT VOID *Buffer > > ) > > { > > - ASSERT (Segment==0); > > - > > - return ScriptPciCfgRead (Width, Address, Count, Buffer); > > + return ScriptPciCfg2Read (Width, 0, Address, Count, Buffer); > > } > > /** > > - Performance PCI configuration 2 write operation > > + Performance PCI configuration write operation > > > > @param Width Width of the operation. > > - @param Segment Pci segment number > > @param Address Address of the operation. > > @param Count Count of the number of accesses to > perform. > > @param Buffer Pointer to the buffer to write to PCI > config > > space. > > @@ -854,22 +852,18 @@ ScriptPciCfg2Read ( > > Buffer is NULL. > > The Buffer is not aligned for > > the given Width. > > Address is outside the legal > > range of I/O ports. > > - @note A known Limitations in the implementation which is the > > 'Segment' parameter is assumed as > > - Zero, or else, assert. > > > > **/ > > EFI_STATUS > > EFIAPI > > -ScriptPciCfg2Write ( > > +ScriptPciCfgWrite ( > > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > > - IN UINT16 Segment, > > IN UINT64 Address, > > IN UINTN Count, > > IN VOID *Buffer > > ) > > { > > - ASSERT (Segment==0); > > - return ScriptPciCfgWrite (Width, Address, Count, Buffer); > > + return ScriptPciCfg2Write (Width, 0, Address, Count, Buffer); > > } > > /** > > Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE OP code. > > @@ -896,7 +890,7 @@ BootScriptExecutePciCfgWrite ( > > Count = PciCfgWrite.Count; > > Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE); > > > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%08x, 0x%08x, > > 0x%08x\n", PCI_ADDRESS_ENCODE (Address), Count, (UINTN)Width)); > > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%016lx, > > + 0x%08x, 0x%08x\n", > > PCI_ADDRESS_ENCODE (0, Address), Count, (UINTN)Width)); > > return ScriptPciCfgWrite (Width, Address, Count, Buffer); } > > /** > > @@ -1012,7 +1006,7 @@ BootScriptExecutePciCfgReadWrite ( > > > > CopyMem((VOID*)&PciCfgReadWrite, (VOID*)Script, > > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE)); > > > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%08x, > > 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgReadWrite.Address), > > AndMask, OrMask)); > > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%016lx, > > + 0x%016lx, > > 0x%016lx\n", PCI_ADDRESS_ENCODE (0, PciCfgReadWrite.Address), AndMask, > > OrMask)); > > > > Status = ScriptPciCfgRead ( > > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfgReadWrite.Width, @@ > > -1422,7 +1416,7 @@ BootScriptExecutePciCfg2Write ( > > Count = PciCfg2Write.Count; > > Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE); > > > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%04x, > > 0x%08x, 0x%08x, 0x%08x\n", Segment, PCI_ADDRESS_ENCODE (Address), > > Count, (UINTN)Width)); > > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%016lx, > > + 0x%08x, 0x%08x\n", > > PCI_ADDRESS_ENCODE (Segment, Address), Count, (UINTN)Width)); > > return ScriptPciCfg2Write (Width, Segment, Address, Count, Buffer); > > } > > > > @@ -1452,7 +1446,7 @@ BootScriptExecutePciCfg2ReadWrite ( > > > > CopyMem ((VOID*)&PciCfg2ReadWrite, (VOID*)Script, > > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE)); > > > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%04x, > > 0x%08x, 0x%016lx, 0x%016lx\n", PciCfg2ReadWrite.Segment, > > PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Address), AndMask, OrMask)); > > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%016lx, > > + 0x%016lx, > > 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Segment, > > PciCfg2ReadWrite.Address), AndMask, OrMask)); > > > > Status = ScriptPciCfg2Read ( > > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2ReadWrite.Width, @@ > > -1499,7 +1493,7 @@ BootScriptPciCfgPoll ( > > EFI_BOOT_SCRIPT_PCI_CONFIG_POLL PciCfgPoll; > > CopyMem ((VOID*)&PciCfgPoll, (VOID*)Script, > > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_POLL)); > > > > - DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%08x, 0x%016lx, > > 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgPoll.Address), AndMask, > > OrMask)); > > + DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%016lx, 0x%016lx, > > + 0x%016lx\n", > > PCI_ADDRESS_ENCODE (0, PciCfgPoll.Address), AndMask, OrMask)); > > > > Data = 0; > > Status = ScriptPciCfgRead ( > > @@ -1561,7 +1555,7 @@ BootScriptPciCfg2Poll ( > > Data = 0; > > CopyMem ((VOID*)&PciCfg2Poll, (VOID*)Script, > > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL)); > > > > - DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%04x, 0x%08x, > > 0x%016lx, 0x%016lx\n", PciCfg2Poll.Segment, PCI_ADDRESS_ENCODE > > (PciCfg2Poll.Address), AndMask, OrMask)); > > + DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%016lx, 0x%016lx, > > + 0x%016lx\n", > > PCI_ADDRESS_ENCODE (PciCfg2Poll.Segment, PciCfg2Poll.Address), > > AndMask, OrMask)); > > > > Status = ScriptPciCfg2Read ( > > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2Poll.Width, @@ -1604,9 > > +1598,6 @@ BootScriptPciCfg2Poll ( > > @retval RETURN_SUCCESS The boot script table was executed > successfully. > > @retval RETURN_UNSUPPORTED Invalid script table or opcode. > > > > - @note A known Limitations in the implementation: When interpreting > > the opcode EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE > > - EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE and > > EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as > > - Zero, or else, assert. > > **/ > > RETURN_STATUS > > EFIAPI > > diff --git > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > > index de3915511cec..9ff5b80e7a36 100644 > > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > > @@ -1291,7 +1291,7 @@ S3BootScriptSavePciCfgReadWrite ( > > > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > > @retval RETURN_SUCCESS Opcode is added. > > - @note A known Limitations in the implementation which is non-zero > > Segment and 64bits operations are not supported. > > + @note A known Limitations in the implementation which is 64bits > > + operations are > > not supported. > > > > **/ > > RETURN_STATUS > > @@ -1309,8 +1309,7 @@ S3BootScriptSavePciCfg2Write ( > > UINT8 WidthInByte; > > EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE ScriptPciWrite2; > > > > - if (Segment != 0 || > > - Width == S3BootScriptWidthUint64 || > > + if (Width == S3BootScriptWidthUint64 || > > Width == S3BootScriptWidthFifoUint64 || > > Width == S3BootScriptWidthFillUint64) { > > return EFI_INVALID_PARAMETER; > > @@ -1351,7 +1350,7 @@ S3BootScriptSavePciCfg2Write ( > > > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > > @retval RETURN_SUCCESS Opcode is added. > > - @note A known Limitations in the implementation which is non-zero > > Segment and 64bits operations are not supported. > > + @note A known Limitations in the implementation which is 64bits > > + operations are > > not supported. > > > > **/ > > RETURN_STATUS > > @@ -1369,8 +1368,7 @@ S3BootScriptSavePciCfg2ReadWrite ( > > UINT8 WidthInByte; > > EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE ScriptPciReadWrite2; > > > > - if (Segment != 0 || > > - Width == S3BootScriptWidthUint64 || > > + if (Width == S3BootScriptWidthUint64 || > > Width == S3BootScriptWidthFifoUint64 || > > Width == S3BootScriptWidthFillUint64) { > > return EFI_INVALID_PARAMETER; > > @@ -1946,7 +1944,7 @@ S3BootScriptSavePciPoll ( > > > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > > @retval RETURN_SUCCESS Opcode is added. > > - @note A known Limitations in the implementation which is non-zero > > Segment and 64bits operations are not supported. > > + @note A known Limitations in the implementation which is 64bits > > + operations are > > not supported. > > > > **/ > > RETURN_STATUS > > @@ -1965,8 +1963,7 @@ S3BootScriptSavePci2Poll ( > > UINT8 Length; > > EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL ScriptPci2Poll; > > > > - if (Segment != 0 || > > - Width == S3BootScriptWidthUint64 || > > + if (Width == S3BootScriptWidthUint64 || > > Width == S3BootScriptWidthFifoUint64 || > > Width == S3BootScriptWidthFillUint64) { > > return EFI_INVALID_PARAMETER; > > diff --git > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > > index 4125cdd70f10..0feff3661233 100644 > > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > > @@ -52,7 +52,7 @@ [LibraryClasses] > > PcdLib > > UefiLib > > SmbusLib > > - PciLib > > + PciSegmentLib > > IoLib > > LockBoxLib > > > > diff --git > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > > index 9b150480dbca..ffbf5d2688da 100644 > > --- > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib. > > +++ h > > @@ -2,7 +2,7 @@ > > Support for S3 boot script lib. This file defined some internal macro and > internal > > data structure > > > > - Copyright (c) 2006 - 2015, Intel Corporation. All rights > > reserved.<BR> > > + Copyright (c) 2006 - 2016, Intel Corporation. All rights > > + reserved.<BR> > > > > This program and the accompanying materials > > are licensed and made available under the terms and conditions @@ > > -33,7 +33,7 @@ #include <Library/PcdLib.h> #include > > <Library/SmbusLib.h> #include <Library/IoLib.h> -#include > > <Library/PciLib.h> > > +#include <Library/PciSegmentLib.h> > > #include <Library/DebugLib.h> > > #include <Library/BaseMemoryLib.h> > > #include <Library/TimerLib.h> > > @@ -45,13 +45,15 @@ > > #define MAX_IO_ADDRESS 0xFFFF > > > > // > > -// Macro to convert a UEFI PCI address to a PCI Library PCI address > > +// Macro to convert a UEFI PCI address + segment to a PCI Segment > > +Library PCI > > address > > // > > -#define PCI_ADDRESS_ENCODE(A) (UINTN)PCI_LIB_ADDRESS( \ > > - ((((UINTN)(A))& 0xff000000) >> 24), ((((UINTN)(A)) &0x00ff0000) >> 16), > > ((((UINTN)(A)) & 0xff00) >> 8), ((RShiftU64 ((A), 32) & 0xfff) | ((A)& 0xff)) \ > > - ) > > - > > - > > +#define PCI_ADDRESS_ENCODE(S, A) PCI_SEGMENT_LIB_ADDRESS( \ > > + S, \ > > + ((((UINTN)(A)) & 0xff000000) >> 24), \ > > + ((((UINTN)(A)) & 0x00ff0000) >> 16), \ > > + ((((UINTN)(A)) & 0xff00) >> 8), \ > > + ((RShiftU64 ((A), 32) & 0xfff) | ((A) & 0xff)) > \ > > + ) > > > > typedef union { > > UINT8 volatile *Buf; > > -- > > 2.7.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment 2016-08-23 3:44 ` Kinney, Michael D @ 2016-08-23 8:57 ` Zeng, Star 0 siblings, 0 replies; 15+ messages in thread From: Zeng, Star @ 2016-08-23 8:57 UTC (permalink / raw) To: Kinney, Michael D, edk2-devel@lists.01.org Cc: Yao, Jiewen, Chan, Amy, Laszlo Ersek Mike, I am not sure about you said "so those functions can be simpler and smaller", could you help explain it more? ScriptPciCfg2Read() and ScriptPciCfg2Write() are for PCI_CONFIG2 opcodes. ScriptPciCfgRead() and ScriptPciCfgWrite() are for PCI_CONFIG opcodes. In current patch, ScriptPciCfgRead()/ScriptPciCfgWrite() will reuse ScriptPciCfg2Read()/ScriptPciCfg2Write() by Segment=0. If PiDxeS3BootScriptLib depends on both PciLib and PciSegmentLib, ScriptPciCfgRead()/ScriptPciCfgWrite() will consume PciLib and ScriptPciCfg2Read()/ScriptPciCfg2Write() will consume PciSegmentLib, how those functions can be *simpler and smaller*? And if platform declares PciSegmentLib in platform dsc with other instance, but not MdePkg/Library/BasePciSegmentLibPci, then both interfaces in PciSegmentLib and PciLib will be compiled to final image, I think the image size will be bigger. Thanks, Star -----Original Message----- From: Kinney, Michael D Sent: Tuesday, August 23, 2016 11:45 AM To: Zeng, Star <star.zeng@intel.com>; edk2-devel@lists.01.org; Kinney, Michael D <michael.d.kinney@intel.com> Cc: Yao, Jiewen <jiewen.yao@intel.com>; Chan, Amy <amy.chan@intel.com>; Laszlo Ersek <lersek@redhat.com> Subject: RE: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment Star, PciLib uses smaller address and fewer params, so those functions can be simpler and smaller. We only want to use PciSegmentLib when we have to. Mike > -----Original Message----- > From: Zeng, Star > Sent: Monday, August 22, 2016 7:09 PM > To: Kinney, Michael D <michael.d.kinney@intel.com>; > edk2-devel@lists.01.org > Cc: Yao, Jiewen <jiewen.yao@intel.com>; Chan, Amy > <amy.chan@intel.com>; Laszlo Ersek <lersek@redhat.com>; Zeng, Star > <star.zeng@intel.com> > Subject: RE: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support > multiple PCI segment > > Mike, > > That means PiDxeS3BootScriptLib will depend on both PciLib and PciSegmentLib. > Is there any negative impact for PiDxeS3BootScriptLib to only depend > on PciSegmentLib? > > > Thanks, > Star > -----Original Message----- > From: Kinney, Michael D > Sent: Tuesday, August 23, 2016 9:59 AM > To: Zeng, Star <star.zeng@intel.com>; edk2-devel@lists.01.org; Kinney, > Michael D <michael.d.kinney@intel.com> > Cc: Yao, Jiewen <jiewen.yao@intel.com>; Chan Amy <chan.amy@intel.com>; > Laszlo Ersek <lersek@redhat.com> > Subject: RE: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support > multiple PCI segment > > Star, > > I do not think all PCI opcodes should be updated to use the PciSegmentLib. > > Only the "2" versions of the PCI opcodes should use the PciSegmentLib. > > This means that functions like ScriptPciCfgRead() should not be > modified at all and should still use the PciLib. You will need to add > a new MACRO for encoding a PCI address with a segment#, maybe called PCI_SEGMENT_ADDRESS_ENCODE(S, A). > > Mike > > > -----Original Message----- > > From: Zeng, Star > > Sent: Friday, August 19, 2016 12:35 AM > > To: edk2-devel@lists.01.org > > Cc: Zeng, Star <star.zeng@intel.com>; Yao, Jiewen > > <jiewen.yao@intel.com>; Kinney, Michael D > > <michael.d.kinney@intel.com>; Chan Amy <chan.amy@intel.com>; Laszlo > > Ersek <lersek@redhat.com> > > Subject: [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support > > multiple PCI segment > > > > Support multiple PCI segment for PCI_CONFIG2 opcodes. > > > > PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib > > instead of PciLib. That means platforms need to add PciSegmentLib > > declaration like below in platform dsc if the PciSegmentLib was not > > declared in platform dsc before. > > > > PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibP > > PciSegmentLib|ci > > PciSegmentLib|.inf > > > > For platforms only have one segment, > > MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is > > recommended to be used and declared in platform dsc for > > PiDxeS3BootScriptLib to have equivalent functionality with before. > > > > Cc: Jiewen Yao <jiewen.yao@intel.com> > > Cc: Michael D Kinney <michael.d.kinney@intel.com> > > Cc: Chan Amy <chan.amy@intel.com> > > Cc: Laszlo Ersek <lersek@redhat.com> > > Contributed-under: TianoCore Contribution Agreement 1.0 > > Signed-off-by: Star Zeng <star.zeng@intel.com> > > --- > > .../PiDxeS3BootScriptLib/BootScriptExecute.c | 135 ++++++++++----------- > > .../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 15 +-- > > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 2 +- > > .../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 18 +-- > > 4 files changed, 80 insertions(+), 90 deletions(-) > > > > diff --git > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > > index 9e63273bc19c..b865d4452fc8 100644 > > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptExecute.c > > @@ -1,7 +1,7 @@ > > /** @file > > Interpret and execute the S3 data in S3 boot script. > > > > - Copyright (c) 2006 - 2015, Intel Corporation. All rights > > reserved.<BR> > > + Copyright (c) 2006 - 2016, Intel Corporation. All rights > > + reserved.<BR> > > > > This program and the accompanying materials > > are licensed and made available under the terms and conditions @@ > > -639,9 +639,10 @@ BootScriptExecuteMemoryWrite ( > > > > } > > /** > > - Performance PCI configuration read operation > > + Performance PCI configuration 2 read operation > > > > @param Width Width of the operation. > > + @param Segment Pci segment number > > @param Address Address of the operation. > > @param Count Count of the number of accesses to perform. > > @param Buffer Pointer to the buffer read from PCI config space > > @@ > > -652,8 +653,9 @@ BootScriptExecuteMemoryWrite ( > > > > **/ > > EFI_STATUS > > - ScriptPciCfgRead ( > > +ScriptPciCfg2Read ( > > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > > + IN UINT16 Segment, > > IN UINT64 Address, > > IN UINTN Count, > > OUT VOID *Buffer > > @@ -663,11 +665,11 @@ ScriptPciCfgRead ( > > UINTN AddressStride; > > UINTN BufferStride; > > PTR Out; > > - UINTN PciAddress; > > + UINT64 PciAddress; > > > > Out.Buf = (UINT8 *) Buffer; > > > > - PciAddress = PCI_ADDRESS_ENCODE (Address); > > + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); > > > > Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); > > if (EFI_ERROR (Status)) { > > @@ -679,42 +681,42 @@ ScriptPciCfgRead ( > > for (; Count > 0; Count--, PciAddress += AddressStride, Out.Buf > > += BufferStride) > { > > switch (Width) { > > case S3BootScriptWidthUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x\n", PciAddress)); > > - *Out.Uint8 = PciRead8 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx\n", PciAddress)); > > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > > break; > > case S3BootScriptWidthFifoUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x\n", PciAddress)); > > - *Out.Uint8 = PciRead8 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx\n", PciAddress)); > > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > > break; > > case S3BootScriptWidthFillUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x\n", PciAddress)); > > - *Out.Uint8 = PciRead8 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx\n", PciAddress)); > > + *Out.Uint8 = PciSegmentRead8 (PciAddress); > > break; > > > > case S3BootScriptWidthUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x\n", PciAddress)); > > - *Out.Uint16 = PciRead16 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx\n", PciAddress)); > > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > > break; > > case S3BootScriptWidthFifoUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x\n", PciAddress)); > > - *Out.Uint16 = PciRead16 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - > > + 0x%016lx\n", > PciAddress)); > > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > > break; > > case S3BootScriptWidthFillUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x\n", PciAddress)); > > - *Out.Uint16 = PciRead16 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - > > + 0x%016lx\n", > PciAddress)); > > + *Out.Uint16 = PciSegmentRead16 (PciAddress); > > break; > > > > case S3BootScriptWidthUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x\n", PciAddress)); > > - *Out.Uint32 = PciRead32 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx\n", PciAddress)); > > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > > break; > > case S3BootScriptWidthFifoUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x\n", PciAddress)); > > - *Out.Uint32 = PciRead32 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - > > + 0x%016lx\n", > PciAddress)); > > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > > break; > > case S3BootScriptWidthFillUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x\n", PciAddress)); > > - *Out.Uint32 = PciRead32 (PciAddress); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - > > + 0x%016lx\n", > PciAddress)); > > + *Out.Uint32 = PciSegmentRead32 (PciAddress); > > break; > > > > default: > > @@ -725,9 +727,10 @@ ScriptPciCfgRead ( } > > > > /** > > - Performance PCI configuration write operation > > + Performance PCI configuration 2 write operation > > > > @param Width Width of the operation. > > + @param Segment Pci segment number > > @param Address Address of the operation. > > @param Count Count of the number of accesses to perform. > > @param Buffer Pointer to the buffer write to PCI config space > > @@ > > -738,8 +741,9 @@ ScriptPciCfgRead ( > > > > **/ > > EFI_STATUS > > -ScriptPciCfgWrite ( > > +ScriptPciCfg2Write ( > > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > > + IN UINT16 Segment, > > IN UINT64 Address, > > IN UINTN Count, > > IN VOID *Buffer > > @@ -748,14 +752,14 @@ ScriptPciCfgWrite ( > > EFI_STATUS Status; > > UINTN AddressStride; > > UINTN BufferStride; > > - UINTN OriginalPciAddress; > > + UINT64 OriginalPciAddress; > > PTR In; > > PTR OriginalIn; > > - UINTN PciAddress; > > + UINT64 PciAddress; > > > > In.Buf = (UINT8 *) Buffer; > > > > - PciAddress = PCI_ADDRESS_ENCODE (Address); > > + PciAddress = PCI_ADDRESS_ENCODE (Segment, Address); > > > > Status = BuildLoopData (Width, PciAddress, &AddressStride, &BufferStride); > > if (EFI_ERROR (Status)) { > > @@ -769,40 +773,40 @@ ScriptPciCfgWrite ( > > for (; Count > 0; Count--, PciAddress += AddressStride, In.Buf += > > BufferStride) > { > > switch (Width) { > > case S3BootScriptWidthUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%08x (0x%02x)\n", > > PciAddress, (UINTN)*In.Uint8)); > > - PciWrite8 (PciAddress, *In.Uint8); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint8 - 0x%016lx > > + (0x%02x)\n", > > PciAddress, (UINTN)*In.Uint8)); > > + PciSegmentWrite8 (PciAddress, *In.Uint8); > > break; > > case S3BootScriptWidthFifoUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%08x (0x%02x)\n", > > OriginalPciAddress, (UINTN)*In.Uint8)); > > - PciWrite8 (OriginalPciAddress, *In.Uint8); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint8 - 0x%016lx > > + (0x%02x)\n", > > OriginalPciAddress, (UINTN)*In.Uint8)); > > + PciSegmentWrite8 (OriginalPciAddress, *In.Uint8); > > break; > > case S3BootScriptWidthFillUint8: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%08x (0x%02x)\n", > > PciAddress, (UINTN)*OriginalIn.Uint8)); > > - PciWrite8 (PciAddress, *OriginalIn.Uint8); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint8 - 0x%016lx > > + (0x%02x)\n", > > PciAddress, (UINTN)*OriginalIn.Uint8)); > > + PciSegmentWrite8 (PciAddress, *OriginalIn.Uint8); > > break; > > case S3BootScriptWidthUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%08x (0x%04x)\n", > > PciAddress, (UINTN)*In.Uint16)); > > - PciWrite16 (PciAddress, *In.Uint16); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint16 - 0x%016lx > > + (0x%04x)\n", > > PciAddress, (UINTN)*In.Uint16)); > > + PciSegmentWrite16 (PciAddress, *In.Uint16); > > break; > > case S3BootScriptWidthFifoUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%08x (0x%04x)\n", > > OriginalPciAddress, (UINTN)*In.Uint16)); > > - PciWrite16 (OriginalPciAddress, *In.Uint16); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint16 - 0x%016lx > > + (0x%04x)\n", > > OriginalPciAddress, (UINTN)*In.Uint16)); > > + PciSegmentWrite16 (OriginalPciAddress, *In.Uint16); > > break; > > case S3BootScriptWidthFillUint16: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%08x (0x%04x)\n", > > PciAddress, (UINTN)*OriginalIn.Uint16)); > > - PciWrite16 (PciAddress, *OriginalIn.Uint16); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint16 - 0x%016lx > > + (0x%04x)\n", > > PciAddress, (UINTN)*OriginalIn.Uint16)); > > + PciSegmentWrite16 (PciAddress, *OriginalIn.Uint16); > > break; > > case S3BootScriptWidthUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%08x (0x%08x)\n", > > PciAddress, (UINTN)*In.Uint32)); > > - PciWrite32 (PciAddress, *In.Uint32); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthUint32 - 0x%016lx > > + (0x%08x)\n", > > PciAddress, (UINTN)*In.Uint32)); > > + PciSegmentWrite32 (PciAddress, *In.Uint32); > > break; > > case S3BootScriptWidthFifoUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%08x (0x%08x)\n", > > OriginalPciAddress, (UINTN)*In.Uint32)); > > - PciWrite32 (OriginalPciAddress, *In.Uint32); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFifoUint32 - 0x%016lx > > + (0x%08x)\n", > > OriginalPciAddress, (UINTN)*In.Uint32)); > > + PciSegmentWrite32 (OriginalPciAddress, *In.Uint32); > > break; > > case S3BootScriptWidthFillUint32: > > - DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%08x (0x%08x)\n", > > (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); > > - PciWrite32 (PciAddress, *OriginalIn.Uint32); > > + DEBUG ((EFI_D_INFO, "S3BootScriptWidthFillUint32 - 0x%016lx > > + (0x%08x)\n", > > (UINTN)PciAddress, (UINTN)*OriginalIn.Uint32)); > > + PciSegmentWrite32 (PciAddress, *OriginalIn.Uint32); > > break; > > default: > > return EFI_INVALID_PARAMETER; @@ -811,10 +815,9 @@ > > ScriptPciCfgWrite ( > > return EFI_SUCCESS; > > } > > /** > > - Performance PCI configuration 2 read operation > > + Performance PCI configuration read operation > > > > @param Width Width of the operation. > > - @param Segment Pci segment number > > @param Address Address of the operation. > > @param Count Count of the number of accesses to > perform. > > @param Buffer Pointer to the buffer to read from PCI > > config space. > > @@ -824,27 +827,22 @@ ScriptPciCfgWrite ( > > Buffer is NULL. > > The Buffer is not aligned > > for the given Width. > > Address is outside the > > legal range of I/O ports. > > - @note A known Limitations in the implementation which is the > > 'Segment' parameter is assumed as > > - Zero, or else, assert. > > + > > **/ > > EFI_STATUS > > -ScriptPciCfg2Read ( > > +ScriptPciCfgRead ( > > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > > - IN UINT16 Segment, > > IN UINT64 Address, > > IN UINTN Count, > > OUT VOID *Buffer > > ) > > { > > - ASSERT (Segment==0); > > - > > - return ScriptPciCfgRead (Width, Address, Count, Buffer); > > + return ScriptPciCfg2Read (Width, 0, Address, Count, Buffer); > > } > > /** > > - Performance PCI configuration 2 write operation > > + Performance PCI configuration write operation > > > > @param Width Width of the operation. > > - @param Segment Pci segment number > > @param Address Address of the operation. > > @param Count Count of the number of accesses to > perform. > > @param Buffer Pointer to the buffer to write to PCI > config > > space. > > @@ -854,22 +852,18 @@ ScriptPciCfg2Read ( > > Buffer is NULL. > > The Buffer is not aligned > > for the given Width. > > Address is outside the > > legal range of I/O ports. > > - @note A known Limitations in the implementation which is the > > 'Segment' parameter is assumed as > > - Zero, or else, assert. > > > > **/ > > EFI_STATUS > > EFIAPI > > -ScriptPciCfg2Write ( > > +ScriptPciCfgWrite ( > > IN S3_BOOT_SCRIPT_LIB_WIDTH Width, > > - IN UINT16 Segment, > > IN UINT64 Address, > > IN UINTN Count, > > IN VOID *Buffer > > ) > > { > > - ASSERT (Segment==0); > > - return ScriptPciCfgWrite (Width, Address, Count, Buffer); > > + return ScriptPciCfg2Write (Width, 0, Address, Count, Buffer); > > } > > /** > > Interprete the boot script node with EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE OP code. > > @@ -896,7 +890,7 @@ BootScriptExecutePciCfgWrite ( > > Count = PciCfgWrite.Count; > > Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE); > > > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%08x, > > 0x%08x, 0x%08x\n", PCI_ADDRESS_ENCODE (Address), Count, > > (UINTN)Width)); > > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgWrite - 0x%016lx, > > + 0x%08x, 0x%08x\n", > > PCI_ADDRESS_ENCODE (0, Address), Count, (UINTN)Width)); > > return ScriptPciCfgWrite (Width, Address, Count, Buffer); } > > /** > > @@ -1012,7 +1006,7 @@ BootScriptExecutePciCfgReadWrite ( > > > > CopyMem((VOID*)&PciCfgReadWrite, (VOID*)Script, > > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE)); > > > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%08x, > > 0x%016lx, 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgReadWrite.Address), > > AndMask, OrMask)); > > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfgReadWrite - 0x%016lx, > > + 0x%016lx, > > 0x%016lx\n", PCI_ADDRESS_ENCODE (0, PciCfgReadWrite.Address), > > AndMask, OrMask)); > > > > Status = ScriptPciCfgRead ( > > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfgReadWrite.Width, @@ > > -1422,7 +1416,7 @@ BootScriptExecutePciCfg2Write ( > > Count = PciCfg2Write.Count; > > Buffer = Script + sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE); > > > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%04x, > > 0x%08x, 0x%08x, 0x%08x\n", Segment, PCI_ADDRESS_ENCODE (Address), > > Count, (UINTN)Width)); > > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2Write - 0x%016lx, > > + 0x%08x, 0x%08x\n", > > PCI_ADDRESS_ENCODE (Segment, Address), Count, (UINTN)Width)); > > return ScriptPciCfg2Write (Width, Segment, Address, Count, > > Buffer); } > > > > @@ -1452,7 +1446,7 @@ BootScriptExecutePciCfg2ReadWrite ( > > > > CopyMem ((VOID*)&PciCfg2ReadWrite, (VOID*)Script, > > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE)); > > > > - DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - 0x%04x, > > 0x%08x, 0x%016lx, 0x%016lx\n", PciCfg2ReadWrite.Segment, > > PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Address), AndMask, OrMask)); > > + DEBUG ((EFI_D_INFO, "BootScriptExecutePciCfg2ReadWrite - > > + 0x%016lx, 0x%016lx, > > 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfg2ReadWrite.Segment, > > PciCfg2ReadWrite.Address), AndMask, OrMask)); > > > > Status = ScriptPciCfg2Read ( > > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2ReadWrite.Width, @@ > > -1499,7 +1493,7 @@ BootScriptPciCfgPoll ( > > EFI_BOOT_SCRIPT_PCI_CONFIG_POLL PciCfgPoll; > > CopyMem ((VOID*)&PciCfgPoll, (VOID*)Script, > > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG_POLL)); > > > > - DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%08x, 0x%016lx, > > 0x%016lx\n", PCI_ADDRESS_ENCODE (PciCfgPoll.Address), AndMask, > > OrMask)); > > + DEBUG ((EFI_D_INFO, "BootScriptPciCfgPoll - 0x%016lx, 0x%016lx, > > + 0x%016lx\n", > > PCI_ADDRESS_ENCODE (0, PciCfgPoll.Address), AndMask, OrMask)); > > > > Data = 0; > > Status = ScriptPciCfgRead ( > > @@ -1561,7 +1555,7 @@ BootScriptPciCfg2Poll ( > > Data = 0; > > CopyMem ((VOID*)&PciCfg2Poll, (VOID*)Script, > > sizeof(EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL)); > > > > - DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%04x, 0x%08x, > > 0x%016lx, 0x%016lx\n", PciCfg2Poll.Segment, PCI_ADDRESS_ENCODE > > (PciCfg2Poll.Address), AndMask, OrMask)); > > + DEBUG ((EFI_D_INFO, "BootScriptPciCfg2Poll - 0x%016lx, 0x%016lx, > > + 0x%016lx\n", > > PCI_ADDRESS_ENCODE (PciCfg2Poll.Segment, PciCfg2Poll.Address), > > AndMask, OrMask)); > > > > Status = ScriptPciCfg2Read ( > > (S3_BOOT_SCRIPT_LIB_WIDTH) PciCfg2Poll.Width, @@ > > -1604,9 > > +1598,6 @@ BootScriptPciCfg2Poll ( > > @retval RETURN_SUCCESS The boot script table was executed > successfully. > > @retval RETURN_UNSUPPORTED Invalid script table or opcode. > > > > - @note A known Limitations in the implementation: When > > interpreting the opcode EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE > > - EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE and > > EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE, the 'Segment' parameter is assumed as > > - Zero, or else, assert. > > **/ > > RETURN_STATUS > > EFIAPI > > diff --git > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > > index de3915511cec..9ff5b80e7a36 100644 > > --- a/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/BootScriptSave.c > > @@ -1291,7 +1291,7 @@ S3BootScriptSavePciCfgReadWrite ( > > > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > > @retval RETURN_SUCCESS Opcode is added. > > - @note A known Limitations in the implementation which is > > non-zero Segment and 64bits operations are not supported. > > + @note A known Limitations in the implementation which is 64bits > > + operations are > > not supported. > > > > **/ > > RETURN_STATUS > > @@ -1309,8 +1309,7 @@ S3BootScriptSavePciCfg2Write ( > > UINT8 WidthInByte; > > EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE ScriptPciWrite2; > > > > - if (Segment != 0 || > > - Width == S3BootScriptWidthUint64 || > > + if (Width == S3BootScriptWidthUint64 || > > Width == S3BootScriptWidthFifoUint64 || > > Width == S3BootScriptWidthFillUint64) { > > return EFI_INVALID_PARAMETER; > > @@ -1351,7 +1350,7 @@ S3BootScriptSavePciCfg2Write ( > > > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > > @retval RETURN_SUCCESS Opcode is added. > > - @note A known Limitations in the implementation which is > > non-zero Segment and 64bits operations are not supported. > > + @note A known Limitations in the implementation which is 64bits > > + operations are > > not supported. > > > > **/ > > RETURN_STATUS > > @@ -1369,8 +1368,7 @@ S3BootScriptSavePciCfg2ReadWrite ( > > UINT8 WidthInByte; > > EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE ScriptPciReadWrite2; > > > > - if (Segment != 0 || > > - Width == S3BootScriptWidthUint64 || > > + if (Width == S3BootScriptWidthUint64 || > > Width == S3BootScriptWidthFifoUint64 || > > Width == S3BootScriptWidthFillUint64) { > > return EFI_INVALID_PARAMETER; > > @@ -1946,7 +1944,7 @@ S3BootScriptSavePciPoll ( > > > > @retval RETURN_OUT_OF_RESOURCES Not enough memory for the table do operation. > > @retval RETURN_SUCCESS Opcode is added. > > - @note A known Limitations in the implementation which is > > non-zero Segment and 64bits operations are not supported. > > + @note A known Limitations in the implementation which is 64bits > > + operations are > > not supported. > > > > **/ > > RETURN_STATUS > > @@ -1965,8 +1963,7 @@ S3BootScriptSavePci2Poll ( > > UINT8 Length; > > EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL ScriptPci2Poll; > > > > - if (Segment != 0 || > > - Width == S3BootScriptWidthUint64 || > > + if (Width == S3BootScriptWidthUint64 || > > Width == S3BootScriptWidthFifoUint64 || > > Width == S3BootScriptWidthFillUint64) { > > return EFI_INVALID_PARAMETER; > > diff --git > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > > index 4125cdd70f10..0feff3661233 100644 > > --- > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf > > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.i > > +++ nf > > @@ -52,7 +52,7 @@ [LibraryClasses] > > PcdLib > > UefiLib > > SmbusLib > > - PciLib > > + PciSegmentLib > > IoLib > > LockBoxLib > > > > diff --git > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > > b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > > index 9b150480dbca..ffbf5d2688da 100644 > > --- > > a/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib.h > > +++ b/MdeModulePkg/Library/PiDxeS3BootScriptLib/InternalBootScriptLib. > > +++ h > > @@ -2,7 +2,7 @@ > > Support for S3 boot script lib. This file defined some internal > > macro and > internal > > data structure > > > > - Copyright (c) 2006 - 2015, Intel Corporation. All rights > > reserved.<BR> > > + Copyright (c) 2006 - 2016, Intel Corporation. All rights > > + reserved.<BR> > > > > This program and the accompanying materials > > are licensed and made available under the terms and conditions @@ > > -33,7 +33,7 @@ #include <Library/PcdLib.h> #include > > <Library/SmbusLib.h> #include <Library/IoLib.h> -#include > > <Library/PciLib.h> > > +#include <Library/PciSegmentLib.h> > > #include <Library/DebugLib.h> > > #include <Library/BaseMemoryLib.h> > > #include <Library/TimerLib.h> > > @@ -45,13 +45,15 @@ > > #define MAX_IO_ADDRESS 0xFFFF > > > > // > > -// Macro to convert a UEFI PCI address to a PCI Library PCI address > > +// Macro to convert a UEFI PCI address + segment to a PCI Segment > > +Library PCI > > address > > // > > -#define PCI_ADDRESS_ENCODE(A) (UINTN)PCI_LIB_ADDRESS( \ > > - ((((UINTN)(A))& 0xff000000) >> 24), ((((UINTN)(A)) &0x00ff0000) >> 16), > > ((((UINTN)(A)) & 0xff00) >> 8), ((RShiftU64 ((A), 32) & 0xfff) | ((A)& 0xff)) \ > > - ) > > - > > - > > +#define PCI_ADDRESS_ENCODE(S, A) PCI_SEGMENT_LIB_ADDRESS( \ > > + S, \ > > + ((((UINTN)(A)) & 0xff000000) >> 24), \ > > + ((((UINTN)(A)) & 0x00ff0000) >> 16), \ > > + ((((UINTN)(A)) & 0xff00) >> 8), \ > > + ((RShiftU64 ((A), 32) & 0xfff) | > > +((A) & 0xff)) > \ > > + ) > > > > typedef union { > > UINT8 volatile *Buf; > > -- > > 2.7.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH 3/6] Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc 2016-08-19 7:35 [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng 2016-08-19 7:35 ` [PATCH 1/6] MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces Star Zeng 2016-08-19 7:35 ` [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng @ 2016-08-19 7:35 ` Star Zeng 2016-08-22 6:54 ` Wei, David 2016-08-19 7:35 ` [PATCH 4/6] QuarkPlatformPkg: " Star Zeng ` (4 subsequent siblings) 7 siblings, 1 reply; 15+ messages in thread From: Star Zeng @ 2016-08-19 7:35 UTC (permalink / raw) To: edk2-devel; +Cc: Star Zeng, Jiewen Yao, Michael D Kinney, Chan Amy, David Wei PiDxeS3BootScriptLib has been updated to consume PciSegmentLib instead of PciLib to support multiple PCI segment. That means platforms need to add PciSegmentLib declaration in platform dsc if the PciSegmentLib was not declared in platform dsc before. For platforms only have one segment, MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended to be used and declared in platform dsc for PiDxeS3BootScriptLib to have equivalent functionality with before. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Chan Amy <chan.amy@intel.com> Cc: David Wei <david.wei@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> --- Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 1 + Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 1 + Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 1 + 3 files changed, 3 insertions(+) diff --git a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc index 05eb3c698fcc..7125366681cd 100644 --- a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc +++ b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc @@ -119,6 +119,7 @@ [LibraryClasses.common] CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf diff --git a/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc index 32dda41625ac..6efaf32df256 100644 --- a/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc +++ b/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc @@ -119,6 +119,7 @@ [LibraryClasses.common] CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf diff --git a/Vlv2TbltDevicePkg/PlatformPkgX64.dsc b/Vlv2TbltDevicePkg/PlatformPkgX64.dsc index a176041e2951..6bb503d3cdd2 100644 --- a/Vlv2TbltDevicePkg/PlatformPkgX64.dsc +++ b/Vlv2TbltDevicePkg/PlatformPkgX64.dsc @@ -119,6 +119,7 @@ [LibraryClasses.common] CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 3/6] Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc 2016-08-19 7:35 ` [PATCH 3/6] Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc Star Zeng @ 2016-08-22 6:54 ` Wei, David 0 siblings, 0 replies; 15+ messages in thread From: Wei, David @ 2016-08-22 6:54 UTC (permalink / raw) To: Zeng, Star, edk2-devel@lists.01.org Cc: Kinney, Michael D, Chan Amy, Yao, Jiewen, Zeng, Star, Wei, David Reviewed-by: David Wei <david.wei@intel.com> Thanks, David Wei -----Original Message----- From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Star Zeng Sent: Friday, August 19, 2016 3:35 PM To: edk2-devel@lists.01.org Cc: Kinney, Michael D <michael.d.kinney@intel.com>; Chan Amy <chan.amy@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>; Zeng, Star <star.zeng@intel.com>; Wei, David <david.wei@intel.com> Subject: [edk2] [PATCH 3/6] Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc PiDxeS3BootScriptLib has been updated to consume PciSegmentLib instead of PciLib to support multiple PCI segment. That means platforms need to add PciSegmentLib declaration in platform dsc if the PciSegmentLib was not declared in platform dsc before. For platforms only have one segment, MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended to be used and declared in platform dsc for PiDxeS3BootScriptLib to have equivalent functionality with before. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Chan Amy <chan.amy@intel.com> Cc: David Wei <david.wei@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> --- Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 1 + Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 1 + Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 1 + 3 files changed, 3 insertions(+) diff --git a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc index 05eb3c698fcc..7125366681cd 100644 --- a/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc +++ b/Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc @@ -119,6 +119,7 @@ [LibraryClasses.common] CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf diff --git a/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc b/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc index 32dda41625ac..6efaf32df256 100644 --- a/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc +++ b/Vlv2TbltDevicePkg/PlatformPkgIA32.dsc @@ -119,6 +119,7 @@ [LibraryClasses.common] CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf diff --git a/Vlv2TbltDevicePkg/PlatformPkgX64.dsc b/Vlv2TbltDevicePkg/PlatformPkgX64.dsc index a176041e2951..6bb503d3cdd2 100644 --- a/Vlv2TbltDevicePkg/PlatformPkgX64.dsc +++ b/Vlv2TbltDevicePkg/PlatformPkgX64.dsc @@ -119,6 +119,7 @@ [LibraryClasses.common] CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf -- 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 4/6] QuarkPlatformPkg: Declare PciSegmentLib in platform dsc 2016-08-19 7:35 [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng ` (2 preceding siblings ...) 2016-08-19 7:35 ` [PATCH 3/6] Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc Star Zeng @ 2016-08-19 7:35 ` Star Zeng 2016-08-19 7:35 ` [PATCH 5/6] QuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib Star Zeng ` (3 subsequent siblings) 7 siblings, 0 replies; 15+ messages in thread From: Star Zeng @ 2016-08-19 7:35 UTC (permalink / raw) To: edk2-devel Cc: Star Zeng, Jiewen Yao, Michael D Kinney, Chan Amy, Kelly Steele PiDxeS3BootScriptLib has been updated to consume PciSegmentLib instead of PciLib to support multiple PCI segment. That means platforms need to add PciSegmentLib declaration in platform dsc if the PciSegmentLib was not declared in platform dsc before. For platforms only have one segment, MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended to be used and declared in platform dsc for PiDxeS3BootScriptLib to have equivalent functionality with before. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Chan Amy <chan.amy@intel.com> Cc: Kelly Steele <kelly.steele@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> --- QuarkPlatformPkg/Quark.dsc | 1 + QuarkPlatformPkg/QuarkMin.dsc | 1 + 2 files changed, 2 insertions(+) diff --git a/QuarkPlatformPkg/Quark.dsc b/QuarkPlatformPkg/Quark.dsc index 0b845bacf984..51a7b632074c 100644 --- a/QuarkPlatformPkg/Quark.dsc +++ b/QuarkPlatformPkg/Quark.dsc @@ -93,6 +93,7 @@ [LibraryClasses] CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf diff --git a/QuarkPlatformPkg/QuarkMin.dsc b/QuarkPlatformPkg/QuarkMin.dsc index 437b0a60694f..99ae0677eb8b 100644 --- a/QuarkPlatformPkg/QuarkMin.dsc +++ b/QuarkPlatformPkg/QuarkMin.dsc @@ -83,6 +83,7 @@ [LibraryClasses] CpuExceptionHandlerLib|UefiCpuPkg/Library/CpuExceptionHandlerLib/DxeCpuExceptionHandlerLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 5/6] QuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib 2016-08-19 7:35 [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng ` (3 preceding siblings ...) 2016-08-19 7:35 ` [PATCH 4/6] QuarkPlatformPkg: " Star Zeng @ 2016-08-19 7:35 ` Star Zeng 2016-08-19 7:35 ` [PATCH 6/6] SecurityPkg/SecurityPkg.dsc: " Star Zeng ` (2 subsequent siblings) 7 siblings, 0 replies; 15+ messages in thread From: Star Zeng @ 2016-08-19 7:35 UTC (permalink / raw) To: edk2-devel Cc: Star Zeng, Jiewen Yao, Michael D Kinney, Chan Amy, Kelly Steele PiDxeS3BootScriptLib has been updated to consume PciSegmentLib instead of PciLib to support multiple PCI segment. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Chan Amy <chan.amy@intel.com> Cc: Kelly Steele <kelly.steele@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> --- QuarkSocPkg/QuarkSocPkg.dsc | 1 + 1 file changed, 1 insertion(+) diff --git a/QuarkSocPkg/QuarkSocPkg.dsc b/QuarkSocPkg/QuarkSocPkg.dsc index 20301b36469b..42bb5bb9ab8a 100644 --- a/QuarkSocPkg/QuarkSocPkg.dsc +++ b/QuarkSocPkg/QuarkSocPkg.dsc @@ -60,6 +60,7 @@ [LibraryClasses] CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf PciLib|MdePkg/Library/BasePciLibCf8/BasePciLibCf8.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH 6/6] SecurityPkg/SecurityPkg.dsc: Declare PciSegmentLib 2016-08-19 7:35 [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng ` (4 preceding siblings ...) 2016-08-19 7:35 ` [PATCH 5/6] QuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib Star Zeng @ 2016-08-19 7:35 ` Star Zeng 2016-08-19 13:35 ` [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Yao, Jiewen 2016-08-24 2:26 ` Laszlo Ersek 7 siblings, 0 replies; 15+ messages in thread From: Star Zeng @ 2016-08-19 7:35 UTC (permalink / raw) To: edk2-devel; +Cc: Star Zeng, Jiewen Yao, Michael D Kinney, Chan Amy, Chao Zhang PiDxeS3BootScriptLib has been updated to consume PciSegmentLib instead of PciLib to support multiple PCI segment. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Chan Amy <chan.amy@intel.com> Cc: Chao Zhang <chao.b.zhang@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> --- SecurityPkg/SecurityPkg.dsc | 1 + 1 file changed, 1 insertion(+) diff --git a/SecurityPkg/SecurityPkg.dsc b/SecurityPkg/SecurityPkg.dsc index 0ac4dfb5c83a..3b36d0f5a77a 100644 --- a/SecurityPkg/SecurityPkg.dsc +++ b/SecurityPkg/SecurityPkg.dsc @@ -66,6 +66,7 @@ [LibraryClasses] TrEEPpVendorLib|SecurityPkg/Library/TrEEPpVendorLibNull/TrEEPpVendorLibNull.inf RngLib|MdePkg/Library/BaseRngLib/BaseRngLib.inf PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf + PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf S3BootScriptLib|MdeModulePkg/Library/PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf SmbusLib|MdePkg/Library/BaseSmbusLibNull/BaseSmbusLibNull.inf LockBoxLib|MdeModulePkg/Library/LockBoxNullLib/LockBoxNullLib.inf -- 2.7.0.windows.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment 2016-08-19 7:35 [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng ` (5 preceding siblings ...) 2016-08-19 7:35 ` [PATCH 6/6] SecurityPkg/SecurityPkg.dsc: " Star Zeng @ 2016-08-19 13:35 ` Yao, Jiewen 2016-08-24 2:26 ` Laszlo Ersek 7 siblings, 0 replies; 15+ messages in thread From: Yao, Jiewen @ 2016-08-19 13:35 UTC (permalink / raw) To: Zeng, Star, edk2-devel@lists.01.org Cc: Kinney, Michael D, Chan Amy, Laszlo Ersek, Steele, Kelly, Wei, David, Zhang, Chao B Reviewed by: jiewen.yao@intel.com > -----Original Message----- > From: Zeng, Star > Sent: Friday, August 19, 2016 3:35 PM > To: edk2-devel@lists.01.org > Cc: Zeng, Star <star.zeng@intel.com>; Yao, Jiewen <jiewen.yao@intel.com>; > Kinney, Michael D <michael.d.kinney@intel.com>; Chan Amy > <chan.amy@intel.com>; Laszlo Ersek <lersek@redhat.com>; Steele, Kelly > <kelly.steele@intel.com>; Wei, David <david.wei@intel.com>; Zhang, Chao B > <chao.b.zhang@intel.com> > Subject: [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment > > Support multiple PCI segment for PCI_CONFIG2 opcodes. > > PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib > instead of PciLib. That means platforms need to add PciSegmentLib > declaration like below in platform dsc if the PciSegmentLib was > not declared in platform dsc before. > > PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibP > ci.inf > > For platforms only have one segment, > MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is > recommended > to be used and declared in platform dsc for PiDxeS3BootScriptLib to have > equivalent functionality with before. > > Cc: Jiewen Yao <jiewen.yao@intel.com> > Cc: Michael D Kinney <michael.d.kinney@intel.com> > Cc: Chan Amy <chan.amy@intel.com> > Cc: Laszlo Ersek <lersek@redhat.com> > Cc: Kelly Steele <kelly.steele@intel.com> > Cc: David Wei <david.wei@intel.com> > Cc: Chao Zhang <chao.b.zhang@intel.com> > > Star Zeng (6): > MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces > MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment > Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc > QuarkPlatformPkg: Declare PciSegmentLib in platform dsc > QuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib > SecurityPkg/SecurityPkg.dsc: Declare PciSegmentLib > > .../PiDxeS3BootScriptLib/BootScriptExecute.c | 411 > +++++++++---------- > .../BootScriptInternalFormat.h | 2 +- > .../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 451 > ++++++++++----------- > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 4 +- > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.uni | 2 +- > .../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 26 +- > QuarkPlatformPkg/Quark.dsc | 1 + > QuarkPlatformPkg/QuarkMin.dsc | 1 + > QuarkSocPkg/QuarkSocPkg.dsc | 1 + > SecurityPkg/SecurityPkg.dsc | 1 + > Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 1 + > Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 1 + > Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 1 + > 13 files changed, 450 insertions(+), 453 deletions(-) > > -- > 2.7.0.windows.1 ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment 2016-08-19 7:35 [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng ` (6 preceding siblings ...) 2016-08-19 13:35 ` [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Yao, Jiewen @ 2016-08-24 2:26 ` Laszlo Ersek 2016-09-01 15:57 ` Kinney, Michael D 7 siblings, 1 reply; 15+ messages in thread From: Laszlo Ersek @ 2016-08-24 2:26 UTC (permalink / raw) To: Star Zeng, Michael D Kinney Cc: edk2-devel, Chan Amy, Chao Zhang, Jiewen Yao, David Wei On 08/19/16 03:35, Star Zeng wrote: > Support multiple PCI segment for PCI_CONFIG2 opcodes. > > PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib > instead of PciLib. That means platforms need to add PciSegmentLib > declaration like below in platform dsc if the PciSegmentLib was > not declared in platform dsc before. > > PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf > > For platforms only have one segment, > MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended > to be used and declared in platform dsc for PiDxeS3BootScriptLib to have > equivalent functionality with before. > > Cc: Jiewen Yao <jiewen.yao@intel.com> > Cc: Michael D Kinney <michael.d.kinney@intel.com> > Cc: Chan Amy <chan.amy@intel.com> > Cc: Laszlo Ersek <lersek@redhat.com> > Cc: Kelly Steele <kelly.steele@intel.com> > Cc: David Wei <david.wei@intel.com> > Cc: Chao Zhang <chao.b.zhang@intel.com> > > Star Zeng (6): > MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces > MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment > Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc > QuarkPlatformPkg: Declare PciSegmentLib in platform dsc > QuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib > SecurityPkg/SecurityPkg.dsc: Declare PciSegmentLib > > .../PiDxeS3BootScriptLib/BootScriptExecute.c | 411 +++++++++---------- > .../BootScriptInternalFormat.h | 2 +- > .../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 451 ++++++++++----------- > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 4 +- > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.uni | 2 +- > .../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 26 +- > QuarkPlatformPkg/Quark.dsc | 1 + > QuarkPlatformPkg/QuarkMin.dsc | 1 + > QuarkSocPkg/QuarkSocPkg.dsc | 1 + > SecurityPkg/SecurityPkg.dsc | 1 + > Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 1 + > Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 1 + > Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 1 + > 13 files changed, 450 insertions(+), 453 deletions(-) > For patches #1 and #2: Tested-by: Laszlo Ersek <lersek@redhat.com> (Also compared some logs.) I read the sub-thread under #2, but I don't understand Mike's concern. I can be wrong of course, but in my understanding, the boot script's internal representation does not change. The "saver" side only relaxes the Segment=0 requirement. And, the "executor side" accommodates nonzero segments in the Pci2 opcodes, and rebases the Pci[1] opcode functions on top of Pci2 opcode functions (with hardcoded Segment=0). I don't understand why calling PciSegmentLib functions with a UINT64 parameter where the segment bit-field is hardcoded to 0 is worse than calling PciLib (uncapable of nonzero segments) with an UINTN parameter. Is this about the cost of a function call on Ia32? That is, assuming a very long S3 boot script, the patch might noticeably slow down S3 resume on Ia32? Thanks Laszlo ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment 2016-08-24 2:26 ` Laszlo Ersek @ 2016-09-01 15:57 ` Kinney, Michael D 0 siblings, 0 replies; 15+ messages in thread From: Kinney, Michael D @ 2016-09-01 15:57 UTC (permalink / raw) To: Laszlo Ersek, Zeng, Star, Kinney, Michael D Cc: edk2-devel@ml01.01.org, Yao, Jiewen, Chan Amy, Zhang, Chao B, Wei, David Laszlo, You are correct. No functional change. I think I was more concerned about source changes to the functions that were already well tested, and wanted to focus the source code changes on the functions that were being enabled for multiple segments. If we are all confident from the code review and testing that we have not introduced any regression, then it is a good change. Reviewed-by: Michael Kinney <michael.d.kinney@intel.com> Mike > -----Original Message----- > From: edk2-devel [mailto:edk2-devel-bounces@lists.01.org] On Behalf Of Laszlo Ersek > Sent: Tuesday, August 23, 2016 7:26 PM > To: Zeng, Star <star.zeng@intel.com>; Kinney, Michael D <michael.d.kinney@intel.com> > Cc: edk2-devel@ml01.01.org; Yao, Jiewen <jiewen.yao@intel.com>; Chan Amy > <chan.amy@intel.com>; Zhang, Chao B <chao.b.zhang@intel.com>; Wei, David > <david.wei@intel.com> > Subject: Re: [edk2] [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment > > On 08/19/16 03:35, Star Zeng wrote: > > Support multiple PCI segment for PCI_CONFIG2 opcodes. > > > > PiDxeS3BootScriptLib needs to be updated to consume PciSegmentLib > > instead of PciLib. That means platforms need to add PciSegmentLib > > declaration like below in platform dsc if the PciSegmentLib was > > not declared in platform dsc before. > > > > PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf > > > > For platforms only have one segment, > > MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf is recommended > > to be used and declared in platform dsc for PiDxeS3BootScriptLib to have > > equivalent functionality with before. > > > > Cc: Jiewen Yao <jiewen.yao@intel.com> > > Cc: Michael D Kinney <michael.d.kinney@intel.com> > > Cc: Chan Amy <chan.amy@intel.com> > > Cc: Laszlo Ersek <lersek@redhat.com> > > Cc: Kelly Steele <kelly.steele@intel.com> > > Cc: David Wei <david.wei@intel.com> > > Cc: Chao Zhang <chao.b.zhang@intel.com> > > > > Star Zeng (6): > > MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces > > MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment > > Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc > > QuarkPlatformPkg: Declare PciSegmentLib in platform dsc > > QuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib > > SecurityPkg/SecurityPkg.dsc: Declare PciSegmentLib > > > > .../PiDxeS3BootScriptLib/BootScriptExecute.c | 411 +++++++++---------- > > .../BootScriptInternalFormat.h | 2 +- > > .../Library/PiDxeS3BootScriptLib/BootScriptSave.c | 451 ++++++++++----------- > > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.inf | 4 +- > > .../PiDxeS3BootScriptLib/DxeS3BootScriptLib.uni | 2 +- > > .../PiDxeS3BootScriptLib/InternalBootScriptLib.h | 26 +- > > QuarkPlatformPkg/Quark.dsc | 1 + > > QuarkPlatformPkg/QuarkMin.dsc | 1 + > > QuarkSocPkg/QuarkSocPkg.dsc | 1 + > > SecurityPkg/SecurityPkg.dsc | 1 + > > Vlv2TbltDevicePkg/PlatformPkgGccX64.dsc | 1 + > > Vlv2TbltDevicePkg/PlatformPkgIA32.dsc | 1 + > > Vlv2TbltDevicePkg/PlatformPkgX64.dsc | 1 + > > 13 files changed, 450 insertions(+), 453 deletions(-) > > > > For patches #1 and #2: > > Tested-by: Laszlo Ersek <lersek@redhat.com> > > (Also compared some logs.) > > I read the sub-thread under #2, but I don't understand Mike's concern. I > can be wrong of course, but in my understanding, the boot script's > internal representation does not change. The "saver" side only relaxes > the Segment=0 requirement. And, the "executor side" accommodates nonzero > segments in the Pci2 opcodes, and rebases the Pci[1] opcode functions on > top of Pci2 opcode functions (with hardcoded Segment=0). > > I don't understand why calling PciSegmentLib functions with a UINT64 > parameter where the segment bit-field is hardcoded to 0 is worse than > calling PciLib (uncapable of nonzero segments) with an UINTN parameter. > > Is this about the cost of a function call on Ia32? That is, assuming a > very long S3 boot script, the patch might noticeably slow down S3 resume > on Ia32? > > Thanks > Laszlo > _______________________________________________ > edk2-devel mailing list > edk2-devel@lists.01.org > https://lists.01.org/mailman/listinfo/edk2-devel ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2016-09-01 15:57 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2016-08-19 7:35 [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng 2016-08-19 7:35 ` [PATCH 1/6] MdeModulePkg PiDxeS3BootScriptLib: Remove the trailing white spaces Star Zeng 2016-08-19 7:35 ` [PATCH 2/6] MdeModulePkg PiDxeS3BootScriptLib: Support multiple PCI segment Star Zeng 2016-08-23 1:58 ` Kinney, Michael D 2016-08-23 2:09 ` Zeng, Star 2016-08-23 3:44 ` Kinney, Michael D 2016-08-23 8:57 ` Zeng, Star 2016-08-19 7:35 ` [PATCH 3/6] Vlv2TbltDevicePkg: Declare PciSegmentLib in platform dsc Star Zeng 2016-08-22 6:54 ` Wei, David 2016-08-19 7:35 ` [PATCH 4/6] QuarkPlatformPkg: " Star Zeng 2016-08-19 7:35 ` [PATCH 5/6] QuarkSocPkg/QuarkSocPkg.dsc: Declare PciSegmentLib Star Zeng 2016-08-19 7:35 ` [PATCH 6/6] SecurityPkg/SecurityPkg.dsc: " Star Zeng 2016-08-19 13:35 ` [PATCH 0/6] PiDxeS3BootScriptLib: Support multiple PCI segment Yao, Jiewen 2016-08-24 2:26 ` Laszlo Ersek 2016-09-01 15:57 ` Kinney, Michael D
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